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 SIGNAL PROCESSING TECHNOLOGIES
SPT
APPLICATIONS
SPT5140
8-BIT, ULTRAHIGH-SPEED D/A CONVERTER
* Raster graphics * High-resolution color or monochrome displays to 2k x 2k pixels * Medical electronics: CAT, PET, MR imaging displays * CAD/CAE workstations * Solids modeling * General-purpose high-speed D/A conversion * Digital synthesizers * Automated test equipment * Digital transmitters/modulators
FEATURES
* 400 MWPS nominal conversion rate * RS-343-A compatible * Complete video controls: Sync, Blank, Bright and Reference White (Force High) * 10 KH, 100K ECL compatible * Single power supply * Registered data and video controls * Differential current outputs * Stable on-chip bandgap reference * 50 and 75 ohm output drive * ESD-protected data and control inputs
GENERAL DESCRIPTION
The SPT5140 is a monolithic 8-bit digital-to-analog converter capable of accepting video data at 400 MWPS. Complete with video controls -- Sync, Blank, Reference White (Force High), Bright -- the SPT5140 directly drives doubly-terminated 50 or 75 ohm loads to standard composite video levels. Standard set-up level is 7.5 IRE. The
SPT5140 includes an internal precision bandgap reference which can drive two other SPT5140s in an RGB graphics system. The SPT5140 is available in a 24-lead PDIP package in the industrial temperature range of -25 C to +85 C. Contact the factory for military temperature and /883 versions.
BLOCK DIAGRAM
Sync, Blank, Bright, Ref - White Video Controls In 4 Video Data In D0-D3 4 4 4 Out +
Register
Video Data In D4-D7 (MSBs) 4
Output Current Switches
Out -
4 to 15 Decode
Feedthrough Convert 2
ISet Ref In Ref Out
Ref Buffer Bandgap Reference
Signal Processing Technologies, Inc.
4755 Forge Road, Colorado Springs, Colorado 80907, USA Phone: (719) 528-2300 FAX: (719) 528-2370 Website: http://www.spt.com E-Mail: sales@spt.com
ABSOLUTE MAXIMUM RATINGS (Beyond which damage may occur)1 25 C
Supply Voltages VEE (measured to VCC) .......................... -7.0 to 0.5 V Input Voltages CONV, Data, and Controls ...................... VEE to 0.5 V (measured to VCC) Ref+ (measured to VCC) ......................... VEE to 0.5 V Ref- (measured to VCC) .......................... VEE to 0.5 V Temperature Operating, ambient ............................... -25 to +85 C junction ....................................... + 175 C Lead, soldering (10 seconds) ...................... + 300 C Storage ............................................. -60 to + 150 C
Note 1: Operation at any Absolute Maximum Rating is not implied. See Electrical Specifications for proper nominal applied conditions in typical applications.
ELECTRICAL SPECIFICATIONS
VCC = ground, VEE = -5.2 V 0.3 V, TA = TMIN to TMAX, CC = 0 pF, ISet = 1.105 mA, unless otherwise specified. PARAMETERS DC Electrical Characteristics Integral Linearity Error Differential Linearity Error Gain Error Gain Error Tempco Bandgap Tempco Input Capacitance, ISet, Ref Out Compliance Voltage, + Output Compliance Voltage, - Output Equivalent Output Resistance Output Capacitance Maximum Current, + Output Maximum Current, - Output Output Offset Current Input Voltage, Logic High Input Voltage, Logic Low Convert Voltage, Common Mode Range (VICM) Convert Voltage, Differential (VIDF) Input Current, Logic Low, Data and Controls Input Current, Logic High, Data and Controls Input Current, Convert Reference Voltage Measured to VCC Reference Output Current Input Capacitance, Data and Controls Power Supply Sensitivity Supply Current TEST CONDITIONS 1.0 mASPT
SPT5140
2
3/28/00
ELECTRICAL SPECIFICATIONS
VCC = ground, VEE = -5.2 V 0.3 V, TA = TMIN to TMAX, CC = 0 pF, ISet = 1.105 mA, unless otherwise specified. PARAMETERS TEST CONDITIONS TEST LEVEL MIN TYP 400 900 600 4 3 2.2 4 4.5 1.5 6 6 MAX UNITS MWPS ps ps ns ns ns ns ns ns ns pV-s ns MHz ns ns V/S dB
Dynamic Characteristics (RL = 37.5 ohms, CL = 5 pF, TA = +25 C, ISet = 1.105 mA) Maximum Conversion Rate IV 385 Rise Time 10% to 90% G.S. IV Rise Time 10% to 90% G.S. IV RL = 25 ohms Current Settling Time, Clocked To 0.2% G.S. V Mode (tSI) Current Settling Time, Clocked To 0.2% G.S. V RL = 25 Mode (tSI) Clock to Output Delay, Clocked IV Mode (tDSC) TA = TMIN to TMAX IV Part-to-Part Clock to Output Delay IV Skew, Clocked Mode TA = TMIN to TMAX Data to Output Delay, IV Transparent Mode (tDST) TA = TMIN to TMAX IV Glitch Energy Area = 1/2 VT V Convert Pulse Width (tPWH, tPWL) IV 1.3 Reference Bandwidth, -3 dB V Set-up Time, Data and Controls (tS) IV 1.0 Hold Time, Data and Controls (tH) IV 0.5 Slew Rate 20% to 80% G.S. V Clock Feedthrough IV
3.2 4 1.25
700 -48
TEST LEVEL CODES
All electrical characteristics are subject to the following conditions: All parameters having min/max specifications are guaranteed. The Test Level column indicates the specific device testing actually performed during production and Quality Assurance inspection. Any blank section in the data column indicates that the specification is not tested at the specified condition.
TEST LEVEL
I II III IV V VI
TEST PROCEDURE
100% production tested at the specified temperature. 100% production tested at TA = +25 C, and sample tested at the specified temperatures. QA sample tested only at the specified temperatures. Parameter is guaranteed (but not tested) by design and characterization data. Parameter is a typical value for information purposes only. 100% production tested at TA = +25 C. Parameter is guaranteed over specified temperature range.
SPT
SPT5140
3
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Figure 1 - Functional Diagram
D0-D7 8 Composite Video Controls CONV CONV Feedthrough 2
Decoding Logic Data Registers
Current Sources and Switches
Out + Out -
4
Current Source Biasing
Bandgap Reference
Amp
+ -
VEE
VCC
Ref Out
ISet
Ref In
APPLICATION INFORMATION
The SPT5140 is a high-speed video digital-to-analog converter capable of up to 400 MWPS conversion rates. This makes the devices suitable for driving 2048 X 2048 pixel displays at update rates of 60 to 90 Hz. In addition, the SPT5140 includes an internal bandgap reference which may be used to drive two other SPT5140s if desired. The SPT5140 has 10KH and 100K ECL logic level compatible video control and data inputs. The complementary analog output currents produced by the devices are proportional to the product of the digital control and data inputs in conjunction with the analog reference current. The SPT5140 is segmented so that the four MSBs of the input data are separated into a parallel "thermometer" code. From here, fifteen current sinks, which are identical, are driven to fabricate sixteen coarse output levels. The remaining four LSBs drive four binary weighted current switches. MSB currents are then summed with the LSBs that provide a one-sixteenth of full-scale contribution to provide the 256 distinct analog output levels. The video control inputs drive weighted current sinks which are added to the output current to produce composite video output levels. These controls -- Sync, Blank, Reference White (Force High) and Bright -- are needed in video applications. Another feature that similar video D/A converters do not have is the Feedthrough Control. This pin allows registered or unregistered operation of the video control and
data inputs. In the registered mode, the composite functions are latched to the pixel data to prevent screen-edge distortions generally found on unregistered video DACs.
TYPICAL INTERFACE CIRCUIT
GENERAL A typical interface circuit using the SPT5140 in a color raster application is shown in figure 2. The SPT5140 requires few external components and is extremely easy to use. The very high operating speeds of the SPT5140 require good circuit layout, decoupling of supplies, and proper design of transmission lines. The following considerations should be noted to achieve best performance. INPUT CONSIDERATIONS Video input data and controls may be directly connected to the SPT5140. Note that all ECL inputs are terminated as closely to the device as possible to reduce ringing, crosstalk and reflections. A convenient and commonly used microstrip impedance is about 130 ohms, which is easily terminated using a 330 ohm resistor to VEE and a 220 ohm resistor to ground. This arrangement gives a Thevenin equivalent termination of 130 ohms to -2 volts without the need for a -2 volt supply. Standard SIP (Single Inline Package) 220/330 resistor networks are available for this purpose. It is recommended that stripline or microstrip techniques be used for all ECL interface. Printed circuit wiring of known impedance over a solid ground plane is recommended.
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Figure 2 - Typical Interface Circuit
Video Monitor
FT FH Blank BRT Sync 4 Out- R3 50/75
4
D0 (LSB) D1 D2 D3
Output Current Switches
Video Control Inputs
50/75 COAX R4 50/75
Register
Out+
Video Data Inputs
NOTES: 1. V- = -1.2 V (typical) for LM113 or VBG 2. V+ = -1.2 V V+ ; typ = 1.105 mA 3. ISet = T(R1+R2) 4. RL = R3 / / R4 5. VOUT = K [
D4 D5 D6 D7 (MSB) CONV
4 to 15 Decode
Clock
R1 1 k R2 1 k
CONV
[K1 x ISet x RL(bright)]
255-Digital Input Code 255
x I Set ] RL +
ISet LM113/313 1k 2 k
V+
(
ISet
*) Ref Buffer Bandgap Reference
VCC VEE
V- .01 F
Ref In
Jumper J1
6. VSync = (K x ISet x RL) + (K2 x ISet x RL) K = 15.8069 K1 = 1.7617 K2 = 10.0392 7. FB = Ferrite bead, Fair-rite pin 217430011 or equivalent. 8. All reference resistors 1/8 W 1% metal film, power supply decoupling 50 V ceramic disc 9. x = ECL Termination 10. = VCC = AGND
-5.2 V
Optional External Reference
Remove J1 For External Reference
.01 F
10 F
FB
11. See figure 9 for detail on Ref Buffer.
-5.2 V
*An external reference can be used or the reference from
Ref Out can drive three SPT5140s.
12.
= DGND (digital input drivers).
OUTPUT CONSIDERATIONS The analog outputs are designed to directly drive a doubly terminated 50 or 75 ohm load transmission system as shown. The source impedances of the SPT5140 outputs are high impedance current sinks. The load impedance (RL) must be 25 or 37.5 ohms to attain standard RS-343A video levels. Any deviation from this impedance will affect the resulting video output levels proportionally. As with the data interface, it is important that the analog transmission lines have matched impedance throughout, including connectors and transitions between printed wiring and coaxial cable. The combination of matched source termination resistor RS and load terminator RL minimizes reflections of both forward and reverse traveling waves in the analog transmission system. The return path for analog output current is VCC, which is connected to the source termination resistor RS.
POWER CONSIDERATIONS The SPT5140 operates from a single -5.2 V standard supply. Proper bypassing of the supplies will augment the SPT5140's inherent supply noise rejection characteristics. As shown in figure 2, each supply pin should be bypassed as close to the device as possible with 0.01 F and 10 F capacitors. The SPT5140 has two analog (VEE) power supply pins. Both supply pins should be properly bypassed as mentioned previously. This device also has two analog (VCC) ground pins. Both ground pins should be tied to the analog ground plane. Power and ground pins must be connected in all applications. If a +5 V power source is required, the ground pins (VCC) become the positive supply pins while the supply pins (VEE) become the ground pins. The relative polarities of the other input and output voltages must be maintained.
SPT
SPT5140
5
3/28/00
REFERENCE CONSIDERATIONS The SPT5140 has two reference inputs (Ref In and ISet) and one reference output (Ref Out). The input pins are connected to the inverting and noninverting inputs of an internal amplifier that serves as a reference buffer. The output of the buffer amplifier is the reference for the current sinks. The amplifier feedback loop is connected around one of the current sinks to achieve better accuracy. (See figure 9.) Since the analog output currents are proportional to the digital input data and the reference current (ISet), the fullscale output may be adjusted by varying the reference current. ISet is controlled through the (ISet) input on the SPT5140. A method and equations to set ISet are shown in figure 2. The SPT5140 can use an external negative voltage reference. The external reference must be stable to achieve a satisfactory output and the Ref In should be driven through a resistor to minimize offsets caused by bias current. The value for ISet can be varied with the 500 to 1k trimmer to change the full-scale output. A double 50 ohm load (25 ohm) can be driven if ISet is increased by 50% above for doubly-terminated 75 ohm video applications.
DATA INPUTS AND VIDEO CONTROLS The SPT5140 has standard single-ended data inputs. The inputs are registered to produce the lowest differential data propagation delay (skew) to minimize glitching. There are also four video control inputs to generate composite video outputs. These are Sync, Blank, Bright and Reference White or Force High. Also provided is the Feedthrough control mentioned earlier. The controls and data inputs are all 10 KH and 100K ECL compatible. In addition, all have internal pulldown resistors to leave them at a logic low, so the pins are inactive when not used. This is useful if the devices are applied as standard DACs without the need for video controls or if less than eight bits are used. The SPT5140 is usually configured in the synchronous mode. In this mode, the controls and data are synchronized to prevent pixel dropout. This reduces screen-edge distortions and provides the lowest output noise while maintaining the highest conversion rate. By leaving the Feedthrough (FT) control open (low), each rising edge of the convert (CONV) clock latches decoded data and control values into a D-type internal register. The registered data is then converted into the appropriate analog output
Figure 3 - Timing Diagram
tPWH CONV -1.3 V CONV tPWL tS tH
-1.3 V
Data Control Inputs
tDST
1/2 LSB
tDSC
OUT -
OUT + tSI
1/2 LSB
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Table I - Video Control Operation (Output values for setup = 10 IRE and 75 ohm standard load)
Sync 1 0 0 0 0 0 0 0 Blank X 1 0 0 0 0 0 0 Ref White X X 1 1 0 0 0 0 Bright X X 1 0 0 0 1 1 Data Input X X X X 000... 111... 000... 111... Out - (mA) Out - (V) Out - (IRE) 28.57 20.83 0.00 1.95 19.40 1.95 17.44 0.00 -1.071 -0.781 0.000 -0.073 -0.728 -0.073 -0.654 0.000 -40 0 110 100 7.5 100 17.5 110 Description Sync Level Blank Level Enhanced High Level Normal High Level Normal Low Level Normal High Level Enhanced Low Level Enhanced High Level
by the switched current sinks. When FT is tied high, the control inputs and data are not registered. The analog output asynchronously tracks the input data and video controls. Feedthrough itself is asynchronous and usually used as a DC control. The controls and data have to be present at the input pins for a set-up time of tS before, and a hold time of tH after, the rising edge of the clock (CONV) in order to be synchronously registered. The set-up and hold times are not important in the asynchronous mode. The minimum pulse widths high (tPWH) and low (tPWL) as well as settling time become the limiting factors. (See figure 3.) The video controls produce the output levels needed for horizontal blanking, frame synchronization, etc., to be compatible with video system standards as described in Figure 4 - Video Output Waveform for Standard Load
IRE 110 100 0 mV -73 mV Bright
RS-343-A. Table I shows the video control effects on the analog output. Internal logic governs Blank, Sync and Force High so that they override the data inputs as needed in video applications. Sync overrides both the data and other controls to produce full negative video output (figure 4). Reference White video level output is provided by Force High, which drives the internal digital data to full-scale output or 100 IRE units. Bright gives an additional 10% of full-scale value to the output level. This function can be used in graphic displays for highlighting menus, cursors or warning messages. Again, if the devices are used in non-video applications, the video controls can be left open.
Normal High (White)
256 Gray Levels
Video
Normal Low (Black) 7.5 0 -728 mV -781 mV Blank
-40 -1071 mV
Sync
SPT
SPT5140
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Figure 5 - CONVert, CONVert Switching Levels
VIDF 0.0 V VICM MIN
Figure 6A - Standard Load
OUT - 75 COAX
Video Monitor
RS 75
RL 75
SPT5140
-1.3 V CONV VICM MAX CONV
RS 75 RL 75
OUT +
75 COAX
Inverse Video
CONVERT CLOCK For best performance, the clock should be ECL driven, differentially, by utilizing CONV and CONV (figure 5). By driving the clock this way, clock noise and power supply/ output intermodulation will be minimized. The rising edge of the clock synchronizes the data and control inputs to the SPT5140. Since the actual switching threshold of CONV is determined by CONV , the clock can be driven single-ended by connecting a bias voltage to CONV . The switching threshold of CONV is set by this bias voltage. ANALOG OUTPUTS The SPT5140 has two analog outputs that are high impedance, complementary current sinks. The outputs vary in proportion to the input data, controls and reference current values so that the full-scale output can be changed by setting ISet as mentioned earlier. In video applications, the outputs can drive a doubly terminated 50 or 75 ohm load to standard video levels. In the standard configuration of figure 6, the output voltage is the product of the output current and load impedance and is between 0 and -1.07 V. The Out- output (figure 4) will provide a video output waveform with the Sync pulse bottom at the -1.07 V level. The Out+ is inverted with Sync up.
Figure 6B - Test Load
OUT + OUT - CL <5 pF RL 37.5 Video Out 0 to -1 Volt
Figure 7 - Burn-In Circuit
-5.9 V (Max 200 mA) 6.5 6.5
24-Pin DIP All Resistors Are 5% 1/4 W cc Clock = -0.9 to -1.7 V, 100 kHz
VEE Out- 1 k -1.2 V (Max 1.5 mA) Ref In
(Max 50 mA)
(Max 50 mA) Out+ 100
100
1 k 1 k -1.3 V (Max 60 A) CONV CONV 1 k Clock (Max 60 A) VCC ISet (Max 1.5 mA)
SPT
SPT5140
8
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Figure 8 - Typical RGB Graphics System
SPT5140 (Master)
ISet
R
SPT5140 (Slave)
ISet
G
SPT5140 (Slave)
ISet
B
Ref Out
Ref In
Ref In
R1 500
R2 750 ISet Ref In
IRef
500
750 ISet 1k
500
750 ISet 1 k
TYPICAL RGB GRAPHICS SYSTEM
In an RGB graphics system, the color displayed is determined by the combined intensities of the red, green and blue (RGB) D/A converter outputs. A change in gain or offset in any of the RGB outputs will affect the apparent hue displayed on the CRT screen. Thus, it is very important that the outputs of the D/A converters track each other over a wide range of operating conditions. Since the D/A output is proportional to the product of the reference and digital input code, a common reference should be used to drive all three D/As in an RGB system to minimize RGB DAC-to-DAC mismatch and improve TC tracking. The SPT5140 contains an internal precision bandgap reference which completely eliminates the need for an external reference. The reference can supply up to 50 A to an external load, such as two other DAC reference inputs. The circuits shown in figure 8 illustrate how a single SPT5140 may be used as a master reference in a system with multiple DACs (such as RGB). The other DACs are simply slaved from the SPT5140's reference output.
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SPT5140
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Figure 9 - DAC Output Circuit
Current Sink #1
Current Sink #N
OUT + OUT -
Reference Amplifier
ISet
Reference Current
Ref In
+ -
ISEG
ISEG
VEE
Figure 10 - Equivalent Input Circuits - Data, Clock, Controls and Reference
CONV
Data and Controls
V
80 k
CONV IBias VEE
VEE
VCC
Ref In
ISet
Reference Segment Switch
IBias
IBias
IBias VEE
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SPT5140
10
3/28/00
PACKAGE OUTLINE
24-Lead PDIP
INCHES MIN MAX 0.125 0.015 0.100 typ 0.055 0.008 0.150 typ 0.600 0.530 1.245 0.070 0.190 0.135 0.022 0.065 0.012 0.625 0.550 1.255 0.080 MILLIMETERS MIN MAX 4.83 3.18 0.38 2.54 typ 1.40 0.20 3.81 typ 15.24 13.46 31.62 1.78 3.43 0.56 1.65 0.30 15.88 13.97 31.88 2.03
SYMBOL
K
A B C D E
24
I
F G H I J K
1
J H A G
B
F D
C
E
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PIN ASSIGNMENTS
PIN FUNCTIONS
Name Function Data Bit 3 Data Bit 2 Data Bit 1 Data Bit 0 (LSB) Negative Supply Convert Clock Input Convert Clock Input Complement Register Feedthrough Control Positive Supply Data Force High Control Video Blank Input Video Bright Input Video Sync Input Reference Output Reference Input Reference Current Output Current Negative Output Current Positive Data Bit 7 (MSB) Data Bit 6 Data Bit 5 Data Bit 4
D3 D2 D1 D0 VEE CONV CONV FT VCC FH Blank BRT
1 2 3 4 5 6 7 8 9 10 11 12
24 23 22 21 20 19 18 17 16 15 14 13
D4 D5 D6 D7 VEE Out + Out - VCC ISet Ref In
D3 D2 D1 D0 VEE CONV CONV FT VCC FH Blank
Ref Out
BRT
Sync
Sync Ref Out Ref In ISet Out - Out + D7 D6 D5 D4
ORDERING INFORMATION
PART NUMBER SPT5140SIN TEMPERATURE RANGE -25 to +85 C PACKAGE 24L PDIP
Signal Processing Technologies, Inc. reserves the right to change products and specifications without notice. Permission is hereby expressly granted to copy this literature for informational purposes only. Copying this material for any other use is strictly prohibited. WARNING - LIFE SUPPORT APPLICATIONS POLICY - SPT products should not be used within Life Support Systems without the specific written consent of SPT. A Life Support System is a product or system intended to support or sustain life which, if it fails, can be reasonably expected to result in significant personal injury or death. Signal Processing Technologies believes that ultrasonic cleaning of its products may damage the wire bonding, leading to device failure. It is therefore not recommended, and exposure of a device to such a process will void the product warranty.
SPT
SPT5140
12
3/28/00


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