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| SEMICONDUCTOR TECHNICAL DATA BILATERAL SWITCH FEATURES 250MHz-3dB bandwidth. Super High Speed tPD=2.7nS(Typ.) at VCC=5V. On Resistance ROH=3 (Typ.) at VCC=4.5V (VIN=0V, IIN=30mA.) Wide Operating Voltage Range : VCC(opr)=1.65~5.5V. A1 KIC7SZ66FU SILICON MONOLITHIC CMOS DIGITAL INTEGRATED CIRCUIT B B1 1 5 T.H.D : THD=0.11%(Typ.) at VCC=5V. 2 3 4 D MAXIMUM RATINGS (Ta=25 CHARACTERISTIC DC Supply Voltage Control Input Voltage Swith I/O Voltage Control Diode Current Output Diode Current DC VCC/Ground Current Power Dissipation Storage Temperature Range Lead Temperature (10s) ) SYMBOL VCC VIN VI/O ICK IOK ICC PD Tstg TL RATING -0.5~7.0 -0.5~7.0 -0.5~7.0 -50 50 100 200 -65 150 260 UNIT V V V mA mA mA mW H DIM A A1 B B1 C D G H T MILLIMETERS _ 2.00 + 0.20 _ 1.3 + 0.1 _ 2.1 + 0.1 _ 1.25 + 0.1 0.65 0.2+0.10/-0.05 0-0.1 _ 0.9 + 0.1 0.15+0.1/-0.05 A C C T G USV MARKING Type Name TH Logic Diagram C I/O X1 I I O/I PIN CONNECTION(TOP VIEW) TRUTH TABEL CONTROL H L SWITCH FUNCTION ON OFF IN/OUT 1 5 VCC OUT/IN 2 GND 3 4 CONT. 2003. 3. 11 Revision No : 1 1/4 KIC7SZ66FU RECOMMENDED OPERATING CONDIITIONS CHARACTERISTIC Supply Voltage Control Input Voltage Switch I/O Voltage Operating Temperature Input Rise and Fall Time SYMBOL VCC VIN VI/O Topr tr, tf 0 0 RATING 1.65 0 0 5.5 5.5 VCC UNIT V V V -40 85 10 (VCC=2.3~3.6V) 5 (VCC=4.5~5.5V) nS/V ELECTRICAL CHARACTERISTICS DC Characteristics TEST CONDITION CHARACTERISTIC SYMBOL VCC(V) 1.65~1.95 2.3~5.5 Low Level VIL VIN=0V, IIN=30mA VIN=2.4V, IIN=15mA VIN=4.5V, IIN=30mA VIN=0V, IIN=24mA Switch On Resistance (Note 1) RON VIN=3V, IIN=24mA VIN=0V, IIN=8mA VIN=2.3V, IIN=8mA VIN=0V, IIN=4mA VIN=1.8V, IIN=4mA On Resistance Flatness (Note 1) (Note 2) (Note 3) Input Leakage Current Power Off Leakage Current Quiescent Supply Current IA=-30mA, 0 VBn VCC Rflat IA=-24mA, 0 VBn VCC IA=-8mA, 0 VBn VCC IA=-4mA, 0 VBn VCC IIN IOFF ICC 0 0 VIN A,B =5.5V =VCC 3.0 4.5 1.65~1.95 2.3~5.5 MIN. Ta=25 TYP. MAX. 6 12 28 125 MIN. 0.75 VCC 0.7 VCC Ta=-40~85 TYP. (Note4) - MAX. 0.25 VCC 0.3 7 12 15 9 20 12 30 28 60 1.0 10.0 10 VCC UNIT High Level Input Voltage VIH - - V 3 5 7 4 10 5 13 7 25 0.05 0.05 0.05 A V 2.3 1.8 5.0 3.3 2.5 1.8 0~5.5 1.65~5.5 1.65~5.5 A A A VIN=VCC or GND IOUT=0 Note1 : Measured by the voltage drop between A and B pins at the indicated current through the switch. On Resistance is determined by the lower of the voltages on the two (A or B) pins. Note2 : Parameter is characterized but not tested in production. Note3 : Flatness is defined as the difference between the maximum and minimum value of On Resistance over the specified range of conditions. Note4 : All typical values are at the specified VCC, and Ta=25 2003. 3. 11 Revision No : 1 2/4 KIC7SZ66FU AC Characteristics CHARACTERISTIC SYMBOL TEST CONDITION VCC(V) 1.65~1.95 Propagation Delay Bus to Bus (Figures 1,2) tPHL tPLH VIN=OPEN 2.3~2.7 3.0~3.6 4.5~5.5 1.65~1.95 Output Enable Time (Figures 1,2) tPZL tPZH VIN=2 VCC for tPZL VIN=0V for tPZH 2.3~2.7 3.0~3.6 4.5~5.5 1.65~1.95 Output Disable Time (Figures 1,2) tPLZ tPHZ VIN=2 VCC for tPLZ VIN=0V for tPHZ 2.3~2.7 3.0~3.6 4.5~5.5 Charge Injection (Figures 3) Off lsolation (Figures 4) -3dB Bandwidth (Figures 5) Total Harmonic Distortion Q OIRR BW THD CL=0.1nF, VGEN=0V, RGEN=0 , f=1MHz RL=50 , CL=5pF, f=10MHz RL=50 RL=600 , 0.5VP-P f=600Hz~20kHz 1.65~5.5 1.65~5.5 1.65~5.5 5 Ta=-40 ~85 , CL=50pF, RU=RD=500 MIN. 1.5 1.5 1.5 1.5 1.5 1.5 1.5 1.5 TYP. 7.0 3.3 2.4 2.0 9.2 5.3 4.0 2.7 0.05 -50 >250 0.011 MAX. 4.3 1.2 0.8 0.3 14.2 7.0 5.5 4.5 18.2 9.0 7.0 5.0 pC dB MHz % ns ns ns UNIT Capacitance Symbol CIN CI/O Parameter Control Pin Input Capacitance Input/Output Capacitance Typ. 2 6 Max. Units pF pF Conditions VCC=0V VCC=5.0V 2003. 3. 11 Revision No : 1 3/4 KIC7SZ66FU AC Loading and Waveforms VI RU SWITCH INPUT ENABLE INPUT A B SWITCH OUTPUT CL RD DE Input driven by 50 source terminated in 50 CL includes load and stray capacitance. Input PRR=1.0MHz ; t w =500ns FIGURE 1. AC Test Circuit t r =2.5ns t r =2.5ns SWITCH INPUT tw t PLH t f =2.5ns 90% 50% 10% t PHL VOH OUTPUT 50% 50% VOL OUTPUT t PZH VCC ENABLE INPUT t PZL GND OUTPUT 50% t f =2.5ns 90% 50% 10% t PLZ VCC GND VTRI VOL +0.3V t PHZ VOL VOH 50% VOH - 0.3V VTRI FIGURE 2. AC Waveforms RGEN BN SE1 A RL 1M VOUT CL 0.1nF LOGIC INPUT OFF ON OFF V OUT V GEN VOUT Q=( V OUT )(C L ) Logic Input FIGURE 3. Charge Injection Test 10nF 10nF VCC SE B 50 GND LOGIC INPUT =VCC LOGIC INPUT =VCC SIGNAL GENERATOR 0dBm VCC A B 50 Analyzer SE GND A 50 FIGURE 4. Off lsolation FIGURE 5. Bandwidth 2003. 3. 11 Revision No : 1 4/4 |
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