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bq2002E/G
NiCd/NiMH Fast-Charge Management ICs
Features
(R) Fast charge of nickel cadmium or nickel-metal hydride batteries Direct LED output displays charge status Fast-charge termination by -V, maximum voltage, maximum temperature, and maximum time Internal band-gap voltage reference Optional top-off charge Selectable pulse trickle charge rates Low-power mode 8-pin 300-mil DIP or 150-mil SOIC
General Description
The bq2002E and bq2002G FastCharge ICs are low-cost CMOS battery-charge controllers providing reliable charge termination for both NiCd and NiMH battery applications. Controlling a current-limited or constant-current supply allows t h e bq2002E/G to be the basis for a costeffective stand-alone or system-integrated charger. The bq2002E/G integrates fast charge with optional top-off and pulsed- trickle control in a single IC for charging one or more NiCd or NiMH battery cells. Fast charge is initiated on application of the charging supply or battery replacement. For safety, fast charge is inhibited if the battery temperature and voltage are outside configured limits.
Fast charge is terminated by any of the following:
n n n n n
Peak voltage detection (PVD) Negative delta voltage (-V) Maximum voltage Maximum temperature Maximum time
(R) (R)
(R) (R) (R) (R) (R)
After fast charge, the bq2002E/G optionally tops-off and pulse-trickles the battery per the pre-configured limits. Fast charge may be inhibited using the INH pin. The bq2002E/G may also be placed in low-standby-power mode to reduce system power consumption. T h e bq2002E differs from t h e bq2002G only in that a slightly different set of fast-charge and top-off time limits is available. All differences between the two ICs are illustrated in Table 1.
Pin Connections
TM LED BAT VSS 1 2 3 4 8 7 6 5 CC
Pin Names
TM LED
INH VCC TS
Timer mode select input Charging status output Battery voltage input System ground
TS VCC INH CC
Temperature sense input Supply voltage input Charge inhibit input Charge control output
BAT VSS
8-Pin DIP or Narrow SOIC
PN-200201.eps
bq2002E/G Selection Guide
Part No. LBAT TCO 0.5 VCC 0.5 VCC HTF 0.6 VCC 0.6 VCC LTF None -V PVD Fast Charge C/2 1C 2C C/2 1C 2C tMTO 200 80 40 160 80 40 Top-Off None C/16 None None C/16 None Maintenance C/32 C/32 C/32 C/32 C/32 C/32 bq2002E 0.175 VCC bq2002G 0.175 VCC
None
SLUS132 - FEBRUARY 1999
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bq2002E/G
Pin Descriptions
TM Timer mode input A three-level input that controls the settings for the fast charge safety timer, voltage termination mode, top-off, pulse-trickle, and voltage hold-off time. LED Charging output status Open-drain output that indicates the charging status. BAT Battery input voltage The battery voltage sense input. The input to this pin is created by a high-impedance resistor divider network connected between the positive and negative terminals of the battery. VSS TS System ground Temperature sense input Input for an external battery temperature monitoring thermistor. VCC Supply voltage input 5.0V 20% power input. INH Charge inhibit input When high, INH suspends the fast charge in progress. When returned low, the IC reCC sumes operation at the point where initially suspended. Charge control output An open-drain output used to control the charging current to the battery. CC switching to high impedance (Z) enables charging current to flow, and low to inhibit charging current. CC is modulated to provide top-off, if enabled, and pulse trickle.
Functional Description
Figure 2 shows a state diagram and Figure 3 shows a block diagram of the bq2002E/G.
Battery Voltage and Temperature Measurements
Battery voltage and temperature are monitored for maximum allowable values. The voltage presented on the battery sense input, BAT, should represent a single-cell potential for the battery under charge. A resistor-divider ratio of RB1 =N-1 RB2 is recommended to maintain the battery voltage within the valid range, where N is the number of cells, RB1 is the resistor connected to the positive battery terminal, and RB2 is the resistor connected to the negative battery terminal. See Figure 1. Note: This resistor-divider network input impedance to end-to-end should be at least 200k and less than 1 M.
VCC RT PACK +
RB1 BAT
R3 TM
VCC TS N T C
bq2002E/G
VSS
RB2
R4
bq2002E/G
VSS
BAT pin connection
Mid-level setting for TM
Thermistor connection
NTC = negative temperature coefficient thermistor.
Fg2002E/G01.eps
Figure 1. Voltage and Temperature Monitoring and TM Pin Configuration
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bq2002E/G
Chip on 4.0V VCC Battery Voltage too High? VBAT < 2V Battery Voltage too Low? 0.175 VCC < VBAT VTS > 0.6 VCC Battery Temperature? VTS < 0.6 VCC Charge Pending Fast LED = Low VBAT > 2V or VTS < VCC/2 or ((PVD or - V or Maximum Time Out) Low) and TM Trickle LED = Flash VBAT > 2V VBAT < 0.175 VCC
VBAT > 2V
(PVD or - V or Maximum Time Out) and TM = Low
Top-off LED = Z
VBAT > 0.175 VCC, VBAT < 2V, and VTS > VCC/2
VBAT Trickle LED = Z
2V
VBAT 2V or VTS VCC/2 or Maximum Time Out
SD2002C.eps
Figure 2. State Diagram
OSC
Clock Phase Generator Timing Control Sample History Voltage Reference
TM INH
Charge-Control State Machine
PVD, - V ALU
A to D Converter LBAT Check
Power-On Reset CC LED
HTF TCO Check Check TS
Power Down VCC
MCV Check
BAT
VSS
Bd2002CEG.eps
Figure 3. Block Diagram
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bq2002E/G
VCC = 0
Fast Charging
Top-Off (optional)
Pulse-Trickle
Fast Charging
CC Output
73ms
See Table 1
1.17s
1.17s
Charge initiated by application of power Charge initiated by battery replacement LED
TD2002EG.eps
Figure 4. Charge Cycle Phases
A ground-referenced negative temperature coefficient thermistor placed near the battery may be used as a low-cost temperature-to-voltage transducer. The temperature sense voltage input at TS is developed using a resistorthermistor network between VCC and VSS. See Figure 1. 1. Application of power to VCC or 2. Voltage at the BAT pin falling through the maximum cell voltage VMCV where VMCV = 2V 5%. If the battery is within the configured temperature and voltage limits, the IC begins fast charge. The valid battery voltage range is VLBAT < VBAT < VMCV, where
Starting A Charge Cycle
Either of two events starts a charge cycle (see Figure 4):
Table 1. Fast-Charge Safety Time/Hold-Off/Top-Off Table
Typical FastCharge and Top-Off Time Limits (minutes)
Corresponding Fast-Charge Rate C/2 1C 2C Notes:
TM Mid Low High
Termination PVD PVD -V
Typical PVD and -V Hold-Off Time bq2002E bq2002G (seconds) 200 80 40 160 80 40 300 150 75
Top-Off Rate Disabled C/16 Disabled
PulseTrickle Rate C/32 C/32 C/32
PulseTrickle Width (ms) 73 37 18
Maximum Synchronized Sampling Period (seconds) 18.7 18.7 9.4
Typical conditions = 25C, VCC = 5.0V Mid = 0.5 * VCC 0.5V Tolerance on all timing is 12%.
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bq2002E/G
VLBAT = 0.175 VCC 20% The valid temperature range is VTS > VHTF where VHTF = 0.6 VCC 5%. If the battery voltage or temperature is outside of these limits, the IC pulse-trickle charges until the next new charge cycle begins. If VMCV < VBAT < VPD (see "Low-Power Mode") when a new battery is inserted, a delay of 0.35 to 0.9s is imposed before the new charge cycle begins. Fast charge continues until termination by one or more of the five possible termination conditions:
n n n n n
The response of the IC to pulses less than 100ns in width or between 3.5ms and 12ms is indeterminate. Tolerance on all timing is 12%.
Voltage Termination Hold-off
A hold-off period occurs at the start of fast charging. During the hold-off time, the PVD and -V terminations are disabled. This avoids premature termination on the voltage spikes sometimes produced by older batteries when fast-charge current is first applied. Maximum voltage and temperature terminations are not affected by the hold-off period.
Maximum Voltage, Temperature, and Time
Any time the voltage on the BAT pin exceeds the maximum cell voltage,VMCV, fast charge or optional top-off charge is terminated. Maximum temperature termination occurs anytime the voltage on the TS pin falls below the temperature cut-off threshold VTCO where VTCO = 0.5 VCC 5%. Maximum charge time is configured using the TM pin. Time settings are available for corresponding charge rates of C/2, 1C, and 2C. Maximum time-out termination is enforced on the fast-charge phase, then reset, and enforced again on the top-off phase, if selected. There is no time limit on the trickle-charge phase.
Peak voltage detection (PVD) Negative delta voltage (-V) Maximum voltage Maximum temperature Maximum time
PVD and -V Termination
There are two modes for voltage termination, depending on the state of TM. For -V (TM = high), if VBAT is lower than any previously measured value by 12mV 3mV, fast charge is terminated. For PVD (TM = low or mid), a decrease of 2.5mV 2.5mV terminates fast charge. The PVD and -V tests are valid in the range 1V < VBAT < 2V .
Top-off Charge
An optional top-off charge phase may be selected to follow fast charge termination for 1C and C/2 rates. This phase may be necessary on NiMH or other battery chemistries that have a tendency to terminate charge before reaching full capacity. With top-off enabled, ch arging continues a t a r educed r ate after fast-charge termination for a period of time selected by the TM pin. (See Table 1.) During top-off, the CC pin is modulated at a duty cycle of 73ms active for every 1097ms inactive. This modulation results in an average rate 1/16th that of the fast charge rate. Maximum voltage, time, and temperature are the only termination methods enabled during top-off.
Synchronized Voltage Sampling
Voltage sampling at the BAT pin for PVD and -V termination may be synchronized to an external stimulus using the INH input. Low-high-low input pulses between 100ns and 3.5ms in width must be applied at the INH pin with a frequency greater than the "maximum synchronized sampling period" set by the state of the TM pin as shown in Table 1. Voltage is sampled on the falling edge of such pulses. If the time between pulses is greater than the synchronizing period, voltage sampling "free-runs" at once every 17 seconds. A sample is taken by averaging together voltage measurements taken 57s apart. The IC takes 32 measurements in PVD mode and 16 measurements in -V mode. The resulting sample periods (9.17 and 18.18ms, respectively) filter out harmonics centered around 55 and 109Hz. This technique minimizes the effect of any AC line ripple that may feed through the power supply from either 50 or 60Hz AC sources. If the INH input remains high for more than 12ms, the voltage sample history kept by the IC and used for PVD and -V termination decisions is erased and a new history is started. Such a reset is required when transitioning from free-running to synchronized voltage sampling.
Pulse-Trickle Charge
Pulse-trickle is used to compensate for self-discharge while the battery is idle in the charger. The battery is pulse-trickle charged by driving the CC pin active once every 1.17s for the period specified in Table 1. This results in a trickle rate of C/32.
TM Pin
The TM pin is a three-level pin used to select the charge timer, top-off, voltage termination mode, trickle
5
bq2002E/G
rate, and voltage hold-off period options. Table 1 describes the states selected by the TM pin. The midlevel selection input is developed by a resistor divider between VCC and ground that fixes the voltage on TM at VCC/2 0.5V. See Figure 4.
Low-Power Mode
The IC enters a low-power state when VBAT is driven above the power-down threshold (VPD) where VPD = VCC - (1V 0.5V) Both the CC pin and the LED pin are driven to the high-Z state. The operating current is reduced to less than 1A in this mode. When VBAT returns to a value below VPD, the IC pulse-trickle charges until the next new charge cycle begins.
Charge Status Indication
A fast charge in progress is uniquely indicated when the LED pin goes low. The LED pin is driven to the high-Z state for all conditions other than fast charge. Figure 2 outlines the state of the LED pin during charge.
Charge Inhibit
Fast charge and top-off may be inhibited by using the INH pin. When high, INH suspends all fast charge and top-off activity and the internal charge timer. INH freezes the current state of LED until inhibit is removed. Temperature monitoring is not affected by the INH pin. During charge inhibit, the bq2002E/G continues to pulse-trickle charge the battery per the TM selection. When INH returns low, charge control and the charge timer resume from the point where INH became active.
6
bq2002E/G
Absolute Maximum Ratings
Symbol VCC VT TOPR TSTG TSOLDER TBIAS Note: Parameter VCC relative to VSS DC voltage applied on any pin excluding VCC relative to VSS Operating ambient temperature Storage temperature Soldering temperature Temperature under bias Minimum -0.3 -0.3 0 -40 -40 Maximum +7.0 +7.0 +70 +85 +260 +85 Unit V V C C C C 10 sec max. Commercial Notes
Permanent device damage may occur if Absolute Maximum Ratings are exceeded. Functional operation should be limited to the Recommended DC Operating Conditions detailed in this data sheet. Exposure to conditions beyond the operational limits for extended periods of time may affect device reliability.
DC Thresholds
Symbol VTCO VHTF VMCV VLBAT -V PVD
(TA = 0 to 70C; VCC 20%)
Parameter Temperature cutoff High temperature fault Maximum cell voltage Minimum cell voltage BAT input change for -V detection BAT input change for PVD detection
Rating 0.5 * VCC 0.6 VCC 2 0.175 VCC -12 -2.5
Tolerance 5% 5% 5% 20% 3 2.5
Unit V V V V mV mV
Notes VTS VTCO inhibits/terminates fast charge and top-off VTS < VHTF inhibits fast charge start VBAT VMCV inhibits/terminates fast charge and top-off VBAT < VLBAT inhibits fast charge start
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bq2002E/G
Recommended DC Operating Conditions (TA = 0 to 70C)
Symbol VCC VDET VBAT VTS VIH Condition Supply voltage -V PVD detect voltage , Battery input Thermistor input Logic input high Logic input high VIM Logic input mid Minimum 4.0 1 0 0.5 0.5 VCC - 0.5 VCC 2 VIL Logic input low Logic input low VOL VPD Logic output low Power down - 0.5 VCC - 1.5 Typical 5.0 VCC 2 Maximum 6.0 2 VCC VCC + 0.5 Unit V V V V V V V VTS < 0.5V prohibited INH TM TM Notes
0.1 0.5 0.8 VCC - 0.5
V V V V
INH TM LED, CC, IOL = 10mA VBAT VPD max. powers down bq2002E/G; VBAT < VPD min. = normal operation. Outputs unloaded, VCC = 5.1V VCC = 5.1V, VBAT = VPD @ OL = VSS + 0.8V V INH, CC, V = VSS to VCC LED, CC
ICC
Supply current
-
-
500
A A mA A A
I SB I OL IL I OZ
Standby current LED, CC sink Input leakage Output leakage in high-Z state All voltages relative to VSS.
10 -5
-
1 1 -
Note:
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bq2002E/G
Impedance
Symbol RBAT RTS Parameter Battery input impedance TS input impedance Minimum 50 50 Typical Maximum Unit M M
Timing
Symbol dFCV t DLY Note:
(TA = 0 to +70C; VCC 10%)
Parameter Time base variation Start-up delay
Minimum -12 0.35
Typical -
Maximum 12 0.9
Unit % s
Notes
Starting from VMCV < VBAT < VPD
Typical is at TA = 25C, VCC = 5.0V.
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bq2002E/G
8-Pin DIP (PN)
8-Pin PN (0.300" DIP)
Inches Dimension
D
Millimeters Min. 4.06 0.38 0.38 1.40 0.20 8.89 7.62 5.84 7.62 2.29 2.92 0.51 Max. 4.57 1.02 0.56 1.65 0.33 9.65 8.26 7.11 9.40 2.79 3.81 1.02
Min. 0.160 0.015 0.015 0.055 0.008 0.350 0.300 0.230 0.300 0.090 0.115 0.020
Max. 0.180 0.040 0.022 0.065 0.013 0.380 0.325 0.280 0.370 0.110 0.150 0.040
A A1 B
E1 E A1 L C A B1
B1 C D E E1 e G
S B G
L S
e
8-Pin SOIC Narrow (SN)
8-Pin SN (0.150" SOIC)
Inches Dimension A A1 B C D E e H L Min. 0.060 0.004 0.013 0.007 0.185 0.150 0.045 0.225 0.015 Max. 0.070 0.010 0.020 0.010 0.200 0.160 0.055 0.245 0.035 Millimeters Min. 1.52 0.10 0.33 0.18 4.70 3.81 1.14 5.72 0.38 Max. 1.78 0.25 0.51 0.25 5.08 4.06 1.40 6.22 0.89
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