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| WM8763/4/5 24-bit, 192kHz 6-Channel DAC DESCRIPTION The WM8763/4/5 are multi-channel audio DACs ideal for DVD and surround sound processing applications for home hi-fi, automotive and other audio visual equipment. Three stereo 24-bit multi-bit sigma delta DACs are used with oversampling digital interpolation filters. Digital audio input word lengths from 16-32 bits and sampling rates from 8kHz to 192kHz are supported. The audio data interface supports either 16-24-bit I S, 1624-bit left justified, or 24-bit right justified digital audio formats. The devices are controlled directly using the hardware interface. All members of the family are available in a 20-pin SSOP. 2 FEATURES * * * * * 6-Channel DAC with PCM. Audio Performance - 103dB SNR (`A' weighted @ 48kHz) DAC DAC Sampling Frequency: 8kHz - 192kHz Hardware Control Interface Choice of Audio Data Interface Modes - - * * * WM8763: 16-24-bit I2S WM8764: 16-24-bit Left Justified - WM8765: 16-24-Bit Right Justified Slave Audio Data Interface 2.7V to 5.5V Analogue, 2.7V to 3.6V Digital supply Operation 20 pin SSOP Package APPLICATIONS * * * DVD Players Surround Sound AV Processors and Hi-Fi systems Automotive Audio BLOCK DIAGRAM WOLFSON MICROELECTRONICS plc w :: www.wolfsonmicro.com Product Preview, October 2003 Rev 1.4 Copyright 2003 Wolfson Microelectronics plc WM8763/4/5 TABLE OF CONTENTS Product Preview DESCRIPTION ................................................................................................................1 FEATURES......................................................................................................................1 APPLICATIONS ..............................................................................................................1 BLOCK DIAGRAM ..........................................................................................................1 TABLE OF CONTENTS ..................................................................................................2 PIN CONFIGURATION 20 LEAD SSOP ........................................................................3 ORDERING INFORMATION ...........................................................................................3 PIN DESCRIPTION - 20 PIN SSOP ...............................................................................4 ABSOLUTE MAXIMUM RATINGS..................................................................................5 RECOMMENDED OPERATING CONDITIONS ..............................................................6 MASTER CLOCK TIMING .......................................................................................................7 DIGITAL AUDIO INTERFACE .................................................................................................8 DEVICE DESCRIPTION..................................................................................................9 INTRODUCTION .....................................................................................................................9 AUDIO DATA SAMPLING RATES...........................................................................................9 DIGITAL AUDIO INTERFACE ...............................................................................................10 DIGITAL FILTER CHARACTERISTICS ........................................................................12 DAC FILTER RESPONSES ..........................................................................................12 DIGITAL DE-EMPHASIS CHARACTERISTICS.....................................................................13 APPLICATIONS INFORMATION ..................................................................................14 RECOMMENDED EXTERNAL COMPONENTS ....................................................................14 RECOMMENDED EXTERNAL COMPONENTS VALUES .....................................................14 SUGGESTED ANALOGUE LOW PASS POST DAC FILTERS .............................................15 PACKAGE DRAWING...................................................................................................16 IMPORTANT NOTICE ...................................................................................................17 ADDRESS: ............................................................................................................................17 w PP Rev 1.4 October 2003 2 Product Preview WM8763/4/5 PIN CONFIGURATION 20 LEAD SSOP ORDERING INFORMATION DEVICE WM8763EDS WM8763GEDS WM8763EDS/R WM8763GEDS/R TEMP. RANGE -25 to +85oC -25 to +85 C -25 to +85oC -25 to +85oC o PACKAGE 20-pin SSOP 20-pin SSOP (lead free) 20-pin SSOP (tape and reel) 20-pin SSOP (lead free, tape and reel) MOISTURE SENSITIVITY LEVEL MSL1 MSL1 MSL1 MSL1 DEVICE WM8764EDS WM8764GEDS WM8764EDS/R WM8764GEDS/R TEMP. RANGE -25 to +85oC -25 to +85oC -25 to +85oC -25 to +85oC PACKAGE 20-pin SSOP 20-pin SSOP (lead free) 20-pin SSOP (tape and reel) 20-pin SSOP (lead free, tape and reel) MOISTURE SENSITIVITY LEVEL MSL1 MSL1 MSL1 MSL1 DEVICE WM8765EDS WM8765GEDS WM8765EDS/R WM8765GEDS/R Note: Reel quantity = 2,000 TEMP. RANGE -25 to +85 C -25 to +85 C -25 to +85oC -25 to +85oC o o PACKAGE 20-pin SSOP 20-pin SSOP (lead free) 20-pin SSOP (tape and reel) 20-pin SSOP (lead free, tape and reel) MOISTURE SENSITIVITY LEVEL MSL1 MSL1 MSL1 MSL1 w PP Rev 1.4 October 2003 3 WM8763/4/5 PIN DESCRIPTION - 20 PIN SSOP PIN 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 NAME AVDD MCLK BCLK LRCLK DVDD DGND1 DIN1 DIN2 DIN3 REFGND VREFN VREFP VMID VOUT1L VOUT1R VOUT2L VOUT2R VOUT3L VOUT3R AGND TYPE Supply Digital input Digital input Digital input Digital supply Digital ground Digital input Digital input Digital input Digital input Analogue Input Analogue Input Analogue output Analogue output Analogue output Analogue output Analogue output Analogue output Analogue output Supply Analogue positive supply DESCRIPTION Product Preview Master clock; 128, 192, 256, 384, 512 or 768fs (fs = word clock frequency) Audio interface bit clock Audio left/right word clock Digital positive supply Digital Negative supply 1 DAC channel 1 data input DAC channel 2 data input DAC channel 3 data input Ground Reference DAC negative reference supply DAC positive reference supply Midrail divider decoupling pin; 10uF external decoupling DAC channel 1 left output DAC channel 1 right output DAC channel 2 left output DAC channel 2 right output DAC channel 3 left output DAC channel 3 right output Analogue negative and substrate connection Note : Digital input pins have Schmitt trigger input buffers. w PP Rev 1.4 October 2003 4 Product Preview WM8763/4/5 ABSOLUTE MAXIMUM RATINGS Absolute Maximum Ratings are stress ratings only. Permanent damage to the device may be caused by continuously operating at or beyond these limits. Device functional operating limits and guaranteed performance specifications are given under Electrical Characteristics at the test conditions specified. ESD Sensitive Device. This device is manufactured on a CMOS process. It is therefore generically susceptible to damage from excessive static voltages. Proper ESD precautions must be taken during handling and storage of this device. Wolfson tests its package types according to IPC/JEDEC J-STD-020B for Moisture Sensitivity to determine acceptable storage conditions prior to surface mount assembly. These levels are: MSL1 = unlimited floor life at <30C / 85% Relative Humidity. Not normally stored in moisture barrier bag. MSL2 = out of bag storage for 1 year at <30C / 60% Relative Humidity. Supplied in moisture barrier bag. MSL3 = out of bag storage for 168 hours at <30C / 60% Relative Humidity. Supplied in moisture barrier bag. The Moisture Sensitivity Level for each package type is specified in Ordering Information. CONDITION Digital supply voltage Analogue supply voltage Voltage range digital inputs Voltage range analogue inputs Master Clock Frequency Operating temperature range, TA Storage temperature after soldering Package body temperature (soldering 10 seconds) Package body temperature (soldering 2 minutes) Notes: 1. Analogue and digital grounds must always be within 0.3V of each other for normal operation of the device. -25C -65C MIN -0.3V -0.3V AGND -0.3V AGND -0.3V MAX +5V +7V DVDD +0.3V AVDD +0.3V 37MHz +85C +150C +240C +183C w PP Rev 1.4 October 2003 5 WM8763/4/5 RECOMMENDED OPERATING CONDITIONS PARAMETER Digital supply range Analogue supply range Ground SYMBOL DVDD AVDD, VREFP GND, VREFN TEST CONDITIONS MIN 2.7 2.7 0 TYP MAX 3.6 5.5 Product Preview UNIT V V V Note: Digital supply DVDD must never be more than 0.3V greater than AVDD for normal operation of the device. ELECTRICAL CHARACTERISTICS Test Conditions o AVDD, VREFP = 5V, DVDD = 3.3V, GND, VREFN = 0V, TA = +25 C, fs = 48kHz, MCLK = 256fs, unless otherwise stated. PARAMETER Input LOW level Input HIGH level Output LOW Output HIGH Analogue Reference Levels Reference voltage Potential divider resistance 0dBFs Full scale output voltage SNR (Note 1,2,4) SNR (Note 1,2,4) SNR (Note 1,2,4) SNR (Note 1,2,4) A-weighted, @ fs = 48kHz A-weighted @ fs = 96kHz A-weighted @ fs = 192kHz A-weighted @ fs = 48kHz, AVDD = 3.3V A-weighted @ fs = 96kHz, AVDD = 3.3V DNR A-weighted, -60dB full scale input 1kHz, 0dBFs 1kHz Input, 0dB gain PSRR 1kHz 100mVpp 20Hz to 20kHz 100mVp-p Supply Current Analogue supply current Digital Supply Current AVDD = 5V DVDD = 3.3V 13.8 11 mA mA 95 95 VVMID RVMID VREFP/2 100k 1.0 x VREFP/5 103 101 101 101 V Vrms dB dB dB dB SYMBOL VIL VIH VOL VOH IOL=1mA IOH= -1mA 0.9 x DVDD 0.7 x DVDD 0.1 x DVDD TEST CONDITIONS MIN TYP MAX 0.3 x DVDD UNIT V V V V Digital Logic Levels (CMOS Levels) DAC Performance (Load = 10k, 50pF) SNR (Note 1,2,4) 96 dB Dynamic Range (Note 2,4) Total Harmonic Distortion (THD) (Note 4) Mute Attenuation DAC channel separation Power Supply Rejection Ratio 103 -90 100 100 50 45 -85 dB dB dB dB dB dB w PP Rev 1.4 October 2003 6 Product Preview Notes: 1. 2. WM8763/4/5 Ratio of output level with 1kHz full scale input, to the output level with all zeros into the digital input, measured `A' weighted. All performance measurements done with 20kHz low pass filter, and where noted an A-weight filter. Failure to use such a filter will result in higher THD+N and lower SNR and Dynamic Range readings than are found in the Electrical Characteristics. The low pass filter removes out of band noise; although it is not audible it may affect dynamic specification values. VMID decoupled with 10uF and 0.1uF capacitors (smaller values may result in reduced performance). The performance of each DAC is measured separately 3. 4. TERMINOLOGY 1. 2. Signal-to-noise ratio (dB) - SNR is a measure of the difference in level between the full scale output and the output with no signal applied. (No Auto-zero or Automute function is employed in achieving these results). Dynamic range (dB) - DNR is a measure of the difference between the highest and lowest portions of a signal. Normally a THD+N measurement at 60dB below full scale. The measured signal is then corrected by adding the 60dB to it. (e.g. THD+N @ -60dB= -32dB, DR= 92dB). THD+N (dB) - THD+N is a ratio, of the rms values, of (Noise + Distortion)/Signal. Stop band attenuation (dB) - Is the degree to which the frequency spectrum is attenuated (outside audio band). Channel Separation (dB) - Also known as Cross-Talk. This is a measure of the amount one channel is isolated from the other. Normally measured by sending a full scale signal down one channel and measuring the other. Pass-Band Ripple - Any variation of the frequency response in the pass-band region. 3. 4. 5. 6. MASTER CLOCK TIMING t MCLKL MCLK t MCLKH t MCLKY Figure 1 DAC Master Clock Timing Requirements Test Conditions AVDD, VREFP = 5V, DVDD = 3.3V, GND, VREFN = 0V, TA = +25oC, fs = 48kHz, DACMCLK and ADCMCLK = 256fs unless otherwise stated. PARAMETER System Clock Timing Information MCLK System clock pulse width high MCLK System clock pulse width low MCLK System clock cycle time MCLK Duty cycle Table 1 Master Clock Timing Requirements tMCLKH tMCLKL tMCLKY 11 11 28 40:60 60:40 ns ns ns SYMBOL TEST CONDITIONS MIN TYP MAX UNIT w PP Rev 1.4 October 2003 7 WM8763/4/5 DIGITAL AUDIO INTERFACE Product Preview BCLK WM8763/4/5 LRCLK DAC DIN1/2/3 3 DSP/ DECODER Figure 2 Audio Interface tBCH BCLK tBCY LRCLK tBCL tDS DIN1/2/3 tLRH tLRSU Figure 3 Digital Audio Data Timing - Slave Mode Test Conditions AVDD = 5V, DVDD = 3.3V, AGND = 0V, DGND = 0V, TA = +25oC, fs = 48kHz, MCLK = 256fs unless otherwise stated. PARAMETER BCLK cycle time BCLK pulse width high BCLK pulse width low LRCLK set-up time to BCLK rising edge LRCLK hold time from BCLK rising edge DIN1/2/3 set-up time to BCLK rising edge DIN1/2/3 hold time from BCLK rising edge SYMBOL tBCY tBCH tBCL tLRSU tLRH tDS tDH TEST CONDITIONS MIN 50 20 20 10 10 10 10 TYP MAX UNIT ns ns ns ns ns ns ns Audio Data Input Timing Information Table 2 Digital Audio Data Timing - Slave Mode w PP Rev 1.4 October 2003 8 Product Preview WM8763/4/5 DEVICE DESCRIPTION INTRODUCTION WM8763/4/5 is a complete 6-channel DAC including digital interpolation and decimation filters and switched capacitor multi-bit sigma delta DACs with digital volume controls on each channel and output smoothing filters. The device is implemented as 3 separate stereo DACs in a single package and controlled by a single interface. Each stereo DAC has its own data input DIN1/2/3. DAC word clock LRCLK and DAC bit clock BCLK and DAC master clock MCLK are shared between them. Operation using master clocks of 128fs, 192fs, 256fs, 384fs, 512fs or 768fs is provided for the DAC. The selection between clock rates is automatically controlled. Audio sample rates (fs) from less than 8ks/s up to 192ks/s are allowed for the DAC, provided the appropriate master clock is input. The audio data interface supports right, left and I2S interface formats. AUDIO DATA SAMPLING RATES In a typical digital audio system there is only one central clock source producing a reference clock to which all audio data processing is synchronised. This clock is often referred to as the audio system's Master Clock. The external master system clock can be applied directly through the MCLK input pin(s) with no software configuration necessary. The DAC master clock for WM8763/4/5 supports audio sampling rates from 128fs to 768fs, where fs is the audio sampling frequency (LRCLK) typically 32kHz, 44.1kHz, 48kHz, 96kHz or 192kHz. The master clock is used to operate the digital filters and the noise shaping circuits. In Slave mode the WM8763/4/5 has a master clock detection circuit that automatically determines the relationship between the system clock frequency and the sampling rate (to within +/- 32 master clocks). If there is a greater than 32 clocks error the interface defaults to 768fs mode. The WM8763/4/5 is tolerant of phase variations or jitter on the master clock. Table 3 shows the typical master clock frequency inputs for the WM8763/4/5. The signal processing for the WM8763/4/5 typically operates at an oversampling rate of 128fs. The exception to this is for operation with a 128/192fs system clock, e.g. for 192kHz operation, when the oversampling rate is 64fs. SAMPLING RATE (LRCLK) 32kHz 44.1kHz 48kHz 96kHz 192kHz System Clock Frequency (MHz) 128fs 4.096 5.6448 6.144 12.288 24.576 192fs 6.144 8.467 9.216 18.432 36.864 256fs 8.192 11.2896 12.288 24.576 384fs 12.288 16.9340 18.432 36.864 512fs 16.384 22.5792 24.576 768fs 24.576 33.8688 36.864 Unavailable Unavailable Unavailable Unavailable Unavailable Unavailable Table 3 System Clock Frequencies Versus Sampling Rate w PP Rev 1.4 October 2003 9 WM8763/4/5 DIGITAL AUDIO INTERFACE SLAVE MODE The audio interface operates in Slave mode. The default is Slave mode. Product Preview In Slave mode, LRCLK and BCLK are inputs to the WM8763/4/5 (Figure 4). DIN1/2/3 and LRCLK are sampled by the WM8763/4/5 on the rising edge of BCLK. BCLK WM8763/4/5 LRCLK DAC DIN1/2/3 3 DSP/ DECODER Figure 4 Slave Mode AUDIO INTERFACE FORMATS Audio data is applied to the internal DAC filters via the Digital Audio Interface. Five popular interface formats are supported: * * * Left Justified mode Right Justified mode I2S mode All 3 formats send the MSB first and support word lengths of 16, 20, and 24. In left justified, right justified and I2S modes, the digital audio interface receives DAC data on the DIN1/2/3 inputs. Audio Data for each stereo channel is time multiplexed with LRCLK indicating whether the left or right channel is present. LRCLK is also used as a timing reference to indicate the beginning or end of the data words. In left justified, right justified and I2S modes, the minimum number of BCLKs per LRCLK period is 2 times the selected word length. LRCLK must be high for a minimum of word length BCLKs and low for a minimum of word length BCLKs. Any mark to space ratio on LRCLK is acceptable provided the above requirements are met. If exactly 32 bit clocks occur in one left/right clock (16 high, 16 low) the chip will auto detect and run at 16 bit data mode. w PP Rev 1.4 October 2003 10 Product Preview WM8763/4/5 LEFT JUSTIFIED MODE (WM8764 ONLY) In left justified mode, the MSB of DIN1/2/3 is sampled by the WM8764 on the first rising edge of BCLK following a LRCLK transition. LRCLK is high during the left samples and low during the right samples (Figure 5). 1/fs LEFT CHANNEL LRCIN RIGHT CHANNEL BCKIN DIN1/2/3 1 2 3 n-2 n-1 n 1 2 3 n-2 n-1 n MSB LSB MSB LSB Figure 5 Left Justified Mode Timing Diagram RIGHT JUSTIFIED MODE (WM8765 ONLY) In right justified mode, the LSB of DIN1/2/3 is sampled by the WM8765 on the rising edge of BCLK preceding a LRCLK transition. LRCLK are high during the left samples and low during the right samples (Figure 6). 1/fs LEFT CHANNEL LRCIN RIGHT CHANNEL BCKIN DIN1/2/3 1 2 3 n-2 n-1 n 1 2 3 n-2 n-1 n MSB LSB MSB LSB Figure 6 Right Justified Mode Timing Diagram I2S MODE (WM8763 ONLY) In I2S mode, the MSB of DIN1/2/3 is sampled by the WM8763 on the second rising edge of BCLK following a LRCLK transition. LRCLK are low during the left samples and high during the right samples. 1/fs LEFT CHANNEL LRCIN RIGHT CHANNEL BCKIN 1 BCKIN 1 BCKIN 3 n-2 n-1 n 1 2 3 n-2 n-1 n DIN1/2/3 1 2 MSB LSB MSB LSB Figure 7 I2S Mode Timing Diagram w PP Rev 1.4 October 2003 11 WM8763/4/5 DIGITAL FILTER CHARACTERISTICS PARAMETER Passband Passband ripple Stopband Stopband Attenuation Group Delay Table 11 Digital Filter Characteristics f > 0.555fs 0.555fs -60 21 dB fs TEST CONDITIONS 0.05 dB -3dB 0.487fs 0.05 dB MIN TYP MAX 0.444fs UNIT Product Preview DAC FILTER RESPONSES 0.2 0 0.15 -20 0.1 Response (dB) Response (dB) -40 0.05 0 -0.05 -0.1 -60 -80 -100 -0.15 -0.2 0 0.5 1 1.5 Frequency (Fs) 2 2.5 3 0 0.05 0.1 0.15 0.2 0.25 0.3 Frequency (Fs) 0.35 0.4 0.45 0.5 -120 Figure 8 DAC Digital Filter Frequency Response - 44.1, 48 and 96KHz Figure 9 DAC Digital Filter Ripple -44.1, 48 and 96kHz 0.2 0 0 -20 Response (dB) -0.2 Response (dB) -40 -0.4 -60 -0.6 -0.8 -80 -1 0 0.2 0.4 0.6 Frequency (Fs) 0.8 1 0 0.05 0.1 0.15 0.2 0.25 0.3 Frequency (Fs) 0.35 0.4 0.45 0.5 Figure 10 DAC Digital Filter Frequency Response - 192kHz Figure 11 DAC Digital filter Ripple - 192kHz w PP Rev 1.4 October 2003 12 Product Preview WM8763/4/5 1 0.5 DIGITAL DE-EMPHASIS CHARACTERISTICS 0 -2 0 Response (dB) -4 Response (dB) -0.5 -1 -1.5 -2 -6 -8 -2.5 -10 0 2 4 6 8 10 Frequency (kHz) 12 14 16 -3 0 2 4 6 8 10 Frequency (kHz) 12 14 16 Figure 12 De-Emphasis Frequency Response (32kHz) 0 Figure 13 De-Emphasis Error (32KHz) 0.4 0.3 -2 0.2 Response (dB) -4 Response (dB) 0.1 0 -0.1 -0.2 -6 -8 -0.3 -10 0 5 10 Frequency (kHz) 15 20 -0.4 0 5 10 Frequency (kHz) 15 20 Figure 14 De-Emphasis Frequency Response (44.1KHz) 0 Figure 15 De-Emphasis Error (44.1KHz) 1 0.8 -2 0.6 0.4 Response (dB) -4 Response (dB) 0.2 0 -0.2 -0.4 -6 -8 -0.6 -0.8 -10 0 5 10 15 Frequency (kHz) 20 -1 0 5 10 15 Frequency (kHz) 20 Figure 16 De-Emphasis Frequency Response (48kHz) Figure 17 De-Emphasis Error (48kHz) w PP Rev 1.4 October 2003 13 WM8763/4/5 APPLICATIONS INFORMATION RECOMMENDED EXTERNAL COMPONENTS Product Preview Figure 18 Recommended External Components Diagram RECOMMENDED EXTERNAL COMPONENTS VALUES COMPONENT REFERENCE C1 and C5 C2 to C4 C6 C7 C8 R1 SUGGESTED VALUE 10F 0.1F 0.1F 10F 10F 33V Filtering for VREFP. Omit if AVDD low noise. Filtering for VREP. Use 0 if AVDD low noise. DESCRIPTION De-coupling for DVDD and AVDD. De-coupling for DVDD and AVDD. Reference de-coupling capacitors for VMID. Table 4 External Components Description w PP Rev 1.4 October 2003 14 Product Preview WM8763/4/5 SUGGESTED ANALOGUE LOW PASS POST DAC FILTERS It is recommended that a lowpass filter be applied to the output from each DAC channel for Hi Fi applications. Typically a second order filter is suitable and provides sufficient attenuation of high frequency components (the unique low order, high bit count multi-bit sigma delta DAC structure used in WM8763/4/5 produces much less high frequency output noise than normal sigma delta DACs. This filter is typically also used to provide the 2x gain needed to provide the standard 2Vrms output level from most consumer equipment. Figure 19 shows a suitable post DAC filter circuit, with 2x gain. Alternative inverting filter architectures might also be used with as good results. 1.0nF 10uF 1.8k 7.5k VOUT1L 47k 680pF 51 4.7k 4.7k OP_FIL VOUT1R VOUT2L VOUT2R VOUT3L VOUT3R OP_FIL OP_FIL OP_FIL OP_FIL OP_FIL Figure 19 Recommended Post DAC Filter Circuit w PP Rev 1.4 October 2003 15 WM8763/4/5 PACKAGE DRAWING DS: 20 PIN SSOP (7.2 x 5.3 x 1.75 mm) Product Preview DM0015.B b 20 e 11 E1 E 1 10 GAUGE PLANE D A A2 A1 -C0.10 C SEATING PLANE c L L1 0.25 Symbols A A1 A2 b c D e E E1 L L1 REF: MIN ----0.05 1.65 0.22 0.09 6.90 7.40 5.00 0.55 0 o Dimensions (mm) NOM --------1.75 0.30 ----7.20 0.65 BSC 7.80 5.30 0.75 0.125 REF o 4 JEDEC.95, MO-150 MAX 2.0 ----1.85 0.38 0.25 7.50 8.20 5.60 0.95 8 o NOTES: A. ALL LINEAR DIMENSIONS ARE IN MILLIMETERS. B. THIS DRAWING IS SUBJECT TO CHANGE WITHOUT NOTICE. C. BODY DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSION, NOT TO EXCEED 0.20MM. D. MEETS JEDEC.95 MO-150, VARIATION = AE. REFER TO THIS SPECIFICATION FOR FURTHER DETAILS. w PP Rev 1.4 October 2003 16 Product Preview WM8763/4/5 IMPORTANT NOTICE Wolfson Microelectronics plc (WM) reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current. All products are sold subject to the WM terms and conditions of sale supplied at the time of order acknowledgement, including those pertaining to warranty, patent infringement, and limitation of liability. WM warrants performance of its products to the specifications applicable at the time of sale in accordance with WM's standard warranty. Testing and other quality control techniques are utilised to the extent WM deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily performed, except those mandated by government requirements. In order to minimise risks associated with customer applications, adequate design and operating safeguards must be used by the customer to minimise inherent or procedural hazards. Wolfson products are not authorised for use as critical components in life support devices or systems without the express written approval of an officer of the company. Life support devices or systems are devices or systems that are intended for surgical implant into the body, or support or sustain life, and whose failure to perform when properly used in accordance with instructions for use provided, can be reasonably expected to result in a significant injury to the user. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. WM assumes no liability for applications assistance or customer product design. WM does not warrant or represent that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other intellectual property right of WM covering or relating to any combination, machine, or process in which such products or services might be or are used. WM's publication of information regarding any third party's products or services does not constitute WM's approval, license, warranty or endorsement thereof. Reproduction of information from the WM web site or datasheets is permissible only if reproduction is without alteration and is accompanied by all associated warranties, conditions, limitations and notices. Representation or reproduction of this information with alteration voids all warranties provided for an associated WM product or service, is an unfair and deceptive business practice, and WM is not responsible nor liable for any such use. Resale of WM's products or services with statements different from or beyond the parameters stated by WM for that product or service voids all express and any implied warranties for the associated WM product or service, is an unfair and deceptive business practice, and WM is not responsible nor liable for any such use. ADDRESS: Wolfson Microelectronics plc 20 Bernard Terrace Edinburgh EH8 9NX United Kingdom Tel :: +44 (0)131 272 7000 Fax :: +44 (0)131 272 7001 Email :: sales@wolfsonmicro.com w PP Rev 1.4 October 2003 17 |
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