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 TPA0252 STEREO 2-W AUDIO POWER AMPLIFIER WITH DIGITAL VOLUME CONTROL
SLOS288 - JUNE 2000
D D D D D D D D D D D
Compatible With PC 99 Desktop Line-Out Into 10-k Load Compatible With PC 99 Portable Into 8- Load Digital Volume Control From 20 dB to -40 dB Internal Memory Restores Volume Setting After Shutdown or Power Down 2-W/Ch Output Power Into 3- Load PC-Beep Input Depop Circuitry Stereo Input MUX and Output MUX Fully Differential Input Low Supply Current and Shutdown Current Surface-Mount Power Packaging 24-Pin TSSOP PowerPADTM
PWP PACKAGE (TOP VIEW)
LOUT- SHUTDOWN PVDD UP DOWN CLK BYPASS PVDD VAUX PC-BEEP ROUT- GND
1 2 3 4 5 6 7 8 9 10 11 12
24 23 22 21 20 19 18 17 16 15 14 13
GND LOUT+ SE/BTL LIN LLINEIN LHPIN VDD RHPIN RLINEIN RIN HP/LINE ROUT+
description
The TPA0252 is a stereo audio power amplifier in a 24-pin TSSOP thermally enhanced package capable of delivering 2 W of continuous RMS power per channel into 3- loads. This device minimizes the number of external components needed, which simplifies the design and frees up board space for other features. When driving 1 W into 8- speakers, the TPA0252 has less than 0.3% THD+N across its specified frequency range. Included within this device is integrated depop circuitry that virtually eliminates transients that cause noise in the speakers. Amplifier gain is controlled by two terminals, UP and DOWN. There are 31 discrete steps covering the range of 20 dB (maximum volume setting) to -40 dB (minimum volume setting) in 2 dB steps. By pressing either button momentarily, the volume steps up or down 2 dB. By continuing to hold the button down, the device will start stepping through volume settings at a rate determined by the capacitor on the CLK terminal. An internal input MUX, controlled by the HP/LINE pin, allows two sets of stereo inputs to the amplifier. In notebook applications, where internal speakers are driven as BTL and the line outputs (often headphone drive) are required to be SE, the TPA0252 automatically switches into SE mode when the SE/BTL input is activated. This effectively reduces the gain by 6 dB. The TPA0252 restores previous volume setting if VAUX is greater than 3 V even if the device is shut-down and/or VDD is removed. If VAUX goes low, the default gain is -10 dB. The TPA0252 consumes only 9 mA of supply current during normal operation. A miserly shutdown mode is included that reduces the supply current to less than 150 A. The PowerPADTM package (PWP) delivers a level of thermal performance that was previously achievable only in TO-220-type packages. Thermal impedances of approximately 35C/W are truly realized in multilayer PCB applications. This allows the TPA0252 to operate at full power into 8- loads at ambient temperatures of 85C.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PowerPAD is a trademark of Texas Instruments.
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
Copyright (c) 2000, Texas Instruments Incorporated
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1
TPA0252 STEREO 2-W AUDIO POWER AMPLIFIER WITH DIGITAL VOLUME CONTROL
SLOS288 - JUNE 2000
functional block diagram
RHPIN RLINEIN VDD V 40 k DD 40 k - ROUT+ + R MUX 32-Step Volume Control
UP DOWN
RIN
VAUX
Volume Control Memory
- ROUT- +
PC-BEEP
PCBeep Depop Circuitry Power Management PVDD VDD BYPASS SHUTDOWN GND
SE/BTL HP/LINE
MUX Control
LHPIN LLINEIN
L MUX
32-Step Volume Control
- LOUT+ +
LIN
- LOUT- +
2
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TPA0252 STEREO 2-W AUDIO POWER AMPLIFIER WITH DIGITAL VOLUME CONTROL
SLOS288 - JUNE 2000
AVAILABLE OPTIONS TA PACKAGED DEVICE TSSOP (PWP)
- 40C to 85C TPA0252PWP The PWP package is available taped and reeled. To order a taped and reeled part, add the suffix R to the part number (e.g., TPA0252PWPR).
Terminal Functions
TERMINAL NAME BYPASS CLK NO. 7 6 I I/O DESCRIPTION Tap to voltage divider for internal mid-supply bias generator If a 47-nF capacitor is attached, the TPA0252 generates an internal clock. An external clock can override the internal clock input to this terminal. A momentary pulse on this terminal decreases the volume level by 2 dB. Holding the terminal low for a period of time will step the amplifier through the volume levels at a rate determined by the capacitor on the CLK terminal. Ground connection for circuitry. Connected to thermal pad I I I I O O I I I I I O O I I I I I Input MUX control. When terminal is high, the LHPIN and RHPIN inputs are selected. When terminal is low, LLINEIN and RLINEIN inputs are selected. Left-channel headphone input, selected when HP/LINE is held high Common left input for fully differential input. AC ground for single-ended inputs Left-channel line negative input, selected when HP/LINE is held low Left-channel positive output in BTL mode and positive in SE mode Left-channel negative output in BTL mode and high impedance in SE mode The input for PC beep mode. PC-BEEP is enabled when a > 1-V (peak-to-peak) square wave is input to PC-BEEP. Power supply for output stage Right channel headphone input, selected when HP/LINE is held high Common right input for fully differential input. AC ground for single-ended inputs Right-channel line input, selected when HP/LINE is held low Right-channel positive output in BTL mode and positive in SE mode Right-channel negative output in BTL mode and high impedance in SE mode Output MUX control input. When this terminal is held high SE outputs are selected. When this terminal is held low BTL outputs are selected. When held low, this terminal places the entire device, except PC-BEEP detect circuitry, in shutdown mode. A momentary pulse on this terminal increases the volume level by 2 dB. Holding the terminal low for a period of time will step the amplifier through the volume levels at a rate determined by the capacitor on the CLK terminal. Volume control memory supply. Connect to system auxiliary that stays active when device is powered down. Analog VDD input supply. This terminal needs to be isolated from PVDD to achieve highest performance.
DOWN GND HP/LINE LHPIN LIN LLINEIN LOUT+ LOUT- PC-BEEP PVDD RHPIN RIN RLINEIN ROUT+ ROUT- SE/BTL SHUTDOWN UP VAUX VDD
5 12, 24 14 19 21 20 23 1 10 3, 8 17 15 16 13 11 22 2 4 9 18
I
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TPA0252 STEREO 2-W AUDIO POWER AMPLIFIER WITH DIGITAL VOLUME CONTROL
SLOS288 - JUNE 2000
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, VDD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 V Input voltage, VI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 V to VDD +0.3 V Continuous total power dissipation . . . . . . . . . . . . . . . . . . . . . internally limited (see Dissipation Rating Table) Operating free-air temperature range, TA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . - 40C to 85C Operating junction temperature range, TJ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . - 40C to 150C Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -65C to 150C Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260C
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. DISSIPATION RATING TABLE PACKAGE PWP TA 25C 2.7 W DERATING FACTOR 21.8 mW/C TA = 70C 1.7 W TA = 85C 1.4 W
See the Texas Instruments document, PowerPADTM Thermally Enhanced Package Application Report (literature number SLMA002), for more information on the PowerPADTM package. The thermal data was measured on a PCB layout based on the information in the section entitled Texas Instruments Recommended Board for PowerPADTM on page 33 of the before mentioned document.
recommended operating conditions
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Supply voltage, VDD 4.5 3 4 2 4.5 5.5 5.5 V V V Volume control memory supply voltage, VAUX High-level input voltage, VIH CLK SE/BTL, HP/LINE, UP, DOWN SHUTDOWN SHUTDOWN UP, DOWN, CLK - 40 SE/BTL, HP/LINE Low-level input voltage, VIL Operating free-air temperature, TA 3 0.8 0.5 85 V C
MIN
MAX
UNIT
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4
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TPA0252 STEREO 2-W AUDIO POWER AMPLIFIER WITH DIGITAL VOLUME CONTROL
SLOS288 - JUNE 2000
electrical characteristics at specified free-air temperature, VDD = 5 V, TA = 25C (unless otherwise noted)
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|VOS| Output offset voltage (measured differentially) Supply ripple rejection ratio High-level input current VI = 0, Av = 2 VDD = 4.9 V to 5.1 V VDD = 5.5 V, 25 mV dB 67 |IIH| SE/BTL, HP/LINE, SHUTDOWN, UP, DOWN SE/BTL, HP/LINE, SHUTDOWN UP, DOWN VI = VDD 1 1 A A A |IIL| Low-level input current VDD = 5.5 V, BTL mode SE mode VI = 0 V 125 15 IDD Supply current 9 4.5 7.5 mA A nA IDD(SD) Supply current, shutdown mode 150 0.7 300 IDD(VAUX) Supply current, VAUX pin (see Figure 29) VAUX = 5 V, VDD = 0 V
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
operating characteristics, VDD = 5 V, TA = 25C, RL = 4 , Gain = 20 dB, BTL mode (unless otherwise noted)
PARAMETER TEST CONDITIONS f = 1 kHz MIN TYP 2 MAX UNIT W PO THD + N BOM Output power THD = 1%, PO = 1 W, THD = 5%
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Total harmonic distortion plus noise Maximum output power bandwidth Supply ripple rejection ratio f = 20 Hz to 15 kHz BTL mode 0.3% >15 65 60 17 44 kHz dB kSVR Vn f = 1 kHz, , CB = 0.47 F SE mode, Gain = 14 dB BTL mode, Gain = 6 dB SE mode, Gain = 0 dB Noise output voltage CB = 0.47 F, f = 20 Hz to 20 kHz VRMS
TYPICAL CHARACTERISTICS
Table of Graphs
FIGURE vs Output power THD+N Vn Total harmonic distortion plus noise Output noise voltage Supply ripple rejection ratio Crosstalk Shutdown attenuation SNR PO PD RI IDD(VAUX) Signal-to-noise ratio Closed loop response Output power Power dissipation Input resistance Supply current vs Load resistance vs Output power vs Ambient temperature vs Gain vs VAUX vs Gain vs Frequency vs Frequency vs Frequency vs Frequency vs Frequency vs Frequency 1, 4, 6, 8, 10 2 3, 5, 7, 9, 11, 12 13 14, 15 16, 17, 18 19 20 21, 22 23, 24 25, 26 27 28 29
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TPA0252 STEREO 2-W AUDIO POWER AMPLIFIER WITH DIGITAL VOLUME CONTROL
SLOS288 - JUNE 2000
TYPICAL CHARACTERISTICS
TOTAL HARMONIC DISTORTION PLUS NOISE vs OUTPUT POWER
10% THD+N -Total Harmonic Distortion + Noise THD+N -Total Harmonic Distortion + Noise
TOTAL HARMONIC DISTORTION PLUS NOISE vs GAIN
1% PO = 1 W for AV6dB VO = 1 VRMS for AV4 dB RL = 8 BTL
1% RL = 8
RL = 4 RL = 3
0.1%
0.1%
AV = +20 to 0 dB f = 1 kHz BTL 0.01% 0.5 0.75 1 1.25 1.5 1.75 2 2.25 2.5 2.75 3
0.01% -40
-30
-20
-10
0
10
20
PO - Output Power - W
A V - Voltage Gain - dB
Figure 1
TOTAL HARMONIC DISTORTION PLUS NOISE vs FREQUENCY
10% THD+N -Total Harmonic Distortion + Noise THD+N -Total Harmonic Distortion + Noise RL = 3 AV = +20 to 0 dB BTL
Figure 2
TOTAL HARMONIC DISTORTION PLUS NOISE vs OUTPUT POWER
10%
1% PO = 1 W PO = 0.5 W 0.1%
1%
f = 20 kHz
f = 1 kHz 0.1% f = 20 Hz RL = 3 AV = +20 to 0 dB BTL 0.01% 0.01 0.1 1 PO - Output Power - W 10
PO = 1.75 W
0.01% 20
100
1k f - Frequency - Hz
10k 20k
Figure 3
Figure 4
6
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TPA0252 STEREO 2-W AUDIO POWER AMPLIFIER WITH DIGITAL VOLUME CONTROL
SLOS288 - JUNE 2000
TYPICAL CHARACTERISTICS
TOTAL HARMONIC DISTORTION PLUS NOISE vs FREQUENCY
10% THD+N -Total Harmonic Distortion + Noise RL = 4 AV = +20 to 0 dB BTL 1% THD+N -Total Harmonic Distortion + Noise
TOTAL HARMONIC DISTORTION PLUS NOISE vs OUTPUT POWER
10% RL = 4 AV = +20 to 0 dB BTL
1%
f = 20 kHz
PO= 0.25 W 0.1% PO=1.5 W
f = 1 kHz 0.1%
f = 20 Hz
PO= 1 W 0.01% 20 100 1k f - Frequency - Hz 10k 20k
0.01% 0.01
0.1 1 PO - Output Power - W
10
Figure 5
TOTAL HARMONIC DISTORTION PLUS NOISE vs FREQUENCY
10% THD+N -Total Harmonic Distortion + Noise THD+N -Total Harmonic Distortion + Noise RL = 8 AV = +20 to 0 dB BTL
Figure 6
TOTAL HARMONIC DISTORTION PLUS NOISE vs OUTPUT POWER
10% RL = 8 AV = +20 to 0 dB BTL 1%
1%
f = 20 kHz
PO = 0.25 W 0.1%
PO = 0.5 W
0.1%
f = 1 kHz
0.01% 20
PO = 1 W 100 1k f - Frequency - Hz 10k 20k
f = 20 Hz 0.01% 0.01 0.1 1 PO - Output Power - W 10
Figure 7
Figure 8
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TPA0252 STEREO 2-W AUDIO POWER AMPLIFIER WITH DIGITAL VOLUME CONTROL
SLOS288 - JUNE 2000
TYPICAL CHARACTERISTICS
TOTAL HARMONIC DISTORTION PLUS NOISE vs FREQUENCY
10% THD+N -Total Harmonic Distortion + Noise THD+N -Total Harmonic Distortion + Noise RL = 32 AV = +14 to 0 dB SE 1%
TOTAL HARMONIC DISTORTION PLUS NOISE vs OUTPUT POWER
10%
1% f = 20 kHz
0.1% PO = 25 mW
0.1% f = 1 kHz RL = 32 AV = +14 to 0 dB SE 0.1 PO - Output Power - W 1
0.01% PO = 50 mW 0.001% 20 PO = 75 mW
100
1k f - Frequency - Hz
10k 20k
0.01% 0.01
f = 20 Hz
Figure 9
TOTAL HARMONIC DISTORTION PLUS NOISE vs FREQUENCY
10% THD+N -Total Harmonic Distortion + Noise THD+N -Total Harmonic Distortion + Noise RL = 10 k AV = +14 to 0 dB SE 1%
Figure 10
TOTAL HARMONIC DISTORTION PLUS NOISE vs FREQUENCY
10%
1%
0.1% VO = 1 VRMS 0.01%
PO = 20 kHz 0.1%
PO = 1 kHz 0.01% RL = 10 k AV = +14 to 0 dB SE 0 0.2 0.4 0.6 0.8 1 1.2 1.4 PO = 20 Hz 1.6 1.8 2
0.001% 20
100
1k f - Frequency - Hz
10k 20k
0.001% VO - Output Voltage - VRMS
Figure 11
Figure 12
8
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TPA0252 STEREO 2-W AUDIO POWER AMPLIFIER WITH DIGITAL VOLUME CONTROL
SLOS288 - JUNE 2000
TYPICAL CHARACTERISTICS
OUTPUT NOISE VOLTAGE vs FREQUENCY
160 Vn - Output Noise Voltage - V RMS 140 120 100 AV = +20 dB 80 60 40 20 0 0 100 1k f - Frequency - Hz 10k 20k AV = +6 dB VDD = 5 V BW = 22 Hz to 22 kHz RL = 4 0 RL = 8 CB = 0.47 F BTL AV = +20 dB
SUPPLY RIPPLE REJECTION RATIO vs FREQUENCY
Supply Ripple Rejection Ratio - dB
-20
-40
-60
-80 AV = +6 dB -100
-120 20 100 1k f - Frequency - Hz 10k 20k
Figure 13
SUPPLY RIPPLE REJECTION RATIO vs FREQUENCY
0 RL = 32 CB = 0.47 F SE -40 -50 -60 Crosstalk - dB -40 AV = +6 dB -70 -80 -90 PO = 1 W RL = 8 AV= +20 dB BTL
Figure 14
CROSSTALK vs FREQUENCY
Supply Ripple Rejection Ratio - dB
-20
LEFT TO RIGHT
-60
-80
AV = +14 dB -100
RIGHT TO LEFT
-100
-110 -120 20
-120 20 100 1k f - Frequency - Hz 10k 20k
100
1k f - Frequency - Hz
10k 20k
Figure 15
Figure 16
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TPA0252 STEREO 2-W AUDIO POWER AMPLIFIER WITH DIGITAL VOLUME CONTROL
SLOS288 - JUNE 2000
TYPICAL CHARACTERISTICS
CROSSTALK vs FREQUENCY
-40 -50 -60 Crosstalk - dB -70 LEFT TO RIGHT -80 -90 -100 -110 -120 20 -100 RIGHT TO LEFT PO = 1 W RL = 8 AV = +60dB BTL 0 VO = 1 VRMS RL = 10 k AV = +6 dB SE
CROSSTALK vs FREQUENCY
-20
Crosstalk - dB
-40
-60 LEFT TO RIGHT -80 RIGHT TO LEFT
100
1k f - Frequency - Hz
10k 20k
-120 20
100
1k f - Frequency - Hz
10k 20k
Figure 17
SHUTDOWN ATTENUATION vs FREQUENCY
0 VI = 1 VRMS SNR - Signal-To-Noise Ratio - dB -20 Shutdown Attenuation - dB RL = 10 k, SE -40 115 110 105 120 PO = 1 W RL = 8 BTL
Figure 18
SIGNAL-TO-NOISE RATIO vs FREQUENCY
-60 RL = 32 , SE -80
AV = +20 dB 100 95 90 AV = +6 dB 85 80
-100 RL = 8 , BTL -120 20 100 1k f - Frequency - Hz 10k 20k
0
100
1k f - Frequency - Hz
10k 20k
Figure 19
Figure 20
10
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TPA0252 STEREO 2-W AUDIO POWER AMPLIFIER WITH DIGITAL VOLUME CONTROL
SLOS288 - JUNE 2000
TYPICAL CHARACTERISTICS
CLOSED LOOP RESPONSE
30 25 20 15 Phase 10 5 0 -5 -10 10 -180 100 1k 10k 100k 1M f - Frequency - Hz -90 0 Phase Phase RL = 8 AV = +20 dB BTL 180
Gain 90
Gain - dB
Figure 21
CLOSED LOOP RESPONSE
30 25 20 15 Phase 10 5 Gain 0 -5 -10 10 -180 100 1k 10k 100k 1M f - Frequency - Hz -90 0 RL = 8 AV = +6 dB BTL 90 180
Gain - dB
Figure 22
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TPA0252 STEREO 2-W AUDIO POWER AMPLIFIER WITH DIGITAL VOLUME CONTROL
SLOS288 - JUNE 2000
TYPICAL CHARACTERISTICS
OUTPUT POWER vs LOAD RESISTANCE
3.5 3 PO - Output Power - W AV = +20 to 0 dB BTL 1500 AV = +14 to 0 dB SE 1250 PO- Output Power - mW
OUTPUT POWER vs LOAD RESISTANCE
2.5 2
1000
10% THD+N
750
1.5 1 0.5 0 0 8 16 24 32 40 48 RL - Load Resistance - 56 64
500 10% THD+N 250
1% THD+N 1% THD+N 0 0 8 24 32 16 40 48 RL - Load Resistance - 56 64
Figure 23
POWER DISSIPATION vs OUTPUT POWER
1.8 1.6 PD - Power Dissipation - W 1.4 1.2 1 0.8 0.6 0.4 0.2 0 0 f = 1 kHz BTL Each Channel 0.5 1.5 1 PO - Output Power - W 2 2.5 8 4 3 0.35 PD - Power Dissipation - W 0.3 0.25 0.2 0.4
Figure 24
POWER DISSIPATION vs OUTPUT POWER
4
8 0.15 0.1 32 0.05 0 0 f = 1 kHz SE Each Channel 0.4 0.5 0.6 0.2 0.3 PO - Output Power - W 0.7 0.8
0.1
Figure 25
Figure 26
12
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TPA0252 STEREO 2-W AUDIO POWER AMPLIFIER WITH DIGITAL VOLUME CONTROL
SLOS288 - JUNE 2000
TYPICAL CHARACTERISTICS
POWER DISSIPATION vs AMBIENT TEMPERATURE
7 JA4 6 PD - Power Dissipation - W JA1 = 45.9C/W JA2 = 45.2C/W JA3 = 31.2C/W JA4 = 18.6C/W
5 4
JA3
3 JA1,2 2
1 0 -40 -20
20 40 60 80 100 120 140 160 0 TA - Ambient Temperature - C
Figure 27
INPUT RESISTANCE vs GAIN
90 80 RI - Input Resistance - k 70 60 50 40 30 20 10 -40
-30
-20 -10 0 AV - Gain - dB
10
20
Figure 28
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TPA0252 STEREO 2-W AUDIO POWER AMPLIFIER WITH DIGITAL VOLUME CONTROL
SLOS288 - JUNE 2000
TYPICAL CHARACTERISTICS
SUPPLY CURRENT vs VAUX
1.6 1.4 1.2 1.0 125C 0.8 25C 0.6 0.4 -40C 0.2 0.0 0
I DD(VAUX) - Supply Current - nA
0.5
1
1.5
2
2.5 3 3.5 VAUX - V
4
4.5
5
5.5
Figure 29
APPLICATION INFORMATION selection of components
Figure 30 and Figure 31 are schematic diagrams of typical notebook computer application circuits.
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TPA0252 STEREO 2-W AUDIO POWER AMPLIFIER WITH DIGITAL VOLUME CONTROL
SLOS288 - JUNE 2000 Right Head- phone Input Signal CIRHP 0.47 F Gain Memory 17 RHPIN R MUX 18 VAUX 9 0.47 F VDD System VAUX
CIRLINE Right 0.47 F Line Input Signal CRIN 0.47 F PC BEEP Input Signal C PCB 0.47 F CCLK 47 nF Up
16 15
RLINEIN RIN
- +
ROUT+
13
10
PC-BEEP
PCBeep
6
CLK COUTR 330 F
4 5
UP DOWN SE/BTL HP/LINE Gain/ MUX Control
- +
ROUT-
11
VDD 100 k See Note A VDD CSR 0.47 F VDD CSR 0.47 F CBYP 0.47 F
1 k
100 k VDD 100 k Down
22 14
PVDD Depop Circuitry Power Management
3,8
VDD BYPASS SHUTDOWN
18 7 2
CILHP Left Head- 0.47 F phone Input Signal Left Line Input Signal CILLINE 0.47 F
19
LHPIN L MUX
GND
20
LLINEIN
To System Control 12,24
1 k
- +
LOUT+
23
COUTL 330 F
21 CLIN 0.47 F
LIN
- +
LOUT-
1
100 k
NOTE A: A 0.47 F ceramic capacitor should be placed as close as possible to the IC. For filtering lower-frequency noise signals, a larger electrolytic capacitor of 10 F or greater should be placed near the audio power amplifier.
Figure 30. Typical TPA0252 Application Circuit Using Single-Ended Inputs and Input MUX
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TPA0252 STEREO 2-W AUDIO POWER AMPLIFIER WITH DIGITAL VOLUME CONTROL
SLOS288 - JUNE 2000
APPLICATION INFORMATION
N/C Right Negative Differential Input Signal CRIN- 0.47 F 16 Right CRIN+ Positive 0.47 F Differential 15 Input Signal RLINEIN VDD Gain Memory 17 RHPIN R MUX 18 VAUX 9 0.47 F System VAUX
- RIN +
ROUT+
13
PC BEEP Input Signal C PCB 0.47 F CCLK 47 nF Up
10
PC BEEP
PC Beep
6
CLK
COUTR 330 F - ROUT- 11 VDD 100 k See Note A VDD CSR 0.47 F VDD CSR 0.47 F CBYP 0.47 F 1 k 1 k
4 5
UP DOWN SE/BTL HP/LINE Gain/ MUX Control
+
100 k VDD 100 k Down 14
22
PVDD Depop Circuitry Power Management
3,8
VDD BYPASS SHUTDOWN
18 7 2
N/C CILLINE 0.47 F Left Negative Differential Input Signal
19
LHPIN L MUX
GND
20
LLINEIN
To System Control 12,24
- +
LOUT+
23
COUTL 330 F
CLIN 0.47 F Left Positive Differential Input Signal
21
LIN
- +
LOUT-
1
100 k
NOTE A: A 0.47 F ceramic capacitor should be placed as close as possible to the IC. For filtering lower-frequency noise signals, a larger electrolytic capacitor of 10 F or greater should be placed near the audio power amplifier.
Figure 31. Typical TPA0252 Application Circuit Using Differential Inputs
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TPA0252 STEREO 2-W AUDIO POWER AMPLIFIER WITH DIGITAL VOLUME CONTROL
SLOS288 - JUNE 2000
APPLICATION INFORMATION up/down volume control
changing volume The default volume is set at -10 dB for BTL mode and -16 dB for SE mode. The volume is increased in 2-dB steps by pulling the voltage low on terminal UP. The volume is decreased in 2-dB steps by pulling the voltage low on terminal DOWN. If UP and DOWN are held low at the same time, the device is muted, and the volume returns to its previous setting after UP and DOWN are pulled high.
Table 1. Volume Settings
Volume Control BTL (dB) 20 18 16 14 12 10 8 6 4 2 0 -2 -4 -6 SE (dB) 14 12 10 8 6 4 2 0 -2 -4 -6 -8 -10 -12 -14 -16 -18 -20 -22 -24 -26 -28 -30 -32 -34 -36 -38 -40 -42 -44 -46 -85
Up Down
-8 -10 -12 -14 -16 -18 -20 -22 -24 -26 -28 -30 -32 -34 -36 -38 -40
Mute
-85
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TPA0252 STEREO 2-W AUDIO POWER AMPLIFIER WITH DIGITAL VOLUME CONTROL
SLOS288 - JUNE 2000
APPLICATION INFORMATION
changing volume when using the internal clock If using the internal clock, the maximum clock frequency is 500Hz and the recommended frequency is 100 Hz using a 47-nF capacitor. The formula for calculating the clock frequency if using a cap to generate the clock is shown below.
f CLK
+ 4.7C
10 -6
CLK
(1)
Note: This equation is an approximation, fCLK will vary. When the desired line is pulled low for four clock cycles, the volume will increment by one step, followed by a short delay. This delay will decrease the longer the line is held low, eventually reaching a delay of zero. The delay allows the user to pull the UP or DOWN terminal low once for one volume change, or hold down to ramp several volume changes. The delay is optimally configured for push button volume control. Holding either UP or DOWN low continuously causes the volume to change at an exponentially increasing rate. When fCLK = 100 Hz, the first change in the volume occurs approximately 40 ms after either pin is initially pulled low. If the pin stays low for approximately 400 more ms, the volume changes again. The next change occurs 200 ms after this change. The fourth change occurs 120 ms after the third change. The fifth volume change occurs 80 ms after the fourth change. Thereafter, the volume changes at 1/4 the rate of the clock (every 40 ms). Each cycle is registered on the rising clock edge and the volume is changed after the rising edge. The figure below shows increasing volume using UP, however, the volume is decreased using DOWN with the same timing.
UP
CLK
VOLUME 20 cycles 12 cycles 8 cycles 4 cycles per step
40 cycles 4 cycles
Figure 32. Internal Clock Timing Diagram
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TPA0252 STEREO 2-W AUDIO POWER AMPLIFIER WITH DIGITAL VOLUME CONTROL
SLOS288 - JUNE 2000
APPLICATION INFORMATION
changing volume when using the external clock (microprocessor mode) The user may remove the capacitor and run the external clock directly into the clock pin to override the internal clock generator. The maximum clock frequency is 10 kHz if using an external clock; however, it is recommended that the clock frequency be less than 200 Hz in normal operation so the gain will not change too quickly causing a pop at the output. A 5-V clock must be used because the trip levels are 0.5 V and 4.5 V. The clock needs to have 50% duty cycle. The recommended way of adjusting the volume is to use a gated clock and hold UP or DOWN low and cycle the clock pin four times to adjust the volume. The volume change is clocked in at the rising edge. CLK should be held low when not changing volume. No delay is added when using an external clock, so it is very important to only input four clock cycles per volume change. Any additional clock cycles per volume change will be added to the next volume change. For example, if five clock cycles are input while UP is held low the first volume change, the volume change will occur after the third clock cycle the next time UP is held low. The figure below shows how volume increases with UP when an external clock is used. The sample and hold times for UP and DOWN are 100 ns. The same timing applies if using an external clock and decreasing the volume with DOWN.
UP
CLK
VOLUME
4 cycles per step
Figure 33. External Clock (4 cycles per volume change) VAUX VAUX is used to keep power to the volume control memory. As long as the voltage at the VAUX pin is greater than 3 V, the device will remember what volume setting it was in, even when shut-down or powered down. The amplifier will then return to that volume setting after being powered up. If VAUX is pulled low, the device will reset to a volume setting of -10 dB in BTL and -16 dB in SE mode. If VAUX is pulled below ground, the device could be damaged. Even if VAUX is connected to just one voltage, it should be connected through a diode so VAUX is not pulled below ground. The recommended circuit to keep VAUX high when power down is shown below.
V DD
System V AUX C VAUX
9
VAUX
Figure 34. Recommended System VAUX Circuit
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TPA0252 STEREO 2-W AUDIO POWER AMPLIFIER WITH DIGITAL VOLUME CONTROL
SLOS288 - JUNE 2000
VAUX (continued) The diodes in Figure 34 need to have a low threshold voltage and low leakage current. This circuit allows VAUX to remain high even when VDD and system VAUX are removed. The formula for calculating how long the volume will be remembered if VDD and system VAUX is removed or pulled low is shown below. The diode used in the example has a forward voltage, VF of 0.7 V and 25 nA of leakage current, IR. tdecay = CVAUX x ((VDD or system VAUX) - VF - VAUXmin) / (2 x IR + IDD(VAUX)) tdecay = 0.47 F x (5V - 0.7 V - 3V)/(25 nA x 2 + 0.7 nA) tdecay = 12 seconds input resistance Each gain setting is achieved by varying the input resistance of the amplifier, which can range from its smallest value to over 6 times that value. As a result, if a single capacitor is used in the input high pass filter, the -3 dB or cutoff frequency will also change by over 6 times. If an additional resistor is connected from the input pin of the amplifier to ground, as shown in the figure below, the variation of the cutoff frequency will be much reduced.
Rf C Input Signal R IN RI
The input resistance at each gain setting is given in Figure 28. The -3 dB frequency can be calculated using equation 2. f
-3 dB
+
1
2p C R R
o
I
(2)
If the filter must be more accurate, the value of the capacitor should be increased while value of the resistor to ground should be decreased. In addition, the order of the filter could be increased. input capacitor, CI In the typical application an input capacitor, CI, is required to allow the amplifier to bias the input signal to the proper dc level for optimum operation. In this case, CI and the input impedance of the amplifier, ZI, form a high-pass filter with the corner frequency determined in equation 3.
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TPA0252 STEREO 2-W AUDIO POWER AMPLIFIER WITH DIGITAL VOLUME CONTROL
SLOS288 - JUNE 2000
APPLICATION INFORMATION
input capacitor, CI (continued)
-3 dB
f
c(highpass)
1 + 2 pZ C
(3)
II
fc
The value of CI is important to consider as it directly affects the bass (low frequency) performance of the circuit. Consider the example where ZI is 15 k (from Figure 28) and the specification calls for a flat bass response down to 40 Hz. Equation 3 is reconfigured as equation 4. C I 1 + 2 pZ fc I (4)
In this example, CI is 0.27 F, so one would likely choose a value in the range of 0.27 F to 1 F. A further consideration for this capacitor is the leakage path from the input source through the input network (CI) and the feedback network to the load. This leakage current creates a dc offset voltage at the input to the amplifier that reduces useful headroom, especially in high gain applications. For this reason a low-leakage tantalum or ceramic capacitor is the best choice. When polarized capacitors are used, the positive side of the capacitor should face the amplifier input in most applications as the dc level there is held at VDD/2, which is likely higher than the source dc level. Note that it is important to confirm the capacitor polarity in the application. power supply decoupling, CS The TPA0252 is a high-performance CMOS audio amplifier that requires adequate power supply decoupling to ensure the output total harmonic distortion (THD) is as low as possible. Power supply decoupling also prevents oscillations for long lead lengths between the amplifier and the speaker. The optimum decoupling is achieved by using two capacitors of different types that target different types of noise on the power supply leads. For higher frequency transients, spikes, or digital hash on the line, a good low equivalent-series-resistance (ESR) ceramic capacitor, typically 0.1 F placed as close as possible to the device VDD lead, works best. For filtering lower-frequency noise signals, a larger aluminum electrolytic capacitor of 10 F or greater placed near the audio power amplifier is recommended. midrail bypass capacitor, CBYP The midrail bypass capacitor, CBYP, is the most critical capacitor and serves several important functions. During start-up or recovery from shutdown mode, CBYP determines the rate at which the amplifier starts up. The second function is to reduce noise produced by the power supply caused by coupling into the output drive signal. This noise is from the midrail generation circuit internal to the amplifier, which appears as degraded PSRR and THD+N. Bypass capacitor, CBYP, values of 0.47 F to 1 F ceramic or tantalum low-ESR capacitors are recommended for the best THD and noise performance.
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TPA0252 STEREO 2-W AUDIO POWER AMPLIFIER WITH DIGITAL VOLUME CONTROL
SLOS288 - JUNE 2000
APPLICATION INFORMATION output coupling capacitor, CC
In the typical single-supply SE configuration, an output coupling capacitor (CC) is required to block the dc bias at the output of the amplifier, thus preventing dc currents in the load. As with the input coupling capacitor, the output coupling capacitor and impedance of the load form a high-pass filter governed by equation 5.
-3 dB
f
c(high)
+ 2 pR1 C
LC
(5)
fc
The main disadvantage, from a performance standpoint, is the load impedances are typically small, which drives the low-frequency corner higher degrading the bass response. Large values of CC are required to pass low frequencies into the load. Consider the example where a CC of 330 F is chosen and loads vary from 3 , 4 , 8 , 32 , 10 k, and 47 k. Table 2 summarizes the frequency response characteristics of each configuration. Table 2. Common Load Impedances vs Low Frequency Output Characteristics in SE Mode
RL 3 4 8 32 10,000 47,000 CC 330 F 330 F 330 F 330 F 330 F 330 F LOWEST FREQUENCY 161 Hz 120 Hz 60 Hz 15 Hz 0.05 Hz 0.01 Hz
As Table 2 indicates, most of the bass response is attenuated into a 4- load, an 8- load is adequate, headphone response is good, and drive into line level inputs (a home stereo for example) is exceptional.
using low-ESR capacitors
Low-ESR capacitors are recommended throughout this applications section. A real (as opposed to ideal) capacitor can be modeled simply as a resistor in series with an ideal capacitor. The voltage drop across this resistor minimizes the beneficial effects of the capacitor in the circuit. The lower the equivalent value of this resistance, the more the real capacitor behaves like an ideal capacitor.
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TPA0252 STEREO 2-W AUDIO POWER AMPLIFIER WITH DIGITAL VOLUME CONTROL
SLOS288 - JUNE 2000
APPLICATION INFORMATION bridged-tied load versus single-ended mode
Figure 35 shows a linear audio power amplifier (APA) in a BTL configuration. The TPA0252 BTL amplifier consists of two class-AB amplifiers driving both ends of the load. There are several potential benefits to this differential drive configuration but initially consider power to the load. The differential drive to the speaker means that as one side is slewing up, the other side is slewing down, and vice versa. This in effect doubles the voltage swing on the load as compared to a ground referenced load. Plugging 2 x VO(PP) into the power equation, where voltage is squared, yields 4x the output power from the same supply rail and load impedance (see equation 6). V
+ (rms) +
V
O(PP) 22
2
(6)
V
Power
(rms) R L
VDD
VO(PP)
RL VDD
2x VO(PP)
-VO(PP)
Figure 35. Bridge-Tied Load Configuration In a typical computer sound channel operating at 5 V, bridging raises the power into an 8- speaker from a singled-ended (SE, ground reference) limit of 250 mW to 1 W. In sound power that is a 6-dB improvement, which is loudness that can be heard. In addition to increased power there are frequency response concerns. Consider the single-supply SE configuration shown in Figure 36. A coupling capacitor is required to block the dc offset voltage from reaching the load. These capacitors can be quite large (approximately 33 F to 1000 F) so they tend to be expensive, heavy, occupy valuable PCB area, and have the additional drawback of limiting low-frequency performance of the system. This frequency limiting effect is due to the high pass filter network created with the speaker impedance and the coupling capacitance and is calculated with equation 7. 1 (7) fc 2 pR L C C
+
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TPA0252 STEREO 2-W AUDIO POWER AMPLIFIER WITH DIGITAL VOLUME CONTROL
SLOS288 - JUNE 2000
APPLICATION INFORMATION bridged-tied load versus single-ended mode (continued)
For example, a 68-F capacitor with an 8- speaker would attenuate low frequencies below 293 Hz. The BTL configuration cancels the dc offsets, which eliminates the need for the blocking capacitors. Low-frequency performance is then limited only by the input network and speaker response. Cost and PCB space are also minimized by eliminating the bulky coupling capacitor.
VDD -3 dB
VO(PP)
CC RL
VO(PP)
fc
Figure 36. Single-Ended Configuration and Frequency Response Increasing power to the load does carry a penalty of increased internal power dissipation. The increased dissipation is understandable considering that the BTL configuration produces 4x the output power of the SE configuration. Internal dissipation versus output power is discussed further in the crest factor section.
single-ended operation
In SE mode (see Figure 36), the load is driven from the primary amplifier output for each channel (OUT+, terminals 21 and 4). The amplifier switches single-ended operation when the SE/BTL terminal is held high. This puts the negative outputs in a high-impedance state, and reduces the amplifier's gain to 1 V/V.
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TPA0252 STEREO 2-W AUDIO POWER AMPLIFIER WITH DIGITAL VOLUME CONTROL
SLOS288 - JUNE 2000
APPLICATION INFORMATION BTL amplifier efficiency
Class-AB amplifiers are notoriously inefficient. The primary cause of these inefficiencies is voltage drop across the output stage transistors. There are two components of the internal voltage drop. One is the headroom or dc voltage drop that varies inversely to output power. The second component is due to the sinewave nature of the output. The total voltage drop can be calculated by subtracting the RMS value of the output voltage from VDD. The internal voltage drop multiplied by the RMS value of the supply current, IDDrms, determines the internal power dissipation of the amplifier. An easy-to-use equation to calculate efficiency starts out as being equal to the ratio of power from the power supply to the power delivered to the load. To accurately calculate the RMS and average values of power in the load and in the amplifier, the current and voltage waveform shapes must first be understood (see Figure 37).
VO IDD
V(LRMS)
IDD(avg)
Figure 37. Voltage and Current Waveforms for BTL Amplifiers Although the voltages and currents for SE and BTL are sinusoidal in the load, currents from the supply are very different between SE and BTL configurations. In an SE application the current waveform is a half-wave rectified shape whereas in BTL it is a full-wave rectified waveform. This means RMS conversion factors are different. Keep in mind that for most of the waveform both the push and pull transistors are not on at the same time, which supports the fact that each amplifier in the BTL device only draws current from the supply for half the waveform. The following equations are the basis for calculating amplifier efficiency. Efficiency of a BTL amplifier Where:
P rms + VLR L L
+ PP L
SUP V P + 2R L 2 L
(8)
2 , and V
P + V2 , LRMS
therefore, P
and
P
+ VDD IDDavg SUP
and I DDavg
+1 p
pV
0
P sin(t) dt R L
1 +p
V
P R L
[cos(t)] 0
p
+ p2V R
P
L
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TPA0252 STEREO 2-W AUDIO POWER AMPLIFIER WITH DIGITAL VOLUME CONTROL
SLOS288 - JUNE 2000
APPLICATION INFORMATION
Therefore, P SUP
+ 2 VDD VP pR
L
substituting PL and PSUP into equation 8,
Efficiency of a BTL amplifier Where: VP
+2 V
VP 2 RL
2
p RL
DD V P
+ 4p VVP
DD
+
2 PL RL
Therefore,
h BTL
+p
2 PL RL 4 V DD
(9)
PL = Power devilered to load PSUP = Power drawn from power supply VLRMS = RMS voltage on BTL load RL = Load resistance VP = Peak voltage on BTL load IDDavg = Average current drawn from the power supply VDD = Power supply voltage BTL = Efficiency of a BTL amplifier Table 3 employs equation 9 to calculate efficiencies for four different output power levels. Note that the efficiency of the amplifier is quite low for lower power levels and rises sharply as power to the load is increased resulting in a nearly flat internal power dissipation over the normal operating range. Note that the internal dissipation at full output power is less than in the half power range. Calculating the efficiency for a specific system is the key to proper power supply design. For a stereo 1-W audio system with 8- loads and a 5-V supply, the maximum draw on the power supply is almost 3.25 W. Table 3. Efficiency vs Output Power in 5-V 8- BTL Systems
OUTPUT POWER (W) 0.25 0.50 1.00 1.25 EFFICIENCY (%) 31.4 44.4 62.8 70.2 PEAK VOLTAGE (V) 2.00 2.83 4.00 4.47 INTERNAL DISSIPATION (W) 0.55 0.62 0.59 0.53
High peak voltages cause the THD to increase.
A final point to remember about class-AB amplifiers (either SE or BTL) is how to manipulate the terms in the efficiency equation to utmost advantage when possible. Note that in equation 9, VDD is in the denominator. This indicates that as VDD goes down, efficiency goes up.
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TPA0252 STEREO 2-W AUDIO POWER AMPLIFIER WITH DIGITAL VOLUME CONTROL
SLOS288 - JUNE 2000
APPLICATION INFORMATION crest factor and thermal considerations
Class-AB power amplifiers dissipate a significant amount of heat in the package under normal operating conditions. A typical music CD requires 12 dB to 15 dB of dynamic range, or headroom above the average power output, to pass the loudest portions of the signal without distortion. In other words, music typically has a crest factor between 12 dB and 15 dB. When determining the optimal ambient operating temperature the internal dissipated power at the average output power level must be used. From the TPA0252 data sheet, one can see that when the TPA0252 is operating from a 5-V supply into a 3- speaker, 4-W peaks are available. Converting Watts to dB: P dB
+ 10 Log
PW P ref
+ 10Log 4W + 6 dB 1W
(10)
Subtracting the headroom restriction to obtain the average listening level without distortion yields: 6 dB - 15 dB = -9 dB (15 dB crest factor) 6 dB - 12 dB = -6 dB (12 dB crest factor) 6 dB - 9 dB = -3 dB (9 dB crest factor) 6 dB - 6 dB = 0 dB (6 dB crest factor) 6 dB - 3 dB = 3 dB (3 dB crest factor) Converting dB back into watts: PW
+ 10PdB 10 Pref + 63 mW (18 dB crest factor) + 125 mW (15 dB crest factor) + 250 mW (9 dB crest factor) + 500 mW (6 dB crest factor) + 1000 mW (3 dB crest factor) + 2000 mW (15 dB crest factor)
(11)
This is valuable information to consider when attempting to estimate the heat dissipation requirements for the amplifier system. Comparing the absolute worst case, which is 2 W of continuous power output with a 3-dB crest factor, against 12-dB and 15-dB applications drastically affects maximum ambient temperature ratings for the system. Using the power dissipation curves for a 5-V, 3- system, the internal dissipation in the TPA0252 and maximum ambient temperatures are shown in Table 4. Table 4. TPA0252 Power Rating, 5-V, 3-, Stereo
PEAK OUTPUT POWER (W) 4 4 4 4 4 4 AVERAGE OUTPUT POWER 2 W (3 dB) 1000 mW (6 dB) 500 mW (9 dB) 250 mW (12 dB) 125 mW (15 dB) 63 mW (18 dB) POWER DISSIPATION (W/Channel) 1.7 1.6 1.4 1.1 0.8 0.6 MAXIMUM AMBIENT TEMPERATURE - 3C 6C 24C 51C 78C 96C
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TPA0252 STEREO 2-W AUDIO POWER AMPLIFIER WITH DIGITAL VOLUME CONTROL
SLOS288 - JUNE 2000
APPLICATION INFORMATION crest factor and thermal considerations (continued)
Table 5. TPA0252 Power Rating, 5-V, 8-, Stereo
PEAK OUTPUT POWER 2.5 W 2.5 W 2.5 W 2.5 W AVERAGE OUTPUT POWER 1250 mW (3 dB crest factor) 1000 mW (4 dB crest factor) 500 mW (7 dB crest factor) 250 mW (10 dB crest factor) POWER DISSIPATION (W/Channel) 0.55 0.62 0.59 0.53 MAXIMUM AMBIENT TEMPERATURE 100C 94C 97C 102C
The maximum dissipated power, PDmax, is reached at a much lower output power level for an 8- load than for a 3 load. As a result, this simple formula for calculating PDmax may be used for an 8- application: P Dmax
DD + p2R L
2V 2
(12)
However, in the case of a 3- load, the PDmax occurs at a point well above the normal operating power level. The amplifier may therefore be operated at a higher ambient temperature than required by the PDmax formula for a 3- load. The maximum ambient temperature depends on the heat sinking ability of the PCB system. The derating factor for the PWP package is shown in the dissipation rating table on page 4. Converting this to JA:
JA
1 1 + Derating Factor + 0.022 + 45C W
(13)
To calculate maximum ambient temperatures, first consider that the numbers from the dissipation graphs are per channel, so the dissipated power needs to be doubled for two-channel operation. Given JA, the maximum allowable junction temperature, and the total internal dissipation, the maximum ambient temperature can be calculated with the following equation. The maximum recommended junction temperature for the TPA0252 is 150C. The internal dissipation figures are taken from the Power Dissipation vs Output Power graphs. T A Max
+ TJ Max * JA PD + 150 * 45 (0.6 2) + 96C (15 dB crest factor)
(14)
NOTE: Internal dissipation of 0.6 W is estimated for a 2-W system with 15-dB crest factor per channel.
Tables 4 and 5 show that for some applications no airflow is required to keep junction temperatures in the specified range. The TPA0252 is designed with thermal protection that turns the device off when the junction temperature surpasses 150C to prevent damage to the IC. Tables 4 and 5 were calculated for maximum listening volume without distortion. When the output level is reduced, the numbers in the table change significantly. Also, using 8- speakers dramatically increases the thermal performance by increasing amplifier efficiency.
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TPA0252 STEREO 2-W AUDIO POWER AMPLIFIER WITH DIGITAL VOLUME CONTROL
SLOS288 - JUNE 2000
APPLICATION INFORMATION PC-BEEP operation
The PC-BEEP input allows a system beep to be sent directly from a computer through the amplifier to the speakers with few external components. The input is activated automatically. When the PC-BEEP input is active, both of the LINEIN and HPIN inputs are deselected and both the left and right channels are driven in BTL mode with the signal from PC-BEEP. The gain from the PC-BEEP input to the speakers is fixed at 0.3 V/V and is independent of the volume setting. When the PC-BEEP input is deselected, the amplifier will return to the previous operating mode and volume setting. Furthermore, if the amplifier is in shutdown mode, activating PC BEEP will take the device out of shutdown and output the PC-BEEP signal, then return the amplifier to shutdown mode. The amplifier will automatically switch to PC-BEEP mode after detecting a valid signal at the PC-BEEP input. The preferred input signal is a square wave or pulse train with an amplitude of 1 Vpp or greater. To be accurately detected, the signal must have a minimum of 1 Vpp amplitude, rise and fall times of less than 0.1 s and a minimum of 8 rising edges. When the signal is no longer detected, the amplifier will return to its previous operating mode and volume setting. If it is desired to ac-couple the PC-BEEP input, the value of the coupling capacitor should be chosen to satisfy the following equation: C PCB
w 2p
1 PCB (100 kW)
(15)
The PC-BEEP input can also be dc-coupled to avoid using this coupling capacitor. The pin normally sits at midrail when no signal is present.
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TPA0252 STEREO 2-W AUDIO POWER AMPLIFIER WITH DIGITAL VOLUME CONTROL
SLOS288 - JUNE 2000
APPLICATION INFORMATION SE/BTL operation
The ability of the TPA0252 to easily switch between BTL and SE modes is one of its most important cost saving features. This feature eliminates the requirement for an additional headphone amplifier in applications where internal stereo speakers are driven in BTL mode but external headphone or speakers must be accommodated. Internal to the TPA0252, two separate amplifiers drive OUT+ and OUT-. The SE/BTL input (terminal 22) controls the operation of the follower amplifier that drives LOUT- and ROUT- (terminals 1 and 11). When SE/BTL is held low, the amplifier is on and the TPA0252 is in the BTL mode. When SE/BTL is held high, the OUT- amplifiers are in a high output impedance state, which configures the TPA0252 as an SE driver from LOUT+ and ROUT+ (terminals 23 and 13). IDD is reduced by approximately one-half in SE mode. Control of the SE/BTL input can be from a logic-level CMOS source or, more typically, from a resistor divider network as shown in Figure 38.
17 16
RHPIN RLINEIN R MUX - +
ROUT+ 13
15
RIN COUTR 330 F VDD 1 k - + ROUT- 11 SE/BTL 22 100 k 100 k
HP/LINE 14
Figure 38. TPA0252 Resistor Divider Network Circuit Using a readily available 1/8-in. (3.5 mm) stereo headphone jack, the control switch is closed when no plug is inserted. When closed the 100-k/1-k divider pulls the SE/BTL input low. When a plug is inserted, the 1-k resistor is disconnected and the SE/BTL input is pulled high. When the input goes high, the OUT- amplifier is shut down causing the speaker to mute (virtually open-circuits the speaker). The OUT+ amplifier then drives through the output capacitor (COUT) into the headphone jack.
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TPA0252 STEREO 2-W AUDIO POWER AMPLIFIER WITH DIGITAL VOLUME CONTROL
SLOS288 - JUNE 2000
Input MUX operation
Right Headphone Input Signal CIRHP 0.47 F
17 16
RHPIN RLINEIN R MUX - +
CIRLINE 0.47 F Right Line Input Signal
ROUT+
13
15 CRIN 0.47 F
RIN
- +
ROUT- SE/BTL HP/LINE
11 22 14
Figure 39. TPA0252 Example Input MUX Circuit The TPA0252 gives the option of using separate headphone inputs (RHPIN, LHPIN) and line inputs (RLINEIN, LLINEIN). The inputs can be different if the input signal is single-ended. If using a differential input signal, the inputs must be the same, because the inputs share a common RIN, LIN. The typical application shows the input mux control signal HP/LINE tied to SE/BTL, but that is not required. The input mux could be used to select between two inputs that are used in both SE and BTL modes. If using the TPA0252 with a single-ended input, the RIN and LIN terminals must be tied through a capacitor to ground. RIN and LIN should not be tied to bypass or an offset will occur on the output causing the device to pop when turning on and off. Input coupling capacitors could be eliminated if using differential inputs but should be used to get maximum output power. If the input capacitors are eliminated, the dc offset must match the voltage on BYPASS or the output power will be limited.
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TPA0252 STEREO 2-W AUDIO POWER AMPLIFIER WITH DIGITAL VOLUME CONTROL
SLOS288 - JUNE 2000
APPLICATION INFORMATION shutdown modes
The TPA0252 employs a shutdown mode of operation designed to reduce supply current, IDD, to the absolute minimum level during periods of nonuse for battery-power conservation. The SHUTDOWN input terminal should be held high during normal operation when the amplifier is in use. Pulling SHUTDOWN low causes the outputs to mute and the amplifier to enter a low-current state, IDD = 150 A. SHUTDOWN should never be left unconnected because amplifier operation would be unpredictable. Table 6. Shutdown and Mute Mode Functions
INPUTS SE/BTL Low X Low High HP/LINE Low X High Low SHUTDOWN High Low High High AMPLIFIER STATE INPUT L/R Line X L/R HP L/R Line L/R HP OUTPUT BTL Mute BTL SE SE
High High High Inputs should never be left unconnected. X = do not care
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TPA0252 STEREO 2-W AUDIO POWER AMPLIFIER WITH DIGITAL VOLUME CONTROL
SLOS288 - JUNE 2000
MECHANICAL DATA
PWP (R-PDSO-G**)
20-PIN SHOWN
PowerPADTM PLASTIC SMALL-OUTLINE PACKAGE
0,65 20
0,30 0,19 11
0,10 M
Thermal Pad (See Note D) 4,50 4,30 6,60 6,20 0,15 NOM
Gage Plane 1 A 10 0- 8 0,25 0,75 0,50
Seating Plane 1,20 MAX 0,15 0,05 PINS ** DIM A MAX A MIN 0,10
14 5,10 4,90
16 5,10 4,90
20 6,60 6,40
24 7,90 7,70
28 9,80 9,60 4073225/E 03/97
NOTES: A. B. C. D.
All linear dimensions are in millimeters. This drawing is subject to change without notice. Body dimensions do not include mold flash or protrusions. The package thermal performance may be enhanced by bonding the thermal pad to an external thermal plane. This pad is electrically and thermally connected to the backside of the die and possibly selected leads. E. Falls within JEDEC MO-153
PowerPAD is a trademark of Texas Instruments Incorporated.
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IMPORTANT NOTICE Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. All products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgment, including those pertaining to warranty, patent infringement, and limitation of liability. TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in accordance with TI's standard warranty. Testing and other quality control techniques are utilized to the extent TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily performed, except those mandated by government requirements. Customers are responsible for their applications using TI components. In order to minimize risks associated with the customer's applications, adequate design and operating safeguards must be provided by the customer to minimize inherent or procedural hazards. TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other intellectual property right of TI covering or relating to any combination, machine, or process in which such semiconductor products or services might be or are used. TI's publication of information regarding any third party's products or services does not constitute TI's approval, warranty or endorsement thereof.
Copyright (c) 2000, Texas Instruments Incorporated


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