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 SN75163B OCTAL GENERAL-PURPOSE INTERFACE BUS TRANSCEIVER
SLLS006A - D2611, OCTOBER 1985 - REVISED FEBRUARY 1993
* * * * * * * *
8-Channel Bidirectional Transceivers Power-Up/Power-Down Protection (Glitch Free) High-Speed Low-Power Schottky Circuitry Low Power Dissipation . . . 66 mW Max Per Channel High-impedance PNP Inputs Receiver Hysteresis . . . 650 mV Typ Open-Collector Driver Output Option No Loading of Bus When Device Is Powered Down (VCC = 0)
DW OR N PACKAGE (TOP VIEW)
GPIB I/O Ports
TE B1 B2 B3 B4 B5 B6 B7 B8 GND
1 2 3 4 5 6 7 8 9 10
20 19 18 17 16 15 14 13 12 11
VCC D1 D2 D3 D4 D5 D6 D7 D8 PE
Terminal I/O Ports
description
The SN75163B octal general-purpose interface NOT RECOMMENDED FOR NEW DESIGN bus transceiver is a monolithic, high-speed, lowpower Schottky device. It is designed for two-way data communications over single-ended transmission lines. The transceiver features driver outputs that can be operated in either the open-collector or 3-state modes. If talk enable (TE) is high, these outputs have the characteristics of open-collector outputs when pullup enable (PE) is low and of 3-state outputs when PE is high. Taking TE low places the outputs in the high-impedance state. The driver outputs are designed to handle loads of up to 48 mA of sink current. Each receiver features pnp transistor inputs for high input impedance and 400 mV of hysteresis for increased noise immunity. Output glitches during power up and power down are eliminated by an internal circuit that disables both the bus and receiver outputs. The outputs do not load the bus when VCC = 0. The SN75163B is characterized for operation from 0C to 70C. Function Tables
EACH DRIVER INPUTS D H L H L X H = high level, TE H H X H L PE H H L L X OUTPUT B H L Z L Z X = irrelevant, B L H X EACH RECEIVER INPUTS TE L L H PE X X X OUTPUT D L H Z
L = low level,
Z = high-impedance state
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
Copyright (c) 1993, Texas Instruments Incorporated
POST OFFICE BOX 655303
* DALLAS, TEXAS 75265
2-1
SN75163B OCTAL GENERAL-PURPOSE INTERFACE BUS TRANSCEIVER
SLLS006A - D2611, OCTOBER 1985 - REVISED FEBRUARY 1993
logic symbol
11 M1 (3S) M2 (0C) TE 1 EN3 (XMT) EN4 (RCV) 19 2 3(1 /2 4 D2 D3 D4 D5 D6 D7 D8 18 17 16 15 14 13 12 1 3 4 5 6 7 8 9 B2 B3 B4 B5 B6 B7 B8 Terminal I/O Ports ) B1
logic diagram (positive logic)
PE 11
PE
TE 1 19 D1 2 D2 18 3 D3 17 4 D4 16 5 B4 D5 15 6 D6 14 7 D7 13 8 D8 12 9 B8 B7 B6 B5 GPIB I/O Ports B3 B2 B1
D1
{ This symbol is in accordance with ANSI/IEEE Std 91-1984 and
IEC Publication 617-12. Designates 3-state outputs Designates open-collector outputs
schematics of inputs and outputs
EQUIVALENT OF ALL CONTROL INPUTS VCC EQUIVALENT OF ALL INPUT/OUTPUT PORTS Req 9 k NOM VCC 10 k NOM
Input 4 k NOM GND GND Input/Output Port Driver output Req = 30 NOM Receiver output Req = 110 NOM
2-2
POST OFFICE BOX 655303
* DALLAS, TEXAS 75265
SN75163B OCTAL GENERAL-PURPOSE INTERFACE BUS TRANSCEIVER
SLLS006A - D2611, OCTOBER 1985 - REVISED FEBRUARY 1993
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, VCC (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V Input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.5 V Low-level driver output current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100 mA Continuous total power dissipation (see Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . See Dissipation Rating Table Operating free-air temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0C to 70C Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . - 65C to 150C Lead temperature 1,6 mm (1/16 inch) from the case for 10 seconds . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260C
NOTES: 1. All voltage values are with respect to network ground terminal. DISSIPATION RATING TABLE PACKAGE DW N TA 25C POWER RATING 1125 mW 1150 mW DERATING FACTOR ABOVE TA = 25C 9.0 mW/C 9.2 mW/C TA = 70C POWER RATING 720 mW 736 mW
recommended operating conditions
MIN Supply voltage, VCC High-level input voltage, VIH Low-level input voltage, VIL High-level High level output current, IOH current High-level High level output current, IOL current Operating free-air temperature, TA Bus ports with pullups active Terminal ports Bus ports Terminal ports 0 4.75 2 0.8 - 10 - 800 48 16 70 NOM 5 MAX 5.25 UNIT V V V mA A mA C
POST OFFICE BOX 655303
* DALLAS, TEXAS 75265
2-3
SN75163B OCTAL GENERAL-PURPOSE INTERFACE BUS TRANSCEIVER
SLLS006A - D2611, OCTOBER 1985 - REVISED FEBRUARY 1993
electrical characteristics over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)
PARAMETER VIK Vhys VOH VOL IOH IOZ II IIH IIL IOS IIL Input clamp voltage Hysteresis (VT + - VT -) High-level High level output voltage Low-level Low level output voltage High-level output current g (open-collector mode) Off-state output current (3-state mode) Input current at maximum input voltage High-level input current Low-level input current Short-circuit Short circuit output current Supply current Bus Terminal Bus Terminal Bus Bus Bus Terminal Terminal Terminal Terminal Bus No load VCC = 5 V to 0, Receivers low and enabled Drivers low and enabled VI/O = 0 to 2 V, f = 1 MHz 30 II = - 18 mA See Figure 8 IOH = - 800 A, IOH = - 10 mA, IOL = 16 mA, IOL = 48 mA, , VO = 5.5 V, D and TE at 2 V PE at 2 V, , TE at 0.8 V VI = 5.5 V VI = 2.7 V VI = 0.5 V - 15 - 25 TE at 0.8 V PE and TE at 2 V TE at 0.8 V PE and TE at 2 V PE at 0.8 V, , VO = 2.7 V VO = 0.4 V 0.2 0.1 - 10 - 35 - 50 0.4 2.7 2.5 TEST CONDITIONS MIN TYP - 0.8 0.65 3.5 3.3 0.3 0.4 0.5 0.5 100 20 - 20 100 20 - 100 - 75 - 125 80 100 MAX - 1.5 UNIT V V V V A A A A A mA mA pF
CI/O(bus) Bus-port capacitance All typical values are at VCC = 5, TA = 25C.
switching characteristics, VCC = 5 V, CL = 15 pF, TA = 25C (unless otherwise noted)
PARAMETER tPLH tPHL tPLH tPHL tPZH tPHZ tPZL tPLZ tPZH tPHZ tPZL tPLZ ten tdis Propagation delay time, low-to-high-level output Propagation delay time, high-to-low-level output Propagation delay time, low-to-high-level output Propagation delay time, high-to-low-level output Output enable time to high level Output disable time from high level Output enable time to low level Output disable time from low level Output enable time to high level Output disable time from high level Output enable time to low level Output disable time from low level Output pullup enable time Output pullup disable time PE Terminal See Figure 5 TE Terminal See Figure 4 TE Bus See Figure 3 FROM (INPUT) Terminal Bus TO (OUTPUT) Bus Terminal TEST CONDITIONS CL = 30 pF, , See Figure 1 , CL = 30 pF, See Figure 2 MIN TYP 14 14 10 15 25 13 22 22 20 12 23 19 15 13 MAX 20 20 20 22 35 22 35 32 30 20 32 30 22 20 ns ns ns UNIT ns ns
2-4
POST OFFICE BOX 655303
* DALLAS, TEXAS 75265
SN75163B OCTAL GENERAL-PURPOSE INTERFACE BUS TRANSCEIVER
SLLS006A - D2611, OCTOBER 1985 - REVISED FEBRUARY 1993
PARAMETER MEASUREMENT INFORMATION
5V 3V PE 200 Output D B 480 50 CL = 30 pF (see Note B) TE 3V TEST CIRCUIT D Input tPLH B Output 2.2 V 1.0 V 1.5 V tPHL 1.5 V 0V VOH 3V
Generator (see Note A)
VOH
VOLTAGE WAVEFORMS
Figure 1. Terminal-to-Bus Test Circuit and Voltage Waveforms
TE 4.3 V Output 240 Generator (see Note A) 50 B D 3 k CL = 30 pF (see Note B) B Input tPLH D Output 1.5 V 1.5 V tPHL VOH 1.5 V VOL 1.5 V 0V 3V
TEST CIRCUIT
VOLTAGE WAVEFORMS
Figure 2. Bus-to-Terminal Test Circuit and Voltage Waveforms
5V 3V PE 200 Output S1 D B S2 B Output S1 to 3 V S2 Open tPZL B Output S1 to GND S2 Closed 1.0 V TE Input 1.5 V tPZH tPHZ 90% 2V 0.8 V tPLZ 3.5 V 0.5 V 1.5 V 0V VOH 3V
480 CL = 15 pF (see Note B) Generator (see Note A) TE 50 TEST CIRCUIT
VOL
VOLTAGE WAVEFORMS
Figure 3. TE-to-Bus Test Circuit and Voltage Waveforms
NOTES: A. The input pulse is supplied by a generator having the following characteristics: PRR 1 MHz, 50% duty cycle, tr 6 ns, tf 6 ns, ZO = 50 . B. CL includes probe and jig capacitance.
POST OFFICE BOX 655303
* DALLAS, TEXAS 75265
2-5
SN75163B OCTAL GENERAL-PURPOSE INTERFACE BUS TRANSCEIVER
SLLS006A - D2611, OCTOBER 1985 - REVISED FEBRUARY 1993
PARAMETER MEASUREMENT INFORMATION
4.3 V Generator (see Note A) TE 50 D 3 k B CL = 15 pF (see Note B) TEST CIRCUIT Output 240 S2 TE Input tPZH D Output S1 to 3 V S2 Open tPZL D Output S1 to GND S2 Closed 1.5 V tPLZ 1.0 V 0.7 V VOLTAGE WAVEFORMS VOL 0V 4V 1.5 V tPHZ 90% 1.5 V 0V VOH 3V
3V
S1
Figure 4. TE-to-Terminal Test Circuit and Voltage Waveforms
Generator (see Note A)
PE PE Input 1.5 V D B RL = 480 B Output CL = 15 pF (see Note B) 2V Output 1.5 V tdis 90% ten
3V
0V VOH VOL = 0.8 V
50
3V TE TEST CIRCUIT VOLTAGE WAVEFORMS
Figure 5. PE-to-Bus Pullup Test Circuit and Voltage Waveforms
NOTES: C. The input pulse is supplied by a generator having the following characteristics: PRR 1 MHz, 50% duty cycle, tr 6 ns, tf 6 ns, ZO = 50 . D. CL includes probe and jig capacitance.
2-6
POST OFFICE BOX 655303
* DALLAS, TEXAS 75265
SN75163B OCTAL GENERAL-PURPOSE INTERFACE BUS TRANSCEIVER
SLLS006A - D2611, OCTOBER 1985 - REVISED FEBRUARY 1993
TYPICAL CHARACTERISTICS
TERMINAL HIGH-LEVEL OUTPUT VOLTAGE vs HIGH-LEVEL OUTPUT CURRENT
4 VOH - High-Level Output Voltage - V VOH 3.5 3 2.5 2 1.5 1 0.5 0 0 - 5 - 10 - 15 - 20 - 25 - 30 - 35 IOH - High-Level Output Current - mA - 40 0 0 10 20 30 40 50 IOL - Low-Level Output Current - mA 60 VCC = 5 V TA = 25C 0.6 VCC = 5 V TA = 25C
TERMINAL LOW-LEVEL OUTPUT VOLTAGE vs LOW-LEVEL OUTPUT CURRENT
VOL - Low-Level Output Voltage - V VOL
0.5
0.4
0.3
0.2
0.1
Figure 6
TERMINAL OUTPUT VOLTAGE vs BUS INPUT VOLTAGE
4 3.5 3 2.5 2 VT- 1.5 1 0.5 0 0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 VI - Input Voltage - V 2 VT+ VCC = 5 V No Load TA = 25C
Figure 7
VO - Output Voltage - V VO
Figure 8
POST OFFICE BOX 655303
* DALLAS, TEXAS 75265
2-7
SN75163B OCTAL GENERAL-PURPOSE INTERFACE BUS TRANSCEIVER
SLLS006A - D2611, OCTOBER 1985 - REVISED FEBRUARY 1993
TYPICAL CHARACTERISTICS
BUS HIGH-LEVEL OUTPUT VOLTAGE vs HIGH-LEVEL OUTPUT CURRENT
0 VOH - High-Level Output Voltage - V VOH VCC = 5 V TA = 25C 3 0.6 VCC = 5 V TA = 25C
BUS LOW-LEVEL OUTPUT VOLTAGE vs LOW-LEVEL OUTPUT CURRENT
VOL VOL - Low-Level Output Voltage - V
0.5
0.4
2
0.3
0.2
1
0.1
0 0 - 10 - 20 - 30 - 40 - 50 - 60 IOH - High-Level Output Current - mA
0 0 10 20 30 40 50 60 70 80 90 100 IOL - Low-Level Output Current - mA
Figure 9
BUS OUTPUT VOLTAGE vs THERMAL INPUT VOLTAGE
4 VCC = 5 V No Load TA = 25C
Figure 10
VO - Output Voltage - V VO
3
2
1
0 0.9
1
1.1
1.2
1.3
1.4
1.5
1.6
1.7
VI - Input Voltage - V
Figure 11
2-8
POST OFFICE BOX 655303
* DALLAS, TEXAS 75265
IMPORTANT NOTICE Texas Instruments (TI) reserves the right to make changes to its products or to discontinue any semiconductor product or service without notice, and advises its customers to obtain the latest version of relevant information to verify, before placing orders, that the information being relied on is current and complete. TI warrants performance of its semiconductor products and related software to the specifications applicable at the time of sale in accordance with TI's standard warranty. Testing and other quality control techniques are utilized to the extent TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily performed, except those mandated by government requirements. Certain applications using semiconductor products may involve potential risks of death, personal injury, or severe property or environmental damage ("Critical Applications"). TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, INTENDED, AUTHORIZED, OR WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT APPLICATIONS, DEVICES OR SYSTEMS OR OTHER CRITICAL APPLICATIONS. Inclusion of TI products in such applications is understood to be fully at the risk of the customer. Use of TI products in such applications requires the written approval of an appropriate TI officer. Questions concerning potential risk applications should be directed to TI through a local SC sales office. In order to minimize risks associated with the customer's applications, adequate design and operating safeguards should be provided by the customer to minimize inherent or procedural hazards. TI assumes no liability for applications assistance, customer product design, software performance, or infringement of patents or services described herein. Nor does TI warrant or represent that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other intellectual property right of TI covering or relating to any combination, machine, or process in which such semiconductor products or services might be or are used.
Copyright (c) 1998, Texas Instruments Incorporated


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