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CS8904 Quad 10Base-T Ethernet Transceiver Technical Reference Manual
Version: 1.0 AN90REV1 January 2, 1997
To obtain technical application support, call (800) 888-5016 (from the US and Canada) or 512-442-7555 (from outside the US and Canada), and ask for CS8904 Application Support, or send an email to: ethernet@crystal.cirrus.com
Crystal Semiconductor Corporation P.O. Box 17847, Austin, Texas 78760 (512) 445 7222 FAX: (512) 445 7581 http//www.crystal.com
Copyright (c) Crystal Semiconductor Corporation 1997 (All Rights Reserved)
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The information contained in this document is subject to change without notice. Crystal Semiconductor Corporation makes no warranty of any kind with regard to this material including, but not limited to, the implied warranties of merchantability and fitness for a particular purpose. Crystal Semiconductor Corporation shall not be liable for errors contained herein or for incidental or consequential damages in connection with the furnishing, performance, or use of this material. This document contains information which is protected by copyright. All rights reserved. No part of this document may be photocopied, reproduced, or translated to another language without the prior written consent of Crystal Semiconductor Corporation. The following are trademarks of Crystal Semiconductor: StreamTransfer, PacketPage, and SMART Analog Other trademarks used in this Technical Reference Manual include: Ethernet is a registered trademark of Xerox Corp. Other product names may be trademarks of their respective companies.
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TABLE OF CONTENTS
Introduction to the CS8904 Technical Reference Manual.....................................................................4 1.0 Typical Installation ....................................................................................................................4 1.1 Evaluation Board Schematics, Bill of Materials, and Layer Plots.......................................4 1.2 Crystal Oscillator ...............................................................................................................13 1.3 LED Drivers.......................................................................................................................13 1.4 10Base-T Interface.............................................................................................................13 2.0 +3 V Operation ........................................................................................................................14 3.0 Transformer Recommendations...............................................................................................14 4.0 Using Multiple CS8904s with a Shared TxCLK .....................................................................15 5.0 Unused Ports ............................................................................................................................15 6.0 Layout Considerations .............................................................................................................15 6.1 Clock ..................................................................................................................................15 6.2 Analog Signals ...................................................................................................................15 6.3 Digital Signals....................................................................................................................16 6.4 Power .................................................................................................................................16
LIST OF FIGURES
Figure 1. Port 0 Schematic....................................................................................................................4 Figure 2. Port 1 Schematic....................................................................................................................5 Figure 3. Port 2 Schematic....................................................................................................................5 Figure 4. Port 3 Schematic....................................................................................................................6 Figure 5. Power Supply Connections ...................................................................................................6 Figure 6. Header Schematic (1 of 2).....................................................................................................6 Figure 7. Header Schematic (2 of 2).....................................................................................................7 Figure 8. EEB8904B Silkscreen ...........................................................................................................8 Figure 9. EEB8904B Component Side .................................................................................................9 Figure 10. EEB8904B Ground Plane..................................................................................................10 Figure 11. EEB8904B Power Plane....................................................................................................11 Figure 12. EEB8904B Solder Side .....................................................................................................12 Figure 13. LED Circuit .......................................................................................................................13 Figure 14. 10Base-T Interface Circuit ................................................................................................14
LIST OF TABLES
Table 1. Table 2. Table 3. Table 4. EEB8904 Bill of Materials .....................................................................................................7 Crystal Oscillator Requirements...........................................................................................13 10Base-T Components for +5.0V and +3.0V Operation ......................................................14 Recommended Transformers................................................................................................14
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INTRODUCTION TO THE CS8904 TECHNICAL REFERENCE MANUAL
This Technical Reference Manual provides information that will be helpful in designing a board using the CS8904 quad transceiver. It is expected that the user of this technical reference manual will have a general knowledge of hardware design and Ethernet. Recommended sources of background information are: a) IEEE Std 802.3u-1995 (ISO/IEC 8802.3:1996) CSMA/CD Access Method and Physical Layer Specifications b) IEEE Std 802.3u-1995 Supplement Clause 28 (Auto-Negotiation)
Figure 1. Port 0 Schematic
c) Ethernet, Building a Communication Infrastructure, by Hegering and Lapple, AddisonWesley, 1993, ISBN 0-201-62405-2 d) Netware Training Guide: Networking Technologies, by Debra Niedenmiller-Chaffis, New Riders Publishing, ISBN 1-56205-363-9
1.0 Typical Installation
This section describes an example CS8904 implementation operating from a +5.0V power supply and using single-port RJ-45 connectors and magnetics.
1.1 Evaluation Board Schematics, Bill of Materials, and Layer Plots
Figures 1 through 7 show the schematic for the CDB8904-1 evaluation board. Figures 8 through 12 contain the layer plots of the 4-layer board. Table 1 lists the bill of materials used.
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Figure 2. Port 1 Schematic Figure 3. Port 2 Schematic
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Figure 5. Power Supply Connections
Figure 4. Port 3 Schematic
Figure 6. Header Schematic (1 of 2)
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Figure 7. Header Schematic (2 of 2)
Item 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 * *
*
Reference # C5..C15 C22, C29, C35, C42 C1 C2, C20, C27, C33, C40 R4, R5, R10, R11, R15, R16, R21, R22 R2, R3, R8, R9, R13, R14, R19, R20 R6, R12, R17, R23 RN1, RN2 R1 D1..D4 Y1 J1..J4 T1..T4 HDR1..HDR6 J5 J6 U1 C3, C4, C16, C17 C18, C19, C21, C23..C26, C28, C30..C32, C34, C36..C39, C41, C43 R7, R18
Description Capacitor, 0.1F, SMT 0805, X7R Capacitor, 68pF, C315 Capacitor, 22F, T350K Capacitor, 0.1F, C320 Resistor, 24.3, 1%, 1/8W, TH Resistor, 49.9, 1%, 1/8W, TH Resistor, 680, 5%, 1/8W, TH Resistor, 4.70k, SIP Resistor, 4.99k, 1%, 1/8W, TH LED Crystal, 20.000MHz Connector, RJ45, 8 pin Transformer, 2, 1:1, 1:1.41 - DIP Header Strips Banana Jacks Banana Jacks Ethernet Controller Capacitor, 68pF, C315 Capacitor, 0.1F, C320
Qty 11 4 1 5 8 8 4 2 1 4 1 4 4 44 1 1 1 0 0
Vendor NIC Kemet Kemet Kemet Transohm
Part Number NMC0805X7R104K2 C315C680J2G5CA T350K226K035AS C320C104K5R5CA 271_24.3
Transohm 271_49.9 Transohm Bourns Transohm DiaLight M-Tron AMP Halo AMP Voltrex Voltrex Crystal 271_680 4606X_101_472 271_4.99K 561-2201-050 ATS-49 55164-1 TD42-2006Q 4-102973-0 3-881-BK (Black) 3-881-R (Red) CS8904
Resistor, 0 ohms, TH
0
* Not Loaded
Table 1. EEB8904 Bill of Materials
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Figure 8. EEB8904B Silkscreen
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Figure 9. EEB8904B Component Side
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Figure 10. EEB8904B Ground Plane
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Figure 11. EEB8904B Power Plane
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Figure 12. EEB8904B Solder Side
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1.2 Crystal Oscillator
The clock to the CS8904 can be supplied by either a crystal or an external CMOS/TTL clock source. The crystal specifications are given in Table 2. The crystal should be connected between XTAL1 and XTAL2 (Pins 38 and 39 respectively) and should be placed as close as possible to the CS8904. If an external clock is used, it should be driven into XTAL1 (Pin 38), and XTAL2 (Pin 39) should be left floating (no connection).
+5V
680 LINKLEDx
1.3 LED Drivers
The CS8904 has 4 LED drivers, one per port, to indicate Link Status. These are open-drain outputs. Figure 13 shows a typical LED implementation. In this example, when a link has been established, the CS8904 LED driver turns on, allowing current to flow in the LED/resistor chain, thus activing the LED. When the link is disconnected, the driver turns off, cutting the current through the LED. The use of an LED is optional. In systems that require use of the LINKLEDx signal, an external pull-up resistor is required. This signal is active low, that is, the output drives to a low voltage when the link is good.
Figure 13. LED Circuit
1.4 10Base-T Interface
Figure 14 shows a typical 10Base-T interface. Transmit and receive lines from the CS8904 are routed to the RJ-45 jack through an isolation transformer. For +5.0V systems, this transformer has a turns ratio of 1:1 between the primary and secondary windings on the receive side (Rx+, Rx-) and 1:1.41 between the primary and secondary windings on the transmit side (Tx+, Tx-). A list of recommended transformers is given in Section 3.0. In Figure 14, the 0.1F capacitors provide for common-mode filtering on the transmit and receive coils. The Rr resistors provide for impedance matching on the receive lines. The Rt resistors and the Ct capacitor provide impedance matching for the transmit lines.
Parameters Parallel Resonant Frequency Resonant Frequency Error Crystal Capacitance Motional Crystal Capacitance Series Resistance (CL = 18 pF) Resonant Frequency Change over Operating Termperature
Min -50 -40 -
Typ 20 0.022 -
Max +50 +40 18 35
Units MHz ppm ppm pF pF
Table 2. Crystal Oscillator Requirements
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CS8904 TXD + TXD Rt Rt Ct 0.1 F
TD -
1 : TRt
TD + 1
2 RJ45
RXD+ + RXD0.1 F Rr Rr
1 : TRr
RD +
3
RD Figure 14. 10Base-T Interface Circuit
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2.0 +3 V Operation
When the CS8904 is operating from a +3.0V power supply, the 10Base-T interface is modified slightly. Namely, the turns ratio between the primary and secondary windings on the transmit isolation transformer must be changed from 1:1.41 to 1:2.5. The turns ratio between the primary and secondary windings on the receive side remain 1:1. Additionally, the values for the impedance matching components change as well. These changes are summarized in Table 3.
Parameter TRt TRr Rr Rt Ct +5.0 V 1:1.41 1:1 49.9 24.3 68 pF +3.0 V 1:2.5 1:1 49.9 8 560 pF
3.0 Transformer Recommendations
Table 4 lists manufacturers and part numbers for transformers suitable for use with the CS8904 in +5.0V systems.
Vendor CMC? Through-hole Surface-mount TG42-1406N1 TG43-1406N PE-65745 PE-65746 ST7011 ST7010 TG44-1406NX TG46-1406NX PE-68065 PE-68062 ST4212-1 ST4212-2
Table 3. 10Base-T Components for +5.0V and +3.0V Operation
Single-Port Transformers Halo N TD42-2006Q Y TD43-2006K Pulse N PE-65994 Y PE-65998 Valor N PT4069 Y PT4068 Quad-Port Transformers Halo N Y Pulse N Y Valor N Y
Table 4. Recommended Transformers
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4.0 Using Multiple CS8904s with a Shared TxCLK
When the connecting a set of CS8904s to a MAC having a single TxCLK input, some design considerations must be met: 1. All CS8904s must operate from the same clock source. 2. A shared hardware RESET signal must be applied to all CS8904's after power-up. 3. The TxCLK signal should be taken from exactly one CS8904 and routed to the TxCLK input on the media access controller. TxCLKs on the other CS8904's should be left unconnected. side of the board close to XTAL1 and XTAL2 (within one inch). Crystal traces should be short and should contain no vias. If the clock is supplied by an external CMOS/TTL source, the traces should be as short as possible.
6.2 Analog Signals
t The 4.99 K biasing resistor should be placed
close to pins 15 (AVSS0) and 16 (RES). The connection between the biasing resistor and AVSS0 should be made with a short trace.
t The isolation transformers should be placed as
close as possible to the RJ-45 connectors. If common-mode chokes are employed, they must be placed on the RJ-45 side of the isolation transformers.
5.0 Unused Ports
Ports that are not used in the system (those that have no external RJ-45 connection) should be configured as follows: 1. LOOPx should be asserted (polarity depends on MODE pins). 2. TxENBLx should be deasserted (polarity depends on MODE pins). 3. AUTOSELx, DUPSELx, and TxDATAx should all be tied high. 4. Tx+/Tx- should be left floating (no connection). 5. Rx+/Rx- should be tied together.
t Traces in the 10Base-T signal path, those leading from Rx+/Rx-, Tx+/Tx- on the CS8904 through the isolation transformer and out to the RJ-45 jack, should be direct and short. The trace width on the receive traces should be at least 25 mills (50 characteristic impedance at 10 Mhz) and the trace width on the transmit traces should be at least 100 mills wide (25 characteristic impedance at 10 MHz). Particular care should be taken to match the characteristic impedance of each transmit trace to the value of Rt (in Figure 14). For a +5.0V, 2-layer board using FR-4 laminate with a thickness of 0.0625", two 100 mill traces w/ ground plane underneath yield a characteristic impedance that approximately matches Rt.
6.0 Layout Considerations
The CS8904 is a mixed-signal device, that is, it implements both sensitive analog circuitry and digital control and preprocessing circuitry on a single chip. The mixed-signal nature of the device makes it sensitive to component placement and routing. Below is a checklist of guidelines system designers should follow in laying out a printed circuit board.
t Route each differential signal pair for the transmit lines and the receive lines adjacently. For example, the trace leading from Rx+ should be routed parallel to the trace leading from Rx-. Additionally, special care should be taken to ensure that these traces have the same length.
6.1 Clock
t If the clock is supplied by an 20 Mhz crystal,
that crystal should be placed on the component
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t Add either "ground shield" traces or use ground
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plane fill around each transmitter's differential signal pair. For example, the traces GND, Tx+, Tx-, GND, form a shielded differential signal pair. If the ground shield traces are used, they should be `stitched', or tied to the groundplane periodically along their length. Figure 9 shows an example of using ground shielding traces on the transmit lines. The use of ground plane fill on all trace layers is strongly recommended. TA, TxENBL), should not be routed under the CS8904 and should be kept as far as possible from the analog traces.
6.4 Power
t Each power supply pin should be decoupled by
its own small-valued (0.1F or 0.01F) decoupling capacitor. Each of these capacitors should be placed as close as possible to the power supply pins they decouple. Power supply traces, as well as traces to the decoupling capacitors, should typically be as wide as possible
6.3 Digital Signals
t Digital signals, particularly the MAC data signals (RxCLK, RxDATA, CD, TxCLK, TxDA-
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