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| FDH27N50 August 2002 FDH27N50 27A, 500V, 0.19 Ohm, N-Channel SMPS Power MOSFET Applications Switch Mode Power Supplies(SMPS), such as * PFC Boost * Two-Switch Forward Converter * Single Switch Forward Converter * Flyback Converter * Buck Converter * High Speed Switching Features * Low Gate Charge Qg results in Simple Drive Requirement * Improved Gate, Avalanche and High Reapplied dv/dt Ruggedness * Reduced rDS(ON) * Reduced Miller Capacitance and Low Input Capacitance * Improved Switching Speed with Low EMI * 175C Rated Junction Temperature Package JEDEC TO-247 SOURCE DRAIN GATE Symbol D DRAIN (FLANGE) G S Absolute Maximum Ratings TC = 25oC unless otherwise noted Symbol VDSS VGS Parameter Drain to Source Voltage Gate to Source Voltage Drain Current ID Continuous (TC = 25oC, VGS = 10V) Continuous (TC = 100 C, VGS = 10V) Pulsed (Note 1) PD TJ, TSTG Power dissipation Derate above 25oC Operating and Storage Temperature Soldering Temperature for 10 seconds Mounting Torque, 8-32 or M3 Screw o Ratings 500 30 27 19 108 450 3 -55 to 175 300 (1.6mm from case) 10ibf*in (1.1N*m) Units V V A A A W W/oC o o C C Thermal Characteristics RJC RCS RJA Thermal Resistance Junction to Case Thermal Resistance Case to Sink, Flat, Greased Surface Thermal Resistance Junction to Ambient 0.33 0.24 TYP 40 o C/W C/W oC/W o (c)2002 Fairchild Semiconductor Corporation FDH27N50 Rev. A2 FDH27N50 Package Marking and Ordering Information Device Marking FDH27N50 Device FDH27N50 Package TO-247 Reel Size Tube Tape Width Quantity 30 Electrical Characteristics Tc = 25C (unless otherwise noted) Symbol Parameter Test Conditions Min Typ Max Units Statics BVDSS Drain to Source Breakdown Voltage ID = 250A, VGS = 0V Reference to 25oC ID = 1mA VGS = 10V, ID = 13.5A VDS = VGS, ID = 250A VDS = 500V VGS = 0V VGS = 30V TC =25oC TC = 150oC 500 2.0 0.64 0.17 3.3 0.19 4.0 25 250 100 V V/C V A nA BVDSS/TJ Breakdown Voltage Temp. Coefficient rDS(ON) VGS(th) IDSS IGSS Drain to Source On-Resistance Gate Threshold Voltage Zero Gate Voltage Drain Current Gate to Source Leakage Current Dynamics gfs Qg(TOT) Qgs Qgd td(ON) tr td(OFF) tf CISS COSS CRSS Forward Transconductance Total Gate Charge at 10V Gate to Source Gate Charge Gate to Drain "Miller" Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Input Capacitance Output Capacitance Reverse Transfer Capacitance VDS = 50V, ID = 13.5A VGS = 10V VDS = 400V ID = 27A VDD = 250V ID = 27A RG = 4.3 RD = 9.3 VDS = 25V, VGS = 0V f = 1MHz 11 56 17 18 14 54 47 54 3550 409 22 67 20 22 S nC nC nC ns ns ns ns pF pF pF Avalanche Characteristics EAS IAR Single Pulse Avalanche Energy (Note 2) Avalanche Current 2552 27 mJ A Drain-Source Diode Characteristics IS ISM VSD trr QRR Notes: 1: Repetitive rating; pulse width limited by maximum junction temperature 2: Starting TJ = 25C, L = 7mH, IAS = 27A Continuous Source Current (Body Diode) Pulsed Source Current (Note 1) (Body Diode) Source to Drain Diode Voltage Reverse Recovery Time Reverse Recovered Charge MOSFET symbol showing the G integral reverse p-n junction diode. ISD = 27A D - 0.89 563 9.2 27 108 1.2 714 14 A A V ns C S ISD = 27A, dISD/dt = 100A/s ISD = 27A, dISD/dt = 100A/s (c)2002 Fairchild Semiconductor Corporation FDH27N50 Rev. A2 FDH27N50 Typical Characteristics 200 ID, DRAIN TO SOURCE CURRENT (A) ID, DRAIN TO SOURCE CURRENT (A) TJ = 25oC VGS DESCENDING 100 10V 7V 6V 5.5V 5V 4.5V 10 200 100 TJ = 175oC VGS DESCENDING 10V 6V 5.5V 5V 4.5V 4V 10 PULSE DURATION = 80s DUTY CYCLE = 0.5% MAX 1 1 10 100 PULSE DURATION = 80s DUTY CYCLE = 0.5% MAX 1 1 10 100 VDS, DRAIN TO SOURCE VOLTAGE (V) VDS, DRAIN TO SOURCE VOLTAGE (V) Figure 1. Output Characteristics 100 90 NORMALIZED DRAIN to SOURCE ON RESISTANCE 3.5 3.0 2.5 2.0 1.5 1.0 0.5 Figure 2. Output Characteristics ID , DRAIN CURRENT (A) 80 70 60 50 40 30 20 10 PULSE DURATION = 80s DUTY CYCLE = 0.5% MAX VDD = 80V PULSE DURATION = 80s DUTY CYCLE = 0.5% MAX TJ = 175oC TJ = 25oC VGS = 10V, ID = 13.5A 0 -50 -25 0 25 50 75 100 125 150 175 0 3.0 3.5 4.0 4.5 5.0 5.5 6.0 6.5 VGS , GATE TO SOURCE VOLTAGE (V) TJ, JUNCTION TEMPERATURE (oC) Figure 3. Transfer Characteristics Figure 4. Normalized Drain To Source On Resistance vs Junction Temperatrue 12 10000 VGS = 0V, f = 1MHz CISS VGS , GATE TO SOURCE VOLTAGE (V) ID = 27A 10 100V 8 250V C, CAPACITANCE (pF) 1000 COSS 6 400V 4 100 CRSS 2 10 1 10 100 0 0 10 20 30 40 50 60 70 VDS , DRAIN TO SOURCE VOLTAGE (V) Qg, GATE CHARGE (nC) Figure 5. Capacitance vs Drain To Source Voltage Figure 6. Gate Charge Waveforms For Constant Gate Current (c)2002 Fairchild Semiconductor Corporation FDH27N50 Rev. A2 FDH27N50 Typical Characteristics (Continued) ISD , SOURCE TO DRAIN CURRENT (A) 60 200 100 50 ID, DRAIN CURRENT (A) 40 100s 10 OPERATION IN THIS AREA LIMITED BY RDS(ON) 1ms 10ms DC 30 TJ = 175oC 20 TJ = 25oC 1 10 TC = 25oC 0 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 1.1 0.1 1 10 100 1000 VSD , SOURCE TO DRAIN VOLTAGE (V) VDS , DRAIN TO SOURCE VOLTAGE (V) Figure 7. Body Diode Forward Voltage vs Body Diode Current 30 Figure 8. Maximum Safe Operating Area 25 ID, DRAIN CURRENT (A) 20 15 10 5 0 25 50 75 100 125 150 175 TC, CASE TEMPERATURE (C) Figure 9. Maximum Drain Current vs Case Temperature ZJC , NORMALIZED THERMAL IMPEDANCE 100 0.50 0.20 0.10 10-1 t1 0.05 0.02 PD t2 DUTY FACTOR, D = t1 / t2 PEAK TJ = (PD X ZJC X RJC) + TC SINGLE PULSE 10-4 10-3 10-2 10-1 100 101 0.01 10-2 10-5 t1 , RECTANGULAR PULSE DURATION (s) Figure 10. Normalized Maximum Transient Thermal Impedance (c)2002 Fairchild Semiconductor Corporation FDH27N50 Rev. A2 FDH27N50 Test Circuits and Waveforms VDS tP L IAS VARY tP TO OBTAIN REQUIRED PEAK IAS VGS DUT tP 0V RG - BVDSS VDS VDD + VDD IAS 0.01 0 tAV Figure 11. Unclamped Energy Test Circuit Figure 12. Unclamped Energy Waveforms VDS RL Qg(TOT) VDS VGS = 10V VGS + VDD DUT Ig(REF) 0 VGS VGS = 1V Qg(TH) Qgs Ig(REF) 0 Qgd Figure 13. Gate Charge Test Circuit Figure 14. Gate Charge Waveforms VDS tON td(ON) RL VDS 90% tr tOFF td(OFF) tf 90% VGS + VDD DUT 0 10% 10% 90% VGS 50% PULSE WIDTH 50% RGS VGS 0 10% Figure 15. Switching Time Test Circuit Figure 16. Switching Time Waveform (c)2002 Fairchild Semiconductor Corporation FDH27N50 Rev. A2 TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. ACEx FACT ActiveArray FACT Quiet Series Bottomless FASTa CoolFET FASTr CROSSVOLT FRFET DOME GlobalOptoisolator EcoSPARK GTO E2CMOSTM HiSeC EnSignaTM I2C Across the board. Around the world. The Power Franchise Programmable Active Droop DISCLAIMER ImpliedDisconnect PACMAN POP ISOPLANAR Power247 LittleFET PowerTrencha MicroFET QFET MicroPak QS MICROWIRE QT Optoelectronics MSX Quiet Series MSXPro RapidConfigure OCX RapidConnect OCXPro SILENT SWITCHERa OPTOLOGICa SMART START OPTOPLANAR SPM Stealth SuperSOT-3 SuperSOT-6 SuperSOT-8 SyncFET TinyLogic TruTranslation UHC UltraFETa VCX FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. LIFE SUPPORT POLICY FAIRCHILDS PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 2. A critical component is any component of a life 1. Life support devices or systems are devices or support device or system whose failure to perform can systems which, (a) are intended for surgical implant into be reasonably expected to cause the failure of the life the body, or (b) support or sustain life, or (c) whose support device or system, or to affect its safety or failure to perform when properly used in accordance with instructions for use provided in the labeling, can be effectiveness. reasonably expected to result in significant injury to the user. PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Advance Information Product Status Formative or In Design First Production Definition This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only. Preliminary No Identification Needed Full Production Obsolete Not In Production Rev. I1 |
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