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| www.fairchildsemi.com FAN5660 Monolithic Inductorless CMOS DC/DC Converter Features * * * * * * * Inverts, Doubles or Splits Input Supply Voltage 90% Typ Conversion Efficiency at 100mA load current 0.5V Typ Loss at 100mA Load Low 160A Operating Current 5.0 Typ Output Resistance for C1 = C2 = 100F Selectable Oscillator Frequency: 5kHz/50kHz 8-pin SOIC package. General Description The FAN5660 is a monolithic charge-pump which can invert, double or split a +1.5V to +5.5V input voltage. Using only two identical low-cost capacitors, the charge pump replaces switching regulators, thus eliminating inductors and their associated cost, size, and EMI. The device has a greater than 90% efficiency over most of its load current range and a typical operating current of only 160A. The FAN5660 is ideal for both battery-powered and boardlevel voltage conversion applications. In order to enable the user optimize capacitor size and quiescent current, the FAN5660 is offered with a frequency control (FC) pin which selects either 5kHz or 50kHz operation. The Oscillator frequency can also be driven with an external clock. The FAN5660 is available in 8-pin small-outline packages. Applications * * * * * Laptop Computers Medical Instruments Interface Power Supplies Hand-Held Instruments Operational-Amplifier Power Supplies Simplified Block Diagram CAP+ CAP- VSS V+ VSH CONTROL LV SYNC OSCILLATOR FC REV. 1.0.2 3/28/02 FAN5660 Pin Configuration FC 1 CAP+ 2 FAN5660 VSS 3 CAP4 SOIC 6 5 LV VSH 8 7 V+ SYNC Typical Applications VIN FC CAP+ + C1 VSS CAP- V+ SYNC FC CAP+ V+ + SYNC C2 VOUT = 2VIN LV VOUT = -VIN VSH RL + C2 + C1 +VIN VSS CAPLV VSH C1 = C2 = 1 to 470F C1 = C2 = 1 to 470F Figure 1. Inverter, Test Circuit Figure 2. Doubler FC CAP+ + VOUT = -VIN/2 C1 VSS CAPC2 FAN5660 V+ SYNC VIN LV + VSH C1 = C2 = 1 to 470F Figure 3. Splitter 2 REV. 1.0.2 3/28/02 FAN5660 Pin Definition Pin Number 1 Pin Name FC Pin Function Description Inverter Splitter Doubler Same as Inverter Frequency Control for Internal Same as Inverter Oscillator, FC open, fOSC = 5kHz typ; FC = V+, fOSC = 50kHz typ. FC has no effect when SYNC pin is driven externally Charge-Pump Capacitor, Positive Terminal Power-Supply Ground Input Charge-Pump Capacitor, Negative Terminal Output, Negative Voltage Low-Voltage Operation Input. Tie LV to VSS when input voltage is less than 2V. Above 2V, LV must be left open. Oscillator Control Input. An external Oscillator may be connected to overdrive SYNC via a 2 to 5 nF capacitor. SYNC shall not be connected to a low impedance DC voltage 8 V+ Power-Supply Positive Voltage Input Positive Voltage Input Positive Voltage Output Same as Inverter Power-Supply Positive Voltage Output Same as Inverter Power-Supply Ground Input LV must be left open for all input voltages 2 3 4 5 6 CAP+ VSS CAPVSH LV Same as Inverter Power-Supply Positive Voltage Input Same as Inverter Power-Supply Ground Input LV must be left open for all input voltages 7 SYNC Same as inverter, however, Same as inverter, do not use SYNC in however, do not use voltage-splitting mode. SYNC in voltagedoubling mode. REV. 1.0.2 3/28/02 3 FAN5660 Absolute Maximum Ratings Absolute maximum ratings are the values beyond which the device may be damaged or have its useful life impaired. Functional operation under these conditions is not implied. Parameter Supply Voltage: V+ to VSS VSH Voltage to VSS Voltage on all other pin to VSS VSH and V+ Continuous Output Current (Note 1) Junction Temperature Storage Temperature Lead Soldering Temperature, 10 seconds Electrostatic Discharge Protection (Note 2) Power Dissipation (PD) at 85C 4 300 -40 Min. -0.3 -6 -0.3 Max. 6 0.3 (V+) + 0.3 120 125 150 300 Units V V V mA C C C kV mW Notes 1. VSH must not be shorted to VSS or V+, even instantaeously, or device damage may result. 2. Using Mil Std. 883E, method 3015.7(Human Body Model), 400V when using JEDEC method A115-A (Machine Model). Recommended Operating Conditions Parameter Supply Voltage V+ to VSS or VSS to VSH External SYNC signal Ambient Operating Temperature Conditions LV open LV = VSS Connected via C =2 to 5 nF TA -40 Min. 2 1.5 2 85 Typ. Max. 5.5 2 V peak to peak C Units V Electrical Specifications V+ = 5V, RL = , and TA = +25C using circuit in Figure 1 with C1 = C2 = 100F, FC and LV open, unless otherwise specified (Note 3) Parameter Quiescent Current Output Current Output Resistance Oscillator Frequency Power Efficiency Symbol IIN IVSH RVSH fOSC FC open FC to V+ VSH more negative than -4V 100mA load current FC open FC to V+ RL=1k RL=0.5k 100mA load current Voltage Conversion Efficiency V 99 2.5 30 96 92 100 5 5 50 98 96 90 99.96 % 8 10 90 % Conditions Min. Typ. 0.16 1 Max. 0.5 2 mA kHz Units mA Note 3 . In the test circuit, capacitors C1 and C2 are 0.2 maximum ESR capacitors. Capacitors with higher ESR will increase output resistance, reduce output voltage and efficiency. 4 REV. 1.0.2 3/28/02 FAN5660 Typical Applications Diagrams Unless otherwise specified TA=25C,V+=5V, C1=C2=100F, Iload=0, FC and LV open, using circuit in Figure 1 Supply Current vs. Supply Voltage 1.2 1.0 Supply Current (mA) 0.8 0.6 0.4 0.2 0 FC = V+, LV = GND FC = V+ Supply Current (mA) 1.8 1.6 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0 2 3 4 5 6 1 10 Oscillator frequency (kHz) 100 Supply Voltage (V) Supply Current vs. Oscillator Frequency LV to GND 1 FC and LV open Oscillator Frequency vs. Supply Voltage, FC to V+ 60 Oscillator Frequency (kHz) LV to GND Oscillator Frequency (kHz) 7 Oscillator Frequency vs. Supply Voltage 55 6 50 5 45 4 LV to GND 3 1.5 2 2.5 3 3.5 4 4.5 5 5.5 40 1.5 2 2.5 3 3.5 4 4.5 5 5.5 Supply Voltage (V) Supply Voltage (V) Efficiency vs. Operating Frequency 100 Iload = 10mA 0.95 90 Efficiency (%) Efficiency (%) Iload = 80mA 80 0.90 1.00 Efficiency vs. Load Current V+ = 5.5V V+ = 4.5V 0.85 0.80 0.75 0.70 1 10 Operating Frequency (kHz) 100 0 20 40 60 80 100 120 Load Current (mA) V+ = 1.5V V+ = 2.5V V+ = 3.5V 70 Iload = 1mA 60 REV. 1.0.2 3/28/02 5 FAN5660 Typical Applications Diagrams (continued) Output Voltage vs. Frequency -5.0 -4.8 Output Voltage (V) -4.7 -4.6 -4.5 -4.4 -4.3 -4.2 -4.1 -4.0 1 10 Operating Frequency (kHz) 100 Iload = 80mA Iload = 10mA Oscillator Frequency (kHz) -4.9 Iload = 1mA 7 6 5 4 3 2 -10 0 10 20 30 40 50 60 70 80 90 Temperature (C) 8 V+ = 5.5V Oscillator Frequency vs. Temperature V+ = 1.8V Oscillator Frequency vs. Temperature, FC to Vin Output Source Resistance (ohm) 70 Oscillator Frequency (kHz) 65 60 55 50 45 40 35 30 -10 V+ = 1.8V V+ = 5.5V 12 Output Source Resistance vs. Supply Voltage Iout = 50mA 10 8 25 deg C 6 -10 deg C 1.5 2.5 3.5 Supply Voltage (V) 4.5 5.5 80 deg C 4 0 10 20 30 40 50 60 70 80 90 Temperature (C) Output Current vs. Capacitance (at Voltage Efficiency = 90%) 100 Voltage Drop from Supply (V) V+ = 5V V+ = 4V Output Current 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0 0 10 20 30 40 50 0 Output Voltage Drop vs. Load Current V+ = 2.5V V+ = 1.5V V+ = 3.5V V+ = 3V 50 V+ = 4.5V V+ = 5.5V 0 Capacitance (F) 25 50 75 100 125 Load Current (mA) 6 REV. 1.0.2 3/28/02 FAN5660 Application Information The FAN5660 capacitive charge pump circuit either inverts, splits or doubles the input voltage (see Typical Applications). For highest performance, capacitors with low effective series resistance (ESR) should be used (see Capacitor Selection section for more details). When using the inverting mode with a supply voltage less than 2V, LV may be connected to VSS. This bypasses the internal regulator circuitry and provides best performance in low-voltage applications. When using the inverter mode with a supply voltage above 2V, LV must be left open. Positive Voltage Doubler The FAN5660 operates in the voltage-doubling mode as shown in Figure 2. The no-load output is 2 x VIN. Positive Voltage Splitter The FAN5660 operates in voltage splitting mode as shown Figure 3. The no-load output is VIN/2. Changing Oscillator Frequency Three modes control the FAN5660's clock frequency, as listed below: FC Open FC = V+ Open SYNC Open Open External Clock Oscillator frequency 5kHz 50kHz External Clock Frequency Negative Voltage Converter The most common application of the FAN5660 is as a charge pump voltage inverter. The operating circuit uses only two identical external capacitors, C1 and C2 (see Typical Circuits). Even though its output is not actively regulated, the FAN5660 is very insensitive to load current changes. A typical output source resistance of 5 means that with an input of +5V the output voltage is -5V under light load, and decreases only to 4.5V with a load of 100mA. Capacitors selection Low ESR capacitors should be used at the output of FAN5660 to minimize output ripple, output resistance and to maximize efficiency. This can be achieved using ceramic capacitors, but certain types of tantalum capacitors may be sufficient. Output ripple voltage is calculated observing that the output current is solely supplied from capacitor C2 during one-half of the charge-pump cycle. This introduces a peak-to-peak ripple of: VRIPPLE = IVSH/(2f x C2 ) + IVSH x (ESR C2) For example, for a nominal f= 5kHz and C2 = 100F with an ESR of 0.05, ripple is approximately 100mV with a 100mA load current. If C2 is raised to 470F, the ripple drops to approximately 25mV. When FC and SYNC are unconnected (open), the Oscillator runs at 5kHz. When FC is connected to V+, the Oscillator frequency increases 10 times. In the inverter mode, SYNC may also be overdriven by an external clock source. A square wave signal of 2V peak-to-peak typical may be applied to SYNC via a 2 to 5nF capacitor to overdrive the internal oscillator. When SYNC is overdriven, FC has no effect. In some applications, the 5kHz output ripple frequency may be low enough to interfere with other circuitry. If desired, the Oscillator frequency can then be increased through use of the FC pin or an external Oscillator as described above. Increasing the clock frequency increases the FAN5660's quiescent current, but also allows smaller capacitance value to be used for C1 and C2. REV. 1.0.2 3/28/02 7 FAN5660 Package Dimensions 8-Pin SOIC Inches Min. A A1 B C D E e H h L N ccc .053 .004 .013 .0075 .189 Max. .069 .010 .020 .010 .197 Millimeters Min. 1.35 0.10 0.33 0.20 4.80 Max. 1.75 0.25 0.51 0.25 5.00 5 2 2 Notes: Notes 1. Dimensioning and tolerancing per ANSI Y14.5M-1982. 2. "D" and "E" do not include mold flash. Mold flash or protrusions shall not exceed .010 inch (0.25mm). 3. "L" is the length of terminal for soldering to a substrate. 4. Terminal numbers are shown for reference only. 5. "C" dimension does not include solder finish thickness. 6. Symbol "N" is the maximum number of terminals. Symbol .150 .158 .050 BSC .228 .010 .016 8 0 -- 8 .004 .244 .020 .050 3.81 4.01 1.27 BSC 5.79 0.25 0.40 8 0 -- 8 0.10 6.20 0.50 1.27 3 6 8 5 E H 1 4 D A1 A SEATING PLANE B -C- LEAD COPLANARITY ccc C h x 45 C e L 8 REV. 1.0.2 3/28/02 FAN5660 Ordering Information TA = -40C to +85C Part Number FAN5660IM FAN5660IMX Package 8-Pin SOIC,Tubes 8-Pin SOIC, Tape and Reel DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. LIFE SUPPORT POLICY FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury of the user. www.fairchildsemi.com 3/28/02 0.0m 001 Stock#DS3005660 2002 Fairchild Semiconductor Corporation 2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. |
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