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Integrated Circuit Systems, Inc. ICS8343I LOW SKEW 1-TO-16 FANOUT BUFFER FEATURES * 16 LVCMOS outputs * Output frequency up to 200MHz * 250ps output skew ** 700ps part to part * CMOS compatible clock input at 5V, LVTTL and LVCMOS compatible at 3.3V and 2.5V * LVTTL output enable inputs * Dual output enable inputs facilitates 1-to-16 or 1-to-8 input to output modes * 5.0V, 3.3V, 2.5V or mixed 3.3V, 2.5V from -40C to 85C ambient operating temperature * 32 lead low-profile QFP(LQFP), 7mm x 7mm x 1.4mm package body, 0.8mm package lead pitch GENERAL DESCRIPTION The ICS8343I is a low skew, 1-to-16 Fanout ,&6 Buffer and a member of the HiPerClockSTM family HiPerClockSTM of High Performance Clock Solutions from ICS. The ICS8343I is at 5.0V, 3.3V, 2.5V and mixed 3.3V input and 2.5V supply modes over the commercial temperature range. Guaranteed output and part-topart skew characteristics make the ICS8343I ideal for those clock distribution applications demanding well defined performance and repeatability. BLOCK DIAGRAM VDD1 VDD VDD2 PIN ASSIGNMENT OE1 OE2 Q15 Q14 Q13 Q2 Q1 Q0 32 31 30 29 28 27 26 25 CLK VDD1 Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7 Q15 Q14 Q13 Q12 Q11 Q10 Q9 Q8 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 Q5 Q6 Q7 CLK VDD Q8 Q9 Q10 24 23 22 VDD2 VDD2 VDD2 Q12 Q11 GND GND GND VDD1 VDD1 Q3 Q4 GND GND GND ICS8343I 21 20 19 18 17 OE1 GND OE2 32-Lead LQFP Y package Top View 8343I www.icst.com/products/hiperclocks.html 1 REV. B MARCH 8, 2001 Integrated Circuit Systems, Inc. ICS8343I LOW SKEW 1-TO-16 FANOUT BUFFER Type Power Output Power Output Input Power Output Power Output Power Output Input Input Output Pullup Pullup Description Output Q0 thru Q7 power supply. Connect to 5V, 3.3V or 2.5V. Clock outputs. 14 typical output impedance. Connect to ground. Clock outputs. 14 typical output impedance. Clock input. Input power supply. Connect to 5V, 3.3V or 2.5V Clock outputs. 14 typical output impedance. Connect to ground. Clock outputs. 14 typical output impedance. Output Q8 thru Q15 power supply. Connect to 5V, 3.3V or 2.5V. Clock outputs. 14 typical output impedance. Output enable. When low forces outputs Q8 thru Q15 to HiZ state. Output enable. When low forces outputs Q0 thru Q7 to HiZ state. Clock outputs. 14 typical output impedance. TABLE 1. PIN DESCRIPTIONS Number 1, 2, 3 4, 5 6, 7, 8 9, 10, 11 12 13 14, 15, 16 17, 18, 19 20, 21 22, 23, 24 25, 26, 27 28 29 30, 31, 32 Name VDD1 Q3, Q4 GND Q5, Q6, Q7 CLK VDD Q8, Q9, Q10 GND Q11, Q12 VDD2 Q13, Q14, Q15 OE2 OE1 Q0, Q1, Q2 TABLE 2. PIN CHARACTERISTICS Symbol CIN Parameter Input Capacitance Power Dissipation Capacitance (per output) Input Pullup Resistor Input Pulldown Resistor CLK OE1, OE2 VDD1, VDD2 = 5.25V VDD1, VDD2 = 3.47V VDD1, VDD2 = 2.63V 15 11 9.5 Test Conditions Minimum Typical Maximum Units pF pF pF pF pF pF pF CPD RPULLUP RPULLDOWN ROUT TABLE 3. FUNCTION TABLE Inputs OE1 0 1 0 1 OE2 0 0 1 1 Q0 thru Q7 Hi Z Active Hi Z Active Outputs Q8 thru Q15 Hi Z Hi Z Active Active 8343I www.icst.com/products/hiperclocks.html 2 REV. B MARCH 8, 2001 Integrated Circuit Systems, Inc. ICS8343I LOW SKEW 1-TO-16 FANOUT BUFFER 7V -0.5V to VDD+0.5 V -0.5V to VDD+0.5V -40C to 85C -65C to 150C ABSOLUTE MAXIMUM RATINGS Supply Voltage Inputs Outputs Ambient Operating Temperature Storage Temperature Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These ratings are stress specifications only and functional operation of the device at these or any conditions beyond those listed in the DC Characteristics or AC Characteristics is not implied. Exposure to absolute maximum rating conditions for extended periods may affect product reliability. TABLE 4A. POWER SUPPLY DC CHARACTERISTICS, VDD = VDD1 = VDD2 = 5V5%, TA = -40 TO 85C Symbol Parameter VDD, VDD1, VDD2 Operating Supply Voltage IDD Input Operating Supply Current Test Conditions VDD = VDDx = 5.25V Minimum 4.75 Typical 5.0 Maximum 5.25 110 Units V A TABLE 4B. LVCMOS DC CHARACTERISTICS, VDD = VDD1 = VDD2 = 5V5%, TA = -40 TO 85C Symbol Parameter VIH Input High Voltage CLK OEx VIL IIH IIL VOH VOL IOZH IOZL Input Low Voltage Input High Current Input Low Current Output High Voltage Output Low Voltage High Impedance Leakage Current High Impedance Leakage Current CLK OEx CLK OEx CLK OEx Test Conditions VDD = 4.75V VDD = 5.25V VDD = 5.25V VDD = 4.75V VDD = 5.25V VDD = 4.75V VDD = VIN = 5.25V VDD = VIN = 5.25 VDD = 5.25V, VIN = 0V VDD = 5.25V, VIN = 0V VDDx = 4.75V, IOH = -25mA VDDx = 4.75V, IOL = 25mA OEx = 0V, VOUT = VDDx OEx = 0V, VOUT = 0V -1 -4 0 -40 4 0.8 1 Minimum 3.32 3.67 2 -0.3 -0.3 -0.3 Typical Maximum 5.05 5.55 VDD + 0.3 1.42 1.57 0.8 1 1 Units V V V V V V A A A A V V A A 8343I www.icst.com/products/hiperclocks.html 3 REV. B MARCH 8, 2001 Integrated Circuit Systems, Inc. ICS8343I LOW SKEW 1-TO-16 FANOUT BUFFER Test Conditions 0 < f 66MHz 0< f 66MHz Measured on rising edge @VDDx/2 Measured on rising edge @VDDx/2 Measured from 0.8V to 2.0V Measured from 2.0V to 0.8V tCYCLE/2 - 0.75 Minimum 0.9 0.9 Typical 1.4 1.4 Maximum 66 1.8 1.9 350 700 0.3 0.3 tCYCLE/2 0.5 0.4 tCYCLE/2 + 0.75 Units MHz ns ns ps ps ns ns ns TABLE 5A. AC CHARACTERISTICS, VDD = VDD1 = VDD2 = 5V5%, TA = -40 TO 85C Symbol fMAX tpLH tpHL tsk(o) tsk(pp) tR tF tPW Parameter Maximum Input Frequency Propagation Delay, Low-to-High Propagation Delay, High-to-Low Output Skew; NOTE 3 Par t-to-Par t Skew; NOTE 4 Output Rise Time Output Fall Time Output Pulse Width NOTE 1: All parameters measured at fMAX unless noted otherwise. NOTE 2: Outputs terminated with 50 resistor connected to VDDx/2. NOTE 3: Defined as skew across outputs at the same supply voltages and with equal load conditions. NOTE 4: Defined as skew at different outputs on different devices operating at the same supply voltages and with equal load conditions. 8343I www.icst.com/products/hiperclocks.html 4 REV. B MARCH 8, 2001 Integrated Circuit Systems, Inc. ICS8343I LOW SKEW 1-TO-16 FANOUT BUFFER Test Conditions Minimum 3.135 Typical 3.3 Maximum 3.465 100 Units V A TABLE 4C. POWER SUPPLY DC CHARACTERISTICS, VDD = VDD1 = VDD2 = 3.3V5%, TA = -40 TO 85C Symbol Parameter VDD, VDD1, VDD2 Operating Supply Voltage IDD Input Operating Supply Current TABLE 4D. LVCMOS DC CHARACTERISTICS, VDD = VDD1 = VDD2 = 3.3V5%, TA = -40 TO 85C Symbol Parameter VIH VIL IIH IIL VOH VOL IOZH IOZL Input High Voltage Input Low Voltage Input High Current Input Low Current Output High Voltage Output Low Voltage High Impedance Leakage Current High Impedance Leakage Current CLK OEx CLK OEx CLK OEx CLK OEx Test Conditions VDD = 3.465V VDD = 3.465V VDD = 3.135V VDD = 3.135V VIN =VDD VIN =VDD VIN = 0V VIN = 0V VDD = 3.135V, IOH = -25mA VDD = 3.135V, IOL = 25mA OEx = 0V, VOUT = VDD OEx = 0V, VOUT = 0V -1 -15 -15 2.4 0.8 1 Minimum 2 2 -0.3 -0.3 Typical Maximum VDD + 0.3 VDD + 0.3 0.8 0.8 1 1 Units V V V V A A A A V V A A TABLE 5B. AC CHARACTERISTICS, VDD = VDD1 = VDD2 = 3.3V5%, TA = -40 TO 85C Symbol fMAX tpLH tpHL tsk(o) tsk(pp) tR tF tPW Parameter Maximum Input Frequency Propagation Delay, Low-to-High Propagation Delay, High-to-Low Output Skew; NOTE 3 Par t-to-Par t Skew; NOTE 4 Output Rise Time Output Fall Time Output Pulse Width 0 f 200MHz 0 f 200MHz Measured on rising edge @VDDx/2 Measured on rising edge @VDDx/2 0 f 200MHz 0 f 200MHz tCYCLE/2 - 0.5 1.0 1.1 2.1 2.0 Test Conditions Minimum Typical Maximum 200 3.1 2.8 250 700 0.5 0.9 tCYCLE/2 0.8 1.7 tCYCLE/2 + 0.5 Units MHz ns ns ps ps ns ns ns NOTE 1: All parameters measured at fMAX unless noted otherwise. NOTE 2: Outputs terminated with 50 resistor connected to VDDx/2. NOTE 3: Defined as skew across outputs at the same supply voltages and with equal load conditions. NOTE 4: Defined as skew at different outputs on different devices operating at the same supply voltages and with equal load conditions. 8343I www.icst.com/products/hiperclocks.html 5 REV. B MARCH 8, 2001 Integrated Circuit Systems, Inc. ICS8343I LOW SKEW 1-TO-16 FANOUT BUFFER Test Conditions Minimum 3.135 2.375 Typical 3.3 2.5 Maximum 3.465 2.625 100 Units V V A TABLE 4E. DC POWER SUPPLY CHARACTERISTICS, VDD = 3.3V5%, VDD1 = VDD2 = 2.5V5%, TA = -40 TO 85C Symbol VDD VDD1, VDD2 IDD Parameter Input Operating Supply Voltage Out Operating Supply Voltage Input Operating Supply Current TABLE 4F. LVCMOS DC CHARACTERISTICS, VDD = 3.3V5%, VDD1 = VDD2 = 2.5V5%, TA = -40 TO 85C Symbol Parameter VIH VIL IIH IIL VOH VOL IOZH IOZL Input High Voltage Input Low Voltage Input High Current Input Low Current Output High Voltage Output Low Voltage High Impedance Leakage Current High Impedance Leakage Current CLK OEx CLK OEx CLK OEx CLK OEx Test Conditions VDD = 3.465V VDD = 3.465V VDD = 3.135V VDD = 3.135V VIN =VDD VIN =VDD VIN = 0V VIN = 0V VDD = 2.375V, IOH = -25mA VDD = 2.375V, IOL = 25mA OEx = 0V, VOUT = VDD OEx = 0V, VOUT = 0V -1 -15 -15 1.5 0.8 1 Minimum 2 2 -0.3 -0.3 Typical Maximum VDD + 0.3 VDD + 0.3 0.8 0.8 1 1 Units V V V V A A A A V V A A TABLE 5C. AC CHARACTERISTICS, VDD = 3.3V5%, VDD1 = VDD2 = 2.5V5%, TA = -40 TO 85C Symbol fMAX tpLH tpHL tsk(o) tsk(pp) tR tF tPW Parameter Maximum Input Frequency Propagation Delay, Low-to-High Propagation Delay, High-to-Low Output Skew; NOTE 3 Par t-to-Par t Skew; NOTE 4 Output Rise Time Output Fall Time Output Pulse Width 0 f 200MHz 0 f 200MHz Measured on rising edge @VDDx/2 Measured on rising edge @VDDx/2 0 f 200MHz 0 f 200MHz tCYCLE/2 - 0.5 1.0 1.4 2.3 2.3 Test Conditions Minimum Typical Maximum 200 3.2 3.2 250 700 0.5 0.9 tCYCLE/2 0.8 1.7 tCYCLE/2 + 0.5 Units MHz ns ns ps ps ns ns ns NOTE 1: All parameters measured at fMAX unless noted otherwise. NOTE 2: Outputs terminated with 50 resistor connected to VDDx/2. NOTE 3: Defined as skew across outputs at the same supply voltages and with equal load conditio NOTE 4: Defined as skew at different outputs on different devices operating at the same supply voltages and with equal load conditions. 8343I www.icst.com/products/hiperclocks.html 6 REV. B MARCH 8, 2001 Integrated Circuit Systems, Inc. ICS8343I LOW SKEW 1-TO-16 FANOUT BUFFER Test Conditions Minimum 2.375 Typical 2.5 Maximum 2.625 100 Units V A TABLE 4G. POWER SUPPLY DC CHARACTERISTICS, VDD = VDD1 = VDD2 = 2.5V5%, TA = -40 TO 85C Symbol Parameter VDD, VDD1, VDD2 Operating Supply Voltage IDD Input Operating Supply Current TABLE 4H. LVCMOS DC CHARACTERISTICS, VDD = VDD1 = VDD2 = 2.5V5%, TA = -40 TO 85C Symbol Parameter VIH VIL IIH IIL VOH VOL IOZH IOZL Input High Voltage Input Low Voltage Input High Current Input Low Current Output High Voltage Output Low Voltage High Impedance Leakage Current High Impedance Leakage Current CLK OEx CLK OEx CLK OEx CLK OEx Test Conditions VDD = 2.625V VDD = 2.625V VDD = 2.375V VDD = 2.375V VIN =VDD VIN =VDD VIN = 0V VIN = 0V VDD = 2.375V, IOH = -25mA VDD = 2.375V, IOL = 25mA OEx = 0V, VOUT = VDD OEx = 0V, VOUT = 0V -1 -10 -10 1.5 0.8 1 Minimum 2 2 -0.3 -0.3 Typical Maximum VDD + 0.3 VDD + 0.3 0.8 0.8 1 1 Units V V V V A A A A V V A A TABLE 5D. AC CHARACTERISTICS, VDD = VDD1 = VDD2 = 2.5V5%, TA = -40 TO 85C Symbol fMAX tpLH tpHL tsk(o) tsk(pp) tR tF tPW Parameter Maximum Input Frequency Propagation Delay, Low-to-High Propagation Delay, High-to-Low Output Skew; NOTE 3 Par t-to-Par t Skew; NOTE 4 Output Rise Time Output Fall Time Output Pulse Width tCYCLE/2 - 0.75 0 f 133MHz 0 f 133MHz Measured on rising edge @VDDx/2 Measured on rising edge @VDDx/2 1.0 1.4 2.5 2.6 Test Conditions Minimum Typical Maximum 133 3.7 3.5 250 750 0.5 0.9 tCYCLE/2 0.8 1.7 tCYCLE/2 + 0.75 Units MHz ns ns ps ps ns ns ns NOTE 1: All parameters measured at fMAX unless noted otherwise. NOTE 2: Outputs terminated with 50 resistor connected to VDDx/2. NOTE 3: Defined as skew across outputs at the same supply voltages and with equal load conditions. NOTE 4: Defined as skew at different outputs on different devices operating at the same supply voltages and with equal load conditions. 8343I www.icst.com/products/hiperclocks.html 7 REV. B MARCH 8, 2001 Integrated Circuit Systems, Inc. ICS8343I LOW SKEW 1-TO-16 FANOUT BUFFER PACKAGE OUTLINE - Y SUFFIX D D2 1 2 3 32 25 24 L E E1 E2 N 8 9 17 16 e A A2 D1 -CSEATING PLANE ccc C A1 b c TABLE 6. PACKAGE DIMENSIONS JEDEC VARIATION ALL DIMENSIONS IN MILLIMETERS BBA SYMBOL N A A1 A2 b c D D1 D2 E E1 E2 e L 0.45 0 0.05 1.35 0.30 0.09 9.00 BASIC 7.00 BASIC 5.60 9.00 BASIC 7.00 BASIC 5.60 0.80 BASIC 0.60 0.75 7 0.10 1.40 0.37 MINIMUM NOMINAL 32 1.60 0.15 1.45 0.45 0.20 MAXIMUM q ccc Reference Document: JEDEC Publication 95, MS-026 8343I www.icst.com/products/hiperclocks.html 8 REV. B MARCH 8, 2001 Integrated Circuit Systems, Inc. ICS8343I LOW SKEW 1-TO-16 FANOUT BUFFER Marking ICS8343YI ICS8343YI Package 32 Lead LQFP 32 Lead LQFP on Tape and Reel Count 250 per tray 2000 Temperature -40C to 85C -40C to 85C TABLE 7. ORDERING INFORMATION Part/Order Number ICS8343YI ICS8343YIT While the information presented herein has been checked for both accuracy and reliability, Integrated Circuit Systems, Incorporated (ICS) assumes no responsibility for either its use or for infringement of any patents or other rights of third parties, which would result from its use. No other circuits, patents, or licenses are implied. This product is intended for use in normal commercial applications. Any other applications such as those requiring extended temperature range, high reliability, or other extraordinary environmental requirements are not recommended without additional processing by ICS. ICS reserves the right to change any circuitry or specifications without notice. ICS does not authorize or warrant any ICS product for use in life support devices or critical medical instruments. 8343I www.icst.com/products/hiperclocks.html 9 REV. B MARCH 8, 2001 |
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