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INTEGRATED CIRCUITS
DATA SHEET
PCD4440T Analog voice scrambler/descrambler
Product specification Supersedes data of October 1992 File under Integrated Circuits, IC03 1996 Dec 20
Philips Semiconductors
Product specification
Analog voice scrambler/descrambler
CONTENTS 1 2 3 6 6.1 6.2 7.1 7.2 7.3 7.4 7.5 7.6 7.7 7.8 8 8.1 8.2 8.3 8.4 8.5 9 10 11 12 14.1 14.2 14.3 14.4 15 16 17 FEATURES APPLICATIONS GENERAL DESCRIPTION PINNING INFORMATION Pinning Pin description Scrambling Power supply (VDD, VSS) Oscillator (OSCI) Splitting frequency and mode selection Serial clock input (SCL), Serial data input (SDA) Address input (A0) I2C-bus data configuration Signal input (IN), Signal output (OUT) I2C BUS INTERFACE Bit transfer Start and stop conditions System configuration Acknowledge Timing specifications APPLICATIONS HANDLING LIMITING VALUES CHARACTERISTICS Introduction Reflow soldering Wave soldering Repairing soldered joints DEFINITIONS+ LIFE SUPPORT APPLICATIONS PURCHASE OF PHILIPS I2C COMPONENTS
PCD4440T
1996 Dec 20
2
Philips Semiconductors
Product specification
Analog voice scrambler/descrambler
1 FEATURES 2 APPLICATIONS
PCD4440T
* Scrambler or descrambler function * Scrambling in frequency domain * Selectable split frequency (up to 10 selections per second) * Telephony-band filtering included * No increase in bandwidth * No external components required * Small signal delay * Insensitive to distortion and group delay of transmission channel * Control via serial I2C-bus * Low transfer loss of speech * Mute option * Transparent mode * High signal input impedance * Low signal output impedance * Low power consumption. 4 ORDERING INFORMATION TYPE NUMBER PCD4440T
* Cordless telephones * Security telephones * Portable phones * Private Mobile Radio (PMR). 3 GENERAL DESCRIPTION
The PCD4440T is a silicon gate CMOS integrated circuit intended to be used in cordless telephony, radio, and line telecommunications products utilizing a microcontroller for the control functions. The purpose of the device is to prevent unauthorized `listening-in' on conversations. A major application is protection of the vulnerable radio link between a CT0 type cordless handset and its base unit. Analog scrambling/descrambling is based on the split frequency method realized in a sophisticated switched-capacitor technology. The PCD4440T is compatible with most microcontrollers and communicates via a two line bidirectional I2C-bus.
PACKAGE NAME SO8 DESCRIPTION plastic small outline package; 8 leads; body width 7.5 mm VERSION SOT176-1
1996 Dec 20
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Philips Semiconductors
Product specification
Analog voice scrambler/descrambler
5 BLOCK DIAGRAM
PCD4440T
handbook, full pagewidth
clocks
LPF
LPF
IN
4
PCD4440T
LPF LPF
5
OUT
LPF
LPF
transparent BIAS GEN I2C-bus INTERFACE 1 SCL 2 SDA 8 A0 CONTROL LOGIC
mute
7 OSCI
6 VDD
3 VSS
MGG729
Fig.1 Block diagram.
1996 Dec 20
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Philips Semiconductors
Product specification
Analog voice scrambler/descrambler
6 6.1 PINNING INFORMATION Pinning 7.1 Scrambling
PCD4440T
handbook, halfpage
SCL 1 SDA 2
8 A0 7 OSCI VDD OUT
PCD4440T
VSS IN 3 4
MGG728
6 5
The PCD4440Taccomplishes this task by first filtering the incoming signal, limiting the bandwidth to 3500 Hz. Then the signal is split into a high (> fs) and a low (< fs) frequency band. Both frequency bands are inverted and added again to provide a single output signal. Values for 9 split frequencies fS can be controlled by a scramble code table in the microcontroller. Control of these split frequencies is accomplished via the serial two-wire I2C-bus. In addition to the split frequencies (fs), a transparent mode and mute instruction can be selected (see Table 1). Figure 3 shows the signal path for both bands. The lower band path (on the left side of the diagram) operates on frequencies f fs (Split Frequency), the upper band path (on the right side) on frequencies f fs. The input signal contains frequencies from f1 up to f2. In scrambling mode, the output signal is band limited from fl (300 Hz) to fh (3500 Hz). In the left path, the input signal is first limited to fs. The following modulator inverts the lower band. fl is folded up to fs, fs down to fl. In general, an input frequency fin is folded to fout = fs + fl - fin. Finally the folded signal is band limited to fs again. In the right path, the input signal is first limited to fh. The following modulator inverts the upper band. fs is folded up to fh, fh down to fs. In general, an input frequency fin is folded to fout = fs + fh - fin. Finally, the folded signal is band limited to fh again. In the last step, the bands are added and buffered. Because of the symmetry of the scrambling process, descrambling is achieved by passing the signal through another PCD4440T. In the transparent mode, the input signal is band limited to 3500 Hz. Frequencies from 0 to 300 Hz are not filtered out.
Fig.2 Pin configuration.
6.2
Pin description PIN 1 2 3 4 5 6 7 8 TYPE I I P I O P I I DESCRIPTION serial clock line (I2C-bus) serial data line (I2C-bus) negative Supply signal input signal output positive supply oscillator input slave address input (I2C-bus)
SYMBOL SCL SDA VSS IN OUT VDD OSCI A0 7
FUNCTIONAL DESCRIPTION
To provide privacy for the end user of a cordless telephone set, the radio-link audio signal must be scrambled. In the microphone of the handset and the incoming telephone line audio path of the base unit a scrambler circuit has to be implemented. Consequently the audio signal to the telephone line and to the earpiece must be descrambled. Both functions can be fulfilled by the PCD4440T by simply inserting it in the audio path.
1996 Dec 20
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Philips Semiconductors
Product specification
Analog voice scrambler/descrambler
PCD4440T
handbook, full pagewidth
A ab cd e f
0 f1 fl
fs
fh
f2
f
LPF 1a
LPF 2a
A ab c
A ab cd e
0 f1 fl
fs
f
0 f1 fl
fs
fh
f2
f
fm1 = fl + fs
fm2 = fh + fs
A
c
ba
A ab c
e
dc
ba
ab
cd
e
0 f1 fl
fs
f
0 f1 fl
fs
fh
f2
f
LPF 1b
LPF 2b
A c b
A e d
0 f1 fl
fs A
f
0 f1 fl
fs
fh
f2
f
c
be
d
0 f1 fl
fs
fh
f2
f
MGG730
Fig.3 Scrambler signal path.
1996 Dec 20
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Philips Semiconductors
Product specification
Analog voice scrambler/descrambler
7.2 Power supply (VDD, VSS) 7.4
PCD4440T
Splitting frequency and mode selection
The positive supply of the circuit (VDD) must meet the voltage requirement as indicated in the characteristics. To avoid undefined states of the device at power-on, an internal reset circuit clears the logic. The power-on reset has the highest priority; it blocks and resets the complete circuit. 7.3 Oscillator (OSCI)
Table 1 shows the input codes required to select the various splitting frequencies, and the mute, transparent and scramble/descramble modes. The codes form part of the serial I2C-bus message input on the SDA line from the microcontroller.
The time base for the PCD4440T is a 3.58 MHz input signal which can be derived from the oscillator output (OSCO) of Philips microcontroller families PCD33xxA or PCF84CxxxA. Figure 4 shows the OSCI connection.
handbook, full pagewidth
PCD33xxA PCF84CxxxA OSCO MICROCONTROLLER
27 pF OSCI PCD4440T
3.58 MHz
MGG731
Fig.4 OSCI (oscillator input) connection.
Table 1 D3 0 0 0 0 0 0 0 1 1 1 1 1 Notes
Input data codes for splitting frequency and mode selection; note 1 D2 0 0 0 1 1 1 1 0 0 0 0 1 0 1 1 0 0 1 1 0 0 1 1 1 D1 1 0 1 0 1 0 1 0 1 0 1 1 D0 HEX 01 02 03 04 05 06 07 08 09 0A 0B 0F Mute mode Select fs Select fs Select fs Select fs Select fs Select fs Select fs Select fs Select fs Transparent mode Start scramble/descramble mode APPLICATION - 2641 1853 1507 1279 1117 1018 899 837 767 - - fs(2) (Hz)
1. Input codes other than shown in the table are not allowed. 2. Oscillator frequency = 3.58 MHz. 1996 Dec 20 7
Philips Semiconductors
Product specification
Analog voice scrambler/descrambler
7.5 Serial clock input (SCL), Serial data input (SDA) 7.7 I2C-bus data configuration
PCD4440T
SCL and SDA are serial clock and data lines which conform to the I2C-bus specification. Both inputs must be pulled up externally to VDD through resistors of approximately 10 k. 7.6 Address input (A0)
The PCD4440T is always a slave receiver in the I2C-bus configuration (the R/W bit = 0). The slave address consists of 7 bits, where the least significant is set by the input on A0. The more significant bits are fixed internally, as shown in Fig.5. For definition of D0-D4, see Table 1. 7.8 Signal input (IN), Signal output (OUT)
A0 is the slave address input and is used to set one bit of the slave address, so as to identify one of two PCD4440T devices connected to the same I2C-bus. Whether another PCD4440T is connected to the bus or not, A0 must be connected to VDD or VSS. The remaining bits of the slave address are fixed internally.
Signal input for the scrambler/descrambler is coupled into a `Sallen and Key' anti-aliasing filter configuration. A DC bias voltage of 12VDD is built-in. The analog signal output is buffered to achieve a relatively low output impedance of roughly 1 k which is sufficient to drive the earpiece amplifier or similar applications.
handbook, full pagewidth
acknowledge MSB S 1 1 0 1 1 1 A0 R/W 0 A 0 0 0 0 D3 D2 D1
acknowledge
D0
A
P
slave address
MGG732
data internal STROBE
Fig.5 I2C-bus data format.
1996 Dec 20
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Philips Semiconductors
Product specification
Analog voice scrambler/descrambler
8 I2C BUS INTERFACE
PCD4440T
The I2C-bus is for two-way communication between different ICs or modules. It uses only two lines, a serial data line (SDA) and a serial clock line (SCL), both of which are bi-directional. Both lines must be connected to a positive supply via a pull-up resistor when connected to the output stages of a device. Data transfer may be initiated only when the bus is not busy. 8.1 Bit transfer (see Fig.6)
One data bit is transferred during each clock pulse. The data on the SDA line must remain stable during the HIGH period of the clock pulse as changes in the data line at this time will be interpreted as control signals.
SDA
SCL data line stable; data valid change of data allowed
MBC621
Fig.6 Bit transfer.
8.2
Start and stop conditions (see Fig.7)
Both data and clock lines remain HIGH when the bus is not busy. A HIGH-to-LOW transition of the data line, while the clock is HIGH is defined as the start condition (S). A LOW-to-HIGH transition of the data line while the clock is HIGH is defined as the stop condition (P).
SDA
SDA
SCL S START condition P STOP condition
SCL
MBC622
Fig.7 Start and stop conditions.
1996 Dec 20
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Philips Semiconductors
Product specification
Analog voice scrambler/descrambler
8.3 System configuration (see Fig.8)
PCD4440T
A device generating a message is a `transmitter', a device receiving a message is the `receiver'. The device that controls message transfer is the `master' and the devices that are controlled by the master are the `slaves'.
SDA SCL MASTER TRANSMITTER / RECEIVER SLAVE TRANSMITTER / RECEIVER MASTER TRANSMITTER / RECEIVER
MBA605
SLAVE RECEIVER
MASTER TRANSMITTER
Fig.8 System configuration.
8.4
Acknowledge (see Fig.9)
The number of data bytes transferred between the start and stop conditions from transmitter to receiver is not limited. Each byte of eight bits is followed by one acknowledge bit. The acknowledge bit is a HIGH level put on the bus by the transmitter whereas the master generates an extra acknowledge after the reception of each byte. Also a master must generate an acknowledge after reception of each byte that has been clocked out of the slave transmitter. The device that acknowledges has to pull down the SDA line during the acknowledge-related clock pulse. Set-up and hold times must be taken into account to ensure that the SDA line is stable LOW during the whole high period of the acknowledge-related clock pulse. A master receiver must signal an end of data to the transmitter by not generating an acknowledge on the last byte that has been clocked out of the slave. In this event the transmitter must leave the data line HIGH to enable the master to generate the stop condition.
DATA OUTPUT BY TRANSMITTER not acknowledge DATA OUTPUT BY RECEIVER acknowledge SCL FROM MASTER S START CONDITION
MBC602
1
2
8
9
clock pulse for acknowledgement
Fig.9 Acknowledgment on the I2C-bus.
1996 Dec 20
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Philips Semiconductors
Product specification
Analog voice scrambler/descrambler
8.5 Timing specifications
PCD4440T
The PCD4440T accepts data input from a microcontroller and operates as a `slave receiver' via the I2C-bus. It supports the `standard' mode of the I2C-bus, but not the `fast' mode detailed in "The I2C-bus and how to use it" document order no. 9398 393 40011. The timing requirement are as follows: Masters generate a bus clock with a maximum frequency of 100 kHz. Detailed timing is shown in Fig. 10, where the two signal levels are LOW = VIL and HIGH = VIH, see Chapter 12. The time symbols are explained in Table 2. Figure 11 shows a complete data transfer.
handbook, full pagewidth
SDA
t BUF
t LOW
tf
SCL t HIGH t SU;DAT
t HD;STA
tr
t HD;DAT
SDA
MBC764
t SU;STA
t SU;STO
Fig.10 Standard mode timing.
handbook, full pagewidth
SDA
SCL
1-7
8
9
1-7
8
9
1-7
8
9
START ADDRESS CONDITION
R/W
ACK
DATA
ACK
START ADDRESS CONDITION
R/W
ACK
STOP
MBC765
Clock LOW minimum = 4.7 s; clock HIGH minimum = 4 s. The dashed line is the acknowledgment of the receiver. Mark-to-space ratio = 1 : 1 (LOW-to-HIGH). Maximum number of bytes is unrestricted. Premature termination of transfer is allowed by generation of STOP condition. Acknowledge clock bit must be provided by master.
Fig.11 Complete data transfer in standard mode.
1996 Dec 20
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Philips Semiconductors
Product specification
Analog voice scrambler/descrambler
Table 2 Explanation of time symbols used in Fig.10 PARAMETER SCL clock frequency tolerable pulse spike width bus free time The time that the bus is free (SDA is HIGH) before a new transmission is initiated by SDA going LOW. Only valid for repeated start code. The time between SDA going LOW and the first valid negative-going transition of SCL. The LOW period of the SCL clock. The HIGH period of the SCL clock. DESCRIPTION
PCD4440T
SYMBOL fSCL tSW tBUF
MIN. 0 - 4.7
MAX. 100 100 -
UNITS kHz ns s
tSU;STA tHD;STA tLOW tHIGH tr tf tSU;DAT tHD;DAT tSU;STO
set-up time repeated START hold time START condition SCL LOW time SCL HIGH time rise time SDA and SCL fall time SDA and SCL data set-up time data hold time set-up time STOP condition
4.7 4.0 4.7 4.0 - - 250 0 4.0
- - - - 1.0 0.3 - - -
s s s s s s ns ns s
1996 Dec 20
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Philips Semiconductors
Product specification
Analog voice scrambler/descrambler
9 APPLICATIONS
PCD4440T
handbook, full pagewidth
LCD DISPLAY
LCD DRIVER
antenna I2C-bus mod power down RX power down TX KEYPAD 1 RSSI RF SECTION RX TX A/D CONVERTER MICROCONTROLLER PCD33xxA DETECTOR data in 4 7 * 2 5 8 0 3 6 9 # data out
VREF
DESCRAMBLER PCD4440T
EXPANDOR 1/2 NE577
SCRAMBLER PCD4440T
COMPRESSOR 1/2 NE577
MGG733
Fig.12 CT0 handset with direct (Manchester code) data system.
1996 Dec 20
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Philips Semiconductors
Product specification
Analog voice scrambler/descrambler
PCD4440T
antenna handbook, full pagewidth I2C-bus mod power down RX power down TX data out
RSSI RF SECTION RX TX
A/D CONVERTER
MICROCONTROLLER PCD33xxA DETECTOR data in CHARGING CIRCUIT DTMF
VREF
DESCRAMBLER PCD4440T
EXPANDOR 1/2 NE577
SCRAMBLER PCD4440T
COMPRESSOR 1/2 NE577
LINE INTERFACE TEA106x
telephone line
MGG734
Fig.13 CT0 base unit with direct (Manchester code) data system.
10 HANDLING Inputs and outputs are protected against electrostatic discharge in normal handling. However, it is good practice to take normal precautions appropriate to handling MOS devices (see "Handbook IC03, Section General, Handling MOS devices").
1996 Dec 20
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Philips Semiconductors
Product specification
Analog voice scrambler/descrambler
11 LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 134). SYMBOL VDD VI II IO Ptot PO Tstg Tamb supply voltage all input voltages DC input current DC output current total power dissipation power dissipation per output storage temperature operating ambient temperature PARAMETER MIN. -0.3 -0.8 -10 -20 - - -65 -25
PCD4440T
MAX. +7.0 VDD + 0.8 +10 +20 300 50 +150 +70 V V
UNIT
mA mA mW mW C C
12 CHARACTERISTICS VDD = 5.0 V; VSS = 0 V; Tamb = 25 C; all voltages with respect to VSS; fxtal = 3.579 MHz unless otherwise specified. SYMBOL Supply VDD IDD operating supply voltage supply current mute mode operating mode Inputs/Outputs: AO, SDA, SCL VIL VIH Ci IOL VDC Vi(P-P) |Zi| VDC |Zo| UFS LOW level input voltage HIGH level input voltage input capacitance SDA output current LOW VOL = 0.4 V 0 - 3.0 - - frequency = 1 kHz - - frequency = 1 kHz Vi(P-P) = 1.25 V; fS = 767 or 2461 Hz; fin = 1 kHz; VDD = 3 V or 5 V transparent mode operating mode - 35 - - - 0 - - - 0.3VDD VDD 7 - V V pF mA 0.7VDD - VDD = 3 V VDD = 3 V - - 2.2 13 - - mA mA 2.8 - 6.0 V PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
Signal input: IN DC voltage level allowed amplitude input impedance 0.5VDD - 1.25 120 - V k VDD - 1 V
Signal output: OUT DC voltage level output impedance unwanted frequency suppression transfer loss 0.5VDD - - 40 3.5 0 1 - - - V k dB dB dB
Vo/Vi
Oscillator frequency input: OSCI VDC VIL VIH DC voltage level LOW level input voltage HIGH level input voltage 0.5VDD - - 0.3VDD VDD V V V
0.7VDD -
1996 Dec 20
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Philips Semiconductors
Product specification
Analog voice scrambler/descrambler
13 PACKAGE OUTLINE SO8: plastic small outline package; 8 leads; body width 7.5 mm
PCD4440T
SOT176-1
D
E
A X
c y HE vMA
Z 8 5
Q A2 A1 pin 1 index Lp L 1 e bp 4 wM detail X (A 3) A
0
5 scale
10 mm
DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT mm inches A max. 2.65 0.10 A1 0.3 0.1 A2 2.45 2.25 A3 0.25 0.01 bp 0.49 0.36 c 0.32 0.23 D (1) 7.65 7.45 0.30 0.29 E (1) 7.6 7.4 0.30 0.29 e 1.27 0.050 HE 10.65 10.00 0.42 0.39 L 1.45 0.057 Lp 1.1 0.45 0.043 0.018 Q 1.1 1.0 0.043 0.039 v 0.25 0.01 w 0.25 0.01 y 0.1 0.004 Z (1) 2.0 1.8 0.079 0.071
0.012 0.096 0.004 0.089
0.019 0.013 0.014 0.009
8 0o
o
Note 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. OUTLINE VERSION SOT176-1 REFERENCES IEC JEDEC EIAJ EUROPEAN PROJECTION
ISSUE DATE 91-08-13 95-02-25
1996 Dec 20
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Philips Semiconductors
Product specification
Analog voice scrambler/descrambler
14 SOLDERING 14.1 Introduction
PCD4440T
During placement and before soldering, the package must be fixed with a droplet of adhesive. The adhesive can be applied by screen printing, pin transfer or syringe dispensing. The package can be soldered after the adhesive is cured. Maximum permissible solder temperature is 260 C, and maximum duration of package immersion in solder is 10 seconds, if cooled to less than 150 C within 6 seconds. Typical dwell time is 4 seconds at 250 C. A mildly-activated flux will eliminate the need for removal of corrosive residues in most applications. 14.4 Repairing soldered joints
There is no soldering method that is ideal for all IC packages. Wave soldering is often preferred when through-hole and surface mounted components are mixed on one printed-circuit board. However, wave soldering is not always suitable for surface mounted ICs, or for printed-circuits with high population densities. In these situations reflow soldering is often used. This text gives a very brief insight to a complex technology. A more in-depth account of soldering ICs can be found in our "IC Package Databook" (order code 9398 652 90011). 14.2 Reflow soldering
Reflow soldering techniques are suitable for all SO packages. Reflow soldering requires solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the printed-circuit board by screen printing, stencilling or pressure-syringe dispensing before package placement. Several techniques exist for reflowing; for example, thermal conduction by heated belt. Dwell times vary between 50 and 300 seconds depending on heating method. Typical reflow temperatures range from 215 to 250 C. Preheating is necessary to dry the paste and evaporate the binding agent. Preheating duration: 45 minutes at 45 C. 14.3 Wave soldering
Fix the component by first soldering two diagonallyopposite end leads. Use only a low voltage soldering iron (less than 24 V) applied to the flat part of the lead. Contact time must be limited to 10 seconds at up to 300 C. When using a dedicated tool, all other leads can be soldered in one operation within 2 to 5 seconds between 270 and 320 C.
Wave soldering techniques can be used for all SO packages if the following conditions are observed: * A double-wave (a turbulent wave with high upward pressure followed by a smooth laminar wave) soldering technique should be used. * The longitudinal axis of the package footprint must be parallel to the solder flow. * The package footprint must incorporate solder thieves at the downstream end.
1996 Dec 20
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Philips Semiconductors
Product specification
Analog voice scrambler/descrambler
15 DEFINITIONS Data sheet status Objective specification Preliminary specification Product specification Limiting values
PCD4440T
This data sheet contains target or goal specifications for product development. This data sheet contains preliminary data; supplementary data may be published later. This data sheet contains final product specifications.
Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Where application information is given, it is advisory and does not form part of the specification. 16 LIFE SUPPORT APPLICATIONS These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale. 17 PURCHASE OF PHILIPS I2C COMPONENTS
Purchase of Philips I2C components conveys a license under the Philips' I2C patent to use the components in the I2C system provided the system conforms to the I2C specification defined by Philips. This specification can be ordered using the code 9398 393 40011.
1996 Dec 20
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Philips Semiconductors
Product specification
Analog voice scrambler/descrambler
NOTES
PCD4440T
1996 Dec 20
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Philips Semiconductors - a worldwide company
Argentina: see South America Australia: 34 Waterloo Road, NORTH RYDE, NSW 2113, Tel. +61 2 9805 4455, Fax. +61 2 9805 4466 Austria: Computerstr. 6, A-1101 WIEN, P.O. Box 213, Tel. +43 1 60 101, Fax. +43 1 60 101 1210 Belarus: Hotel Minsk Business Center, Bld. 3, r. 1211, Volodarski Str. 6, 220050 MINSK, Tel. +375 172 200 733, Fax. +375 172 200 773 Belgium: see The Netherlands Brazil: see South America Bulgaria: Philips Bulgaria Ltd., Energoproject, 15th floor, 51 James Bourchier Blvd., 1407 SOFIA, Tel. +359 2 689 211, Fax. +359 2 689 102 Canada: PHILIPS SEMICONDUCTORS/COMPONENTS, Tel. +1 800 234 7381 China/Hong Kong: 501 Hong Kong Industrial Technology Centre, 72 Tat Chee Avenue, Kowloon Tong, HONG KONG, Tel. +852 2319 7888, Fax. +852 2319 7700 Colombia: see South America Czech Republic: see Austria Denmark: Prags Boulevard 80, PB 1919, DK-2300 COPENHAGEN S, Tel. +45 32 88 2636, Fax. +45 31 57 1949 Finland: Sinikalliontie 3, FIN-02630 ESPOO, Tel. +358 9 615800, Fax. +358 9 61580/xxx France: 4 Rue du Port-aux-Vins, BP317, 92156 SURESNES Cedex, Tel. +33 1 40 99 6161, Fax. +33 1 40 99 6427 Germany: Hammerbrookstrae 69, D-20097 HAMBURG, Tel. +49 40 23 53 60, Fax. +49 40 23 536 300 Greece: No. 15, 25th March Street, GR 17778 TAVROS/ATHENS, Tel. +30 1 4894 339/239, Fax. +30 1 4814 240 Hungary: see Austria India: Philips INDIA Ltd, Shivsagar Estate, A Block, Dr. Annie Besant Rd. Worli, MUMBAI 400 018, Tel. +91 22 4938 541, Fax. +91 22 4938 722 Indonesia: see Singapore Ireland: Newstead, Clonskeagh, DUBLIN 14, Tel. +353 1 7640 000, Fax. +353 1 7640 200 Israel: RAPAC Electronics, 7 Kehilat Saloniki St, TEL AVIV 61180, Tel. +972 3 645 0444, Fax. +972 3 649 1007 Italy: PHILIPS SEMICONDUCTORS, Piazza IV Novembre 3, 20124 MILANO, Tel. +39 2 6752 2531, Fax. +39 2 6752 2557 Japan: Philips Bldg 13-37, Kohnan 2-chome, Minato-ku, TOKYO 108, Tel. +81 3 3740 5130, Fax. +81 3 3740 5077 Korea: Philips House, 260-199 Itaewon-dong, Yongsan-ku, SEOUL, Tel. +82 2 709 1412, Fax. +82 2 709 1415 Malaysia: No. 76 Jalan Universiti, 46200 PETALING JAYA, SELANGOR, Tel. +60 3 750 5214, Fax. +60 3 757 4880 Mexico: 5900 Gateway East, Suite 200, EL PASO, TEXAS 79905, Tel. +9-5 800 234 7381 Middle East: see Italy Netherlands: Postbus 90050, 5600 PB EINDHOVEN, Bldg. VB, Tel. +31 40 27 82785, Fax. +31 40 27 88399 New Zealand: 2 Wagener Place, C.P.O. Box 1041, AUCKLAND, Tel. +64 9 849 4160, Fax. +64 9 849 7811 Norway: Box 1, Manglerud 0612, OSLO, Tel. +47 22 74 8000, Fax. +47 22 74 8341 Philippines: Philips Semiconductors Philippines Inc., 106 Valero St. Salcedo Village, P.O. Box 2108 MCC, MAKATI, Metro MANILA, Tel. +63 2 816 6380, Fax. +63 2 817 3474 Poland: Ul. Lukiska 10, PL 04-123 WARSZAWA, Tel. +48 22 612 2831, Fax. +48 22 612 2327 Portugal: see Spain Romania: see Italy Russia: Philips Russia, Ul. Usatcheva 35A, 119048 MOSCOW, Tel. +7 095 247 9145, Fax. +7 095 247 9144 Singapore: Lorong 1, Toa Payoh, SINGAPORE 1231, Tel. +65 350 2538, Fax. +65 251 6500 Slovakia: see Austria Slovenia: see Italy South Africa: S.A. PHILIPS Pty Ltd., 195-215 Main Road Martindale, 2092 JOHANNESBURG, P.O. Box 7430 Johannesburg 2000, Tel. +27 11 470 5911, Fax. +27 11 470 5494 South America: Rua do Rocio 220, 5th floor, Suite 51, 04552-903 Sao Paulo, SAO PAULO - SP, Brazil, Tel. +55 11 821 2333, Fax. +55 11 829 1849 Spain: Balmes 22, 08007 BARCELONA, Tel. +34 3 301 6312, Fax. +34 3 301 4107 Sweden: Kottbygatan 7, Akalla, S-16485 STOCKHOLM, Tel. +46 8 632 2000, Fax. +46 8 632 2745 Switzerland: Allmendstrasse 140, CH-8027 ZURICH, Tel. +41 1 488 2686, Fax. +41 1 481 7730 Taiwan: PHILIPS TAIWAN Ltd., 23-30F, 66, Chung Hsiao West Road, Sec. 1, P.O. Box 22978, TAIPEI 100, Tel. +886 2 382 4443, Fax. +886 2 382 4444 Thailand: PHILIPS ELECTRONICS (THAILAND) Ltd., 209/2 Sanpavuth-Bangna Road Prakanong, BANGKOK 10260, Tel. +66 2 745 4090, Fax. +66 2 398 0793 Turkey: Talatpasa Cad. No. 5, 80640 GULTEPE/ISTANBUL, Tel. +90 212 279 2770, Fax. +90 212 282 6707 Ukraine: PHILIPS UKRAINE, 4 Patrice Lumumba str., Building B, Floor 7, 252042 KIEV, Tel. +380 44 264 2776, Fax. +380 44 268 0461 United Kingdom: Philips Semiconductors Ltd., 276 Bath Road, Hayes, MIDDLESEX UB3 5BX, Tel. +44 181 730 5000, Fax. +44 181 754 8421 United States: 811 East Arques Avenue, SUNNYVALE, CA 94088-3409, Tel. +1 800 234 7381 Uruguay: see South America Vietnam: see Singapore Yugoslavia: PHILIPS, Trg N. Pasica 5/v, 11000 BEOGRAD, Tel. +381 11 625 344, Fax.+381 11 635 777
For all other countries apply to: Philips Semiconductors, Marketing & Sales Communications, Building BE-p, P.O. Box 218, 5600 MD EINDHOVEN, The Netherlands, Fax. +31 40 27 24825 (c) Philips Electronics N.V. 1996
Internet: http://www.semiconductors.philips.com
SCA52
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights.
Printed in The Netherlands
417021/1200/02/pp20
Date of release: 1996 Dec 20
Document order number:
9397 750 01604

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