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| Features * * * * * * * * * * 13.56 MHz 7 kHz RFID IC for Cards and Tags 320 Read/Write EEPROM Bits, Divided into 10 Pages of 32 Bits Supports ISO/IEC 14443-2 Type B Optional 2-byte CRC Password and Write Lock Protection Programmable Send and Receive Protocols Supports Multiple Tags (Anticollision) Integrated up to 70 pF Tuning Capacitor (Mask Selectable) ID Length Programmable from 4 to 19 Bytes 106 Kbits/sec Data Rate Description The device is intended to be used in identification applications where one or more ID tags will be in the field at one time. It contains 320 bits of full read/write EEPROM memory, and offers features such as passwords, locking and a variable length ID. It is electrically compatible with ISO/IEC14443-2 for Type B systems, communicating at 106 Kbits/sec. The IC includes an internal tuning capacitor - only an external coil antenna is required to form a complete tag. Figure 1. Block Diagram 13.56 MHz RFID Transponder IC AT88RF256-13 Bridge Rectifier Regulator EEPROM Clock Extraction Data Modulation Control Figure 2. Typical Operating Configuration External Coil L2 RF Power AT88RF256-13 Data L1 Rev. 1944E-RFID-03/02 1 IC Operation Upon power-up, the IC will continuously repeat through the following sequence, which includes an ID transmission and possible reception of a command. The sequence is defined as follows: 1. Framed transmission of the ID field: - Start of Transmission (see Data Communications section) - Between 4 and 19 bytes from the EEPROM, which is defined as the ID field - Optional 2-byte CRC - End of Transmission (see Data Communications section) 2. A listening window, during which commands may be sent to the IC All bits are sent to or read from the IC least significant bit first. Bit fields listed in this document are listed with the LSB on the left and the MSB on the right. Multi-byte information is sent to the IC least significant byte first. Although not visible to the external system, within the IC the first byte sent to the IC is stored in memory at the lowest address and the address is incremented for subsequent bytes. Information is read from the EEPROM and transmitted by the IC in exactly the same order in which it was written; the first bit written is the first bit read. ID Field The ID sent by the IC can be between 4 and 19 bytes in length, depending on the value of the PU_LEN field in the configuration page. EEPROM bytes not utilized for ID storage may be used by the system for any other purpose. A serial number is programmed into page 7 of the IC at the Atmel factory. This ID is guaranteed to be unique for all dies, but is not locked and can be changed by the system. CRC When enabled by the CRC_ON option bit, a 2-byte CRC code will end all frame transmissions (either from the IC or from the reader/writer). The CRC polynomial used in this IC is identical to CRC_B as defined in ISO/IEC 14443-3: x16 + x 12 + x5 + x0, or a hex polynomial of 1021. The CRC register is initialized to 0xFFFF. When receiving information from the system, the IC computes the CRC on the incoming command, data and CRC bytes (start/stop bits, parity bits, SOT, EOT and EGT are ignored). When the last bit of the CRC has been received, the value in the CRC register should be 0. When the IC transmits data, the CRC is computed based on the data bits. The CRC is transmitted as the final 2 bytes of the frame. Listening Window After the power-up sequence is transmitted, there is a listening window during which the tag looks for modulation that would initiate the transmission of a command from the reader/writer to the tag. Commands sent at any other time are ignored. The listening window is 8 bit-times long. The leading modulation edge of the SOT identifier (see Data Communications section) must not start within the first and/or last bit-time of the listening window. This restriction is enforced to prevent the IC receiver from seeing its own modulation. 2 AT88RF256-13 1944E-RFID-03/02 AT88RF256-13 Command Bytes The explicit commands implemented in this tag permit the reader/writer to directly access individual 4-byte pages within the memory array, prevent future writing of particular pages (locking), temporarily disable the IC or check a password value. These commands are encoded as follows: MSB Read 32-bit Page A A A A (followed by optional CRC) Write 32-bit Data Page A A A (followed by 4 bytes of data and optional CRC) Write Lock Byte (followed by 1 byte of data, 3 bytes of $AAh and optional CRC) Write Configuration Bits (followed by 1 byte of $AAh, 3 bytes of data and optional CRC) Write Password (followed by 4 bytes of data and optional CRC) Disable (Stop) IC until Power-down (followed by optional CRC) Check Password (followed by 4 bytes of data and optional CRC) Table 1. Command Bytes LSB A0 A1 A2 A3 0 0 0 1 A0 A1 A2 0 0 0 1 0 00000011 00010011 00000111 00011000 00011100 For the Read and all four Write commands, the data stored within the corresponding page of the EEPROM to the accessed page is repeatedly transmitted back to the reader by the IC after the command has completed. This permits a verify function for the commands. For the Write Lock and Write Config commands, the entire contents of page 8 are transmitted. Between each frame transmitted, there is a listening window of 8 bittimes to synchronize the reader and/or permit the reader/writer to issue a new command to the IC. The listening window will begin immediately following the transmission of the appropriate EOT (see Data Communications section for information regarding EOT). For the Read command, addresses 0 - 7 are used to select between the 32-bit data pages while an address value of 0x08 addresses the configuration page. Any attempts to read pages with addresses above 0x08 will cause the command to be aborted, and the IC will return to the header transmission sequence. After the Check Password command, the IC goes back to the ID transmission loop and the reader/writer can issue its commands during the listening window. After the Disable command, the IC is held in reset until power is removed. There are a number of features that are used to prevent inadvertent writing of the IC: 1. The proper command code plus the proper receive data encoding must be sent to the IC. If either an illegal code or improper encoding is detected, the command is aborted. 2. Optionally, 2 correct CRC bytes may be sent after the command and data bytes, which must also be correct (see below for details). 3. For the Write Lock command, a successful Write Page command must have been previously executed since the last power cycle in order for the Write Lock command to be executed. If any of these protections are violated, or if there is a transmission or protection failure (lock bit set, password not entered), or if an illegal command is sent, the part will immediately restart its power-up read sequence. 3 1944E-RFID-03/02 Passwords If the optional password mode is enabled with PW_ON, command-based Reads and Writes are prohibited until the correct password is sent using the Check Password command. If the transmitted value of the password is correct, then an internal latch is set and subsequent Read, Write and Lock commands (to any page, including the password page, #9) are permitted. If the wrong password is sent (to the password check), then the command is aborted, and the IC reverts to the normal power-up sequence. Writes to locked pages are never permitted regardless of passwords. There is no command that can be used to directly read the password page, regardless of whether or not the password option (PW_ON) is enabled. Data Locking Within the lock byte, each lock bit determines whether the corresponding 4-byte user page can be written to. If it is a "1", then Writes are prohibited; if "0", they are allowed. The data sent to the IC with the Write Lock operation is OR'ed with the data already in the lock byte and then rewritten to the EEPROM. Once a user page is locked, it may never be unlocked and may never be written to. There are two additional lock bits for pages 8 (CONFIG_LOCK) and 9 (PW_LOCK). They operate slightly differently from the user lock bits because there is no OR function. CONFIG_LOCK, if "1", prevents the execution of the Write Config Bits command, while PW_LOCK, if "1", prevents execution of the Write Password command. Turning on CONFIG_LOCK does not lock the value of the bits within the lock byte but does prevent further change to the PW_LOCK bit and the configuration page. Multiple Tags In order to support multiple tags within the field at the same time, a random delay time between ID transmissions can be enabled. This feature is implemented by having the IC randomly disable its activity (transmission of ID frame and enabling the listening window) at selected times. Commands are only honored during a listening window immediately following a frame transmission. The IC includes a random generator that will generate different sequences of enablement/disablement based on processing, voltage, temperature and power-up time. Depending on the value of the RANDOM option, the transmission of an ID frame will be enabled on average once in eight times. The maximum delay is twice the average, while at the minimum, two ID frames/listening windows may be issued back-to-back. To implement this feature, the tags must be programmed with error detection information within the ID field so that the reader can detect the condition when two tags transmit their ID at exactly the same time. Because of the random delay feature, in most cases the next transmissions for these two ICs will not overlap. The Chip Disable command can be used with the random delay feature to permit an increased number of tags to be identified. Once a tag has been properly read by the reader unit, the reader sends the Chip Disable command to the tag during the first listening window after the ID transmission. Until the power is removed, that tag no longer sends its ID frame. See the Anticollision Procedures for the AT88RF256-13 Application Note for additional information on utilizing the anticollision features of the IC. Data Communications The electrical signaling of the IC is configurable using configuration bits as in Table 4, page 12. Options exist to allow compatibility with ISO/IEC 14443-2, "Radio Frequency Power and Signal Interface" (version N409, Final Committee Draft 3/12/99) Type B mode. The frame formatting for the various modes of operation is not fully compliant with ISO/IEC 14443 and is defined below. 4 AT88RF256-13 1944E-RFID-03/02 AT88RF256-13 Data Encoding The DATA_ENCODE bit determines the outgoing (IC to reader/writer) data encoding format. Section 5 of ISO 14443 states that the reader shall talk first. The AT88RF256-13 talks first. Section 9.2.5 of ISO 14443 defines Tr0 and Tr1. These signals are as stated and are not compliant. Tr0 is the delay from the end of a reader transmission until the card can respond. ISO 14443 asks for 8 B.T. minimum. AT88RF256-13 is 1-2 B.T. TR1 is the delay from the start of the subcarrier until the first phase change. ISO 14443 asks for 10 B.T. minimum. The AT88RF256-13 is 8 B.T. 5 1944E-RFID-03/02 Type B Frame Mode Setting the TYPE_14443 option bit to "1" puts the IC in Type B mode. The following Type B information applies only when TYPE_14443 is "1". All commands and data sent to the IC in Type B mode shall be received in the following format: 1. Start of Transmission (SOT) - see below for Type B SOT definition 2. One command byte (1 logic "0" start bit + 8 command bits + 1 logic "1" stop bit + EGT(1)) 3. N data bytes - N*(1 logic "0" start bit + 8 data bits + 1 logic "1" stop bit + EGT(1)) N0 4. (Optional) 2 CRC bytes in the same format as (3) above 5. End of Transmission (EOT) - see below for Type B EOT definition Note: EGT (Extra Guard Time) is an integer 0-6 additional logic "1"s transmitted after stop bit. Figure 3. Type B Frame Format (Reader/Writer to Card) SOT b1...b8 b1...b8 EOT S tar t Stop Command Byte EGT Start Stop Repeat for N Data Bytes and (optional) 2 CRC Bytes EGT All data sent from the IC to the reader/writer will be transmitted in the following format: 1. Start of Transmission (SOT) 2. N data bytes - N (1 logic "0" start bit + 8 data bits + 1 logic "1" stop bit + 1 EGT(1) bit) N4 3. (Optional) Two CRC bytes in the same format as (2) above 4. End of Transmission (EOT) Note: The EGT (Extra Guard Time) bit transmitted from the IC to the reader/writer is a logic "1". Figure 4. Type B Frame Format (IC to Reader/Writer) SOT b1...b8 EOT Start Stop Repeat for N Data Bytes and (optional) 2 CRC Bytes EGT 6 AT88RF256-13 1944E-RFID-03/02 AT88RF256-13 Type B SOT/EOT The Start of Transmission and End of Transmission sequences for Type B operation are defined below: Start of Transmission (reader/writer to IC): 1. No carrier modulation. 2. The carrier is modulated (logic "0") for 10 or 11 bit-times (integer multiples). 3. The carrier is not modulated (logic "1") for 2 or 3 bit-times (integer multiples). End of Transmission (reader/writer to IC): 1. No carrier modulation (this is the stop bit or EGT bit of the last data/command byte). 2. The carrier is modulated (logic "0") for 10 or 11 bit-times. 3. The reader stops modulating the carrier (logic "1"). Start of Transmission (IC to reader/writer): 1. The carrier is modulated with the subcarrier for 8 bit-times. 2. The subcarrier is phase shifted 180. 3. The subcarrier is modulated with the carrier for 10 bit-times with no subcarrier phase change. 4. The subcarrier is phase shifted 180. 5. The subcarrier is modulated with the carrier for 2 bit-times with no subcarrier phase changes. Note: There will be a 180 phase change of the subcarrier between the end of the SOT and the start bit "0" if the DATA_ENCODE option is set to BPSK-NRZ-L. There will be no phase change of the subcarrier between the end of the SOT and the start bit "0" if the DATA_ENCODE option is set to BPSK-Miller. See Figure 5. End of Transmission (IC to reader/writer). See Figure 6. 1. A logic "0" (encoded in the format selected by the DATA_ENCODE option bit) is transmitted for 10 bit-times. 2. A logic "1" (encoded in the format selected by the DATA_ENCODE option bit) is transmitted for 2 bit-times. 3. The IC stops the subcarrier modulation. 7 1944E-RFID-03/02 Figure 5. Type B SOT (IC to Reader) 10 bit-times BPSK-NRZ-L ... 2 bit-times ... "0" 10 bit-times BPSK-Miller ... 2 bit-times ... "0" SOT Start Notes: = Subcarrier "on" = Subcarrier "off" = 180 subcarrier phase shift Figure 6. Type B EOT (IC to Reader) "Stop" BPSK-NRZ-L "EGT" "0" 9 "0"s ... "1" "1" "Stop" BPSK-Miller "EGT" "0" 9 more "0"s "1" "1" EOT Notes: = Subcarrier "on" = Subcarrier "off" = 180 subcarrier phase shift Type B Timing The IC will begin transmitting the SOT sequence (in response to the reader/writer's Read Page or Check Password command frame) exactly 12 bit-times from the beginning of the reader/writer's EOT. The response to a successful Read Page command will be the requested page data. The response to the Check Password command will be a new framed transmission of the ID field (see page 2). If there is an error of one sort or another with either of these commands, the IC will also start a new framed transmission of the ID field. 8 AT88RF256-13 1944E-RFID-03/02 AT88RF256-13 Figure 7. Type B Frame Timing Restrictions EOT Last Char. Reader/Writer Chip 12 bit-times SOT Reset Voltage The device includes a precision voltage reference to ensure that all Write commands are only performed when the internal power-supply voltage on the IC is above a required level of 2.0V. ID Reads and the Read and Disable commands will take place regardless of voltage (above a minimal POR level), which will result in correct information in most cases. Data transmitted at the lowest voltages may not be valid, and therefore some sort of error detection and/or correction (multiple reads, CRC, hamming code, etc.) must be implemented by the system. The IC contains two coil input pads with ESD protection, at levels greater than 2 kV, along one end of the IC. These two pads are suitable for wire bonding or solder bumping. All remaining test pads will use a different structure and size, for which production bonding or bumping is not permitted. ESD protection for these pads is 300V. The IC includes a tuning capacitor across the coil input pins. Parasitic capacitance across these pins will be less than 10 pF and will vary with voltage, temperature, and process and read range. A drawing of the IC is shown on the next page. Mechanical Specification Ordering Information Ordering Code AT88RF256-13-WBC-10 AT88RF256-13-WC-10 AT88RF256-13-WBC-30 AT88RF256-13-WC-30 Package Bumped Wafer, 10pf Die on Wafer, 10 pf Bumped Water, 30 pf Die on Wafer, 30 pf Operation Range Commercial (0C to 70C) 9 1944E-RFID-03/02 Figure 8. AT88RF256-13 Die Test 6 Test 5 Test 4 Test 3 Test 2 AT29622 .0669" x .0559" ac2 Overall Die Size: (Center to Center) Pad Size: Pad Location ac2 1.611 mm x 1.331 mm 1.700 mm x 1.420 mm 80 m Test 1 ac1 66.93 mils x 55.91 mils 3.1 mils X= Y= -630.40 m -209.96 m -728.48 m 491.24 m 740.45 m 595.30 m 640.45 m 595.30 m 540.45 m 595.30 m 397.41 m 595.30 m 275.01 m 595.30 m 152.61 m 595.30 m X= Y= X= Y= X= Y= X= Y= X= Y= X= Y= X= Y= X= Y= -24.819 mils -8.266 mils -28.680 mils 19.340 mils 29.152 mils 23.437 mils 25.215 mils 23.437 mils 21.278 mils 23.437 mils 15.646 mils 23.437 mils 10.827 mils 23.437 mils 6.008 mils 23.437 mils ac1 X= Y= Test 1 X= Y= Test 2 X= Y= Test 3 X= Y= Test 4 X= Y= Test 5 X= Y= Test 6 X= Y= 10 AT88RF256-13 1944E-RFID-03/02 AT88RF256-13 Memory Map The EEPROM is composed of 10 pages of 32 bits each for a total of 320 bits. Pages 0- 7 are the user pages, which include ID information and other user-defined bytes. Page 8 is the configuration page, which includes the lock and option bits. Page 9 is the password page. Table 2. Memory Map Byte 0 Page 0 Page 1 Page 2 Page 3 Page 4 Page 5 Page 6 Page 7 Page 8 Page 9 First ID Byte Fifth ID Byte/User Data ID/User Data ID/User Data ID/User Data User Data User Data User Data LOCK0...LOCK7 First Byte Password Byte 1 Second ID Byte Sixth ID Byte/User Data ID/User Data ID/User Data ID/User Data User Data User Data User Data OPTIONS Second Byte Password Byte 2 Third ID Byte Seventh ID Byte/User Data ID/User Data ID/User Data ID/User Data User Data User Data User Data OPTIONS Third Byte Password Byte 3 Fourth ID Byte Eighth ID Byte/User Data ID/User Data ID/User Data User Data User Data User Data User Data Reserved Fourth Byte Password Option Page Bits are listed below in the order in which they must be sent to the IC when the Write Lock Byte or Write Config Bits command is sent to the IC. When reading this page, all 32 bits are read in this order. This page cannot be written with a single 4-byte frame; the Write Lock Byte command is used for the first byte only, and the Write Config Bits command is used for the last 3 bytes. Changes to the options page do not take effect until the IC is reset by removing power or by sending an invalid command to the IC. The Default column reflects the default value that the options have upon shipment from the Atmel factory. Table 3. Lock Byte Name LOCK[0:7] Number of Bits 8 Default Value 0 Description If "1", locks the corresponding user page against further writes. 10000000 Locks page 0 01000000 Locks page 1 ...and so on... 11 1944E-RFID-03/02 Table 4. Configuration Bits Name Number of Bits Default Value Description Number of ID bytes after first four. Total ID size range: 4-19 bytes. 0000 4 bytes ... 1000 5 bytes 0111 18 bytes 0100 6 bytes 1111 19 bytes Ignored by IC. Frames (ID + 8 bit-time listening window) between ID transmissions: 0 Continuous frames 1 Random null frames, mean number = 8 Password enable; if "1", password is page 9 of EEPROM If "1", use ISO/IEC 14443-2 (Type B) for those areas not controlled by the options listed below. "0" is reserved for future use. Transmit and receive rate. If TYPE_14443 is "1" (Type B), then this field is ignored and the data rate is fixed at 106 Kbits/sec. Always "0". If "1", locks the password page against further writes. If "1", locks the configuration page (but not LOCK[7:0]) against further writes. If "1", enables 2-byte CRC at the end of each frame transmission. Don't Care (ignored by IC). These bits are for internal use. They return unpredictable values on a read and cannot be written to. PU_LEN[0:3] 4 0000 TEST RANDOM PW_ON TYPE_14443 DATA_RATE[0:1] DATA_ENCODE PW_LOCK CONFIG_LOCK CRC_ON MSB RESERVED 1 1 1 1 2 1 1 1 1 2 8 - 0 0 1 00 0 0 0 1 N/A - Configuration Page Example To write the configuration page, send the write configuration command and dummy AA byte, followed by the configuration bits and the 2-byte (if the optional CRC is enabled). In the following example, the configuration is being written to: PU_LEN = 8 ID bytes (0010), RANDOM = Continuous Frames (0), PW_ON = enabled (1), TYPE_14443 = Type B (1), CRC_ON = enabled (1). All other configuration bits are set to their default value of 0. The CRC_B bytes shown are correct for this data. After sucessfully writing the configuration page, the IC will continuously transmit the contents of page 8. The changes in configuration will not take effect until the IC is reset by powering it down or by sending an invalid command to the IC. Table 5. Configuration Page Example Write Config Command 00010011 L S B Dummy Byte AA 01010101 Byte 1 00100011 Configuration Byte 2 00000100 Reserved 00000000 CRC_B Byte 1 11011110 CRC_B Byte 2 01010111 M S B 12 AT88RF256-13 1944E-RFID-03/02 AT88RF256-13 Package Drawing 14S1 - SOIC 1 E E H N L Top View End View e A1 b SYMBOL COMMON DIMENSIONS (Unit of Measure = inches) MIN NOM MAX NOTE A 0.0532 0.0040 0.0130 0.0075 0.3367 0.1497 0.2284 0.0160 - - - - - - - - 0.0688 0.0098 0.0200 0.0098 0.3444 0.1574 0.2440 0.0500 4 2 3 5 A A1 b D C D Side View E H L e 0.050 BSC Notes: 1. This drawing is for general information only; refer to JEDEC Drawing MS-012, Variation AB for additional information. 2. Dimension D does not include mold Flash, protrusions or gate burrs. Mold Flash, protrusion and gate burrs shall not exceed 0.15 mm (0.006") per side. 3. Dimension E does not include inter-lead Flash or protrusion. Inter-lead flash and protrusions shall not exceed 0.25 mm (0.010") per side. 4. L is the length of the terminal for soldering to a substrate. 5. The lead width B, as measured 0.36 mm (0.014") or greater above the seating plane, shall not exceed a maximum value of 0.61 mm (0.024") per side. 2/5/02 TITLE R DRAWING NO. 14S1, 14-lead, 0.150" Wide Body, Plastic Gull Wing Small Outline Package (SOIC) 14S1 2325 Orchard Parkway San Jose, CA 95131 REV. A 13 1944E-RFID-03/02 Pin Connections L1 is connected to pin 10. L2 is connected to pin 11. All the remaining pins should float. Engineering samples come with a 30 pF tuning capacitor. If no additional capacitance is added (including parasitics), a 4.54 H nominal antenna inductance should be used. The antenna should be tuned to 13.56 MHz for maximum performance. 14 AT88RF256-13 1944E-RFID-03/02 Atmel Headquarters Corporate Headquarters 2325 Orchard Parkway San Jose, CA 95131 TEL 1(408) 441-0311 FAX 1(408) 487-2600 Atmel Operations Memory Atmel Corporate 2325 Orchard Parkway San Jose, CA 95131 TEL 1(408) 436-4270 FAX 1(408) 436-4314 RF/Automotive Atmel Heilbronn Theresienstrasse 2 Postfach 3535 74025 Heilbronn, Germany TEL (49) 71-31-67-0 FAX (49) 71-31-67-2340 Atmel Colorado Springs 1150 East Cheyenne Mtn. Blvd. Colorado Springs, CO 80906 TEL 1(719) 576-3300 FAX 1(719) 540-1759 Europe Atmel SarL Route des Arsenaux 41 Casa Postale 80 CH-1705 Fribourg Switzerland TEL (41) 26-426-5555 FAX (41) 26-426-5500 Microcontrollers Atmel Corporate 2325 Orchard Parkway San Jose, CA 95131 TEL 1(408) 436-4270 FAX 1(408) 436-4314 Atmel Nantes La Chantrerie BP 70602 44306 Nantes Cedex 3, France TEL (33) 2-40-18-18-18 FAX (33) 2-40-18-19-60 Asia Atmel Asia, Ltd. Room 1219 Chinachem Golden Plaza 77 Mody Road Tsimhatsui East Kowloon Hong Kong TEL (852) 2721-9778 FAX (852) 2722-1369 Biometrics/Imaging/Hi-Rel MPU/ High Speed Converters/RF Datacom Atmel Grenoble Avenue de Rochepleine BP 123 38521 Saint-Egreve Cedex, France TEL (33) 4-76-58-30-00 FAX (33) 4-76-58-34-80 ASIC/ASSP/Smart Cards Atmel Rousset Zone Industrielle 13106 Rousset Cedex, France TEL (33) 4-42-53-60-00 FAX (33) 4-42-53-60-01 Atmel Colorado Springs 1150 East Cheyenne Mtn. Blvd. Colorado Springs, CO 80906 TEL 1(719) 576-3300 FAX 1(719) 540-1759 Atmel Smart Card ICs Scottish Enterprise Technology Park Maxwell Building East Kilbride G75 0QR, Scotland TEL (44) 1355-803-000 FAX (44) 1355-242-743 Japan Atmel Japan K.K. 9F, Tonetsu Shinkawa Bldg. 1-24-8 Shinkawa Chuo-ku, Tokyo 104-0033 Japan TEL (81) 3-3523-3551 FAX (81) 3-3523-7581 literature@atmel.com Web Site http://www.atmel.com (c) Atmel Corporation 2002. Atmel Corporation makes no warranty for the use of its products, other than those expressly contained in the Company's standard warranty which is detailed in Atmel's Terms and Conditions located on the Company's web site. The Company assumes no responsibility for any errors which may appear in this document, reserves the right to change devices or specifications detailed herein at any time without notice, and does not make any commitment to update the information contained herein. No licenses to patents or other intellectual property of Atmel are granted by the Company in connection with the sale of Atmel products, expressly or by implication. Atmel's products are not authorized for use as critical components in life support devices or systems. ATMEL (R) is the registered trademark of Atmel. Other terms and product names may be the trademarks of others. Printed on recycled paper. 1944E-RFID-03/02 |
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