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EL7584
Data Sheet August 29, 2003 FN7317.1
4-Channel DC:DC Converter
The EL7584 is a 4-channel DC:DC converter IC which is designed primarily for use in TFT-LCD applications. The boost converter has 2V to 14V input capability and provides 5V to 17V output, which powers the column drivers and provides up to 370mA @ 15V. A pair of charge pump control circuits provide outputs to allow the external generation of VON and VOFF supplies at 5V to 40V and 0V to -40V, respectively, each at up to 60mA for VBOOST = 15V. The VCOM buffer provides up to 50mA continuous output current from 2V to 13V. The EL7584 features adjustable switching frequency and onchip power sequence to simplify start-up operation. A separate input is available to externally increase the default delay of the positive charge pump. An over-temperature feature is provided to allow the IC to be automatically protected from excessive power dissipation. The EL7584 is available in a 24-pin TSSOP package and is specified for operation over the full -40C to +85C temperature range.
Features
* TFT/LCD display supply - Boost regulator - VCOM buffer - VON charge pump - VOFF charge pump * 2V to 14V VIN supply * 5V < VBOOST < 17V * 2V < VCOM < 13V * 5V < VON < 40V * -40V < VOFF < 0V * VBOOST = 15V @ 370mA * High frequency, small inductor DC:DC boost circuit * Over 90% efficient DC:DC boost converter capability * Built-in power-up sequence with adjustable VON delay * Adjustable frequency * Adjustable soft-start * Adjustable outputs
Pinout
EL7584 (24-PIN TSSOP) TOP VIEW
SS FBB EN VDDB LX1 LX2 VSSN DRVN VDDN 1 2 3 4 5 6 7 8 9 24 VSSB 23 ROSC 22 VREF 21 PGND 20 PGND 19 VSSP 18 DRVP 17 VDDP 16 FBP 15 VSSC 14 VCOM 13 VDDC
* Over-temperature protection * Small parts count
Applications
* TFT-LCD panels * PDAs
Ordering Information
PART NUMBER EL7584IR EL7584IR-T7 EL7584IR-T13 PACKAGE 24-Pin TSSOP 24-Pin TSSOP 24-Pin TSSOP TAPE & REEL PKG. DWG. # 7" 13" MDP0044 MDP0044 MDP0044
FBN 10 DP 11 INC 12
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright (c) Intersil Americas Inc. 2003. All Rights Reserved. Elantec is a registered trademark of Elantec Semiconductor, Inc. All other trademarks mentioned are the property of their respective owners.
EL7584
Absolute Maximum Ratings (TA = 25C)
LX Pin Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .18V VDDB, VDDP, VDDN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .18V VDDC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16.5V Maximum Continuous VBOOST Output Current. . . . . . . . . . . 800mA Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . .-65C to +150C Ambient Operating Temperature . . . . . . . . . . . . . . . .-40C to +85C Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Curves
CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. IMPORTANT NOTE: All parameters having Min/Max specifications are guaranteed. Typ values are for information purposes only. Unless otherwise noted, all tests are at the specified temperature and are pulsed tests, therefore: TJ = TC = TA
Electrical Specifications
PARAMETER
VIN = 3.3V, VBOOST = 12V, ROSC = 62k, TA = 25C, Unless Otherwise Specified. CONDITIONS MIN TYP MAX UNIT
DESCRIPTION
DC:DC BOOST CONVERTER IQ1_B IQ2_B V(FBB) VREF VROSC I(FBB) VDDB DMAX I(LX)MAX RDS-ON ILEAK-SWITCH VBOOST VBOOST/VIN VBOOST/IO1 FOSC-RANGE FOSC1 VCOM BUFFER VDDC IQ1, VDDC IQ2, VDDC VCOM-offset I(INC) RO(VCOM) Supply Voltage Range VDDC Disable Current VDDC Enable Current Accuracy of VCOM Output Voltage VCOM Input Bias Currents VCOM Output Impedance VDDC = 12V, EN = 0V VDDC = 12V, VEN = VDDB, no load 2V < VCOM < (VDDC - 2V) Current magnitude VDDC = VBOOST = 12V, VCOM = 6V with -100mA < ILOAD < 100mA CLOAD for VCOM > 0.47F, MLCC -10 -0.1 0.01 0.25 6 5.5 1.7 15 20 5 +10 0.1 V A mA mV A Quiescent Current - Shut-down Quiescent Current - Switching Feedback Voltage Reference Voltage Oscillator Set Voltage Feedback Input Bias Current Boost Converter Supply Range Maximum Duty Cycle Peak Internal FET Current Switch On Resistance Switch Leakage Current Output Range Line Regulation Load Regulation Frequency Range Switching Frequency at VBOOST = 10V, I(LX) total = 350mA I(LX) total VBOOST > VIN + VDIODE 2.7V < VIN < 13.2V, VBOOST = 15V 50mA < IO1 < 250mA ROSC range = 240k to 60k ROSC = 62k 200 900 1000 5 0.1 0.5 1200 1100 2 85 92 1.75 0.22 1 17 EN = 0V EN = VDDB 1.275 1.260 1.260 0.8 4.8 1.300 1.310 1.325 0.1 17 10 8 1.325 1.360 1.390 A mA V V V A V % A A V % % kHz kHz
ICOM(max) PSRR CMRR
Output Current Limit Supply Voltage Rejection Common Mode Voltage Rejection VINC = VDDC/2, 9V < VDDC < 15V VDDC = 12V, 2V < VINC < 10V 60 60
150 102 93
mA dB dB
2
EL7584
Electrical Specifications
PARAMETER VIN = 3.3V, VBOOST = 12V, ROSC = 62k, TA = 25C, Unless Otherwise Specified. (Continued) CONDITIONS MIN TYP MAX UNIT
DESCRIPTION
POSITIVE REGULATED CHARGE PUMP (VON) Most positive VON output depends on the magnitude of the VDDP input voltage (normally connected to VBOOST) and the external component configuration (doubler or tripler) VDDP IQ1(VDDP) IQ2(VDDP) IDP1 IDP2 V(FBP) I(FBP) I(DRVP) Supply Input for Positive Charge Pump Quiescent Current - Shut-down Quiescent Current - Switching Disable Charge Current Enable Discharge Current Feedback Reference Voltage Feedback Input Bias Current RMS DRVP Output Current VDDP = 12V VDDP = 6V ILR_VON FPUMP Load Regulation Charge Pump Frequency 5mA < IL < 15mA Frequency set by ROSC - see boost section 15 -0.5 0.03 0.5*FOSC 0.5 Usually connected to VBOOST output EN = 0V EN = VDDB EN = 0V, DP = 0V EN = VDDB, DP = 5V 1.5 100 1.245 5 11.5 2.3 1.9 200 1.310 0.1 60 17 20 5 2.5 300 1.375 V A mA mA nA V A mA mA %/mA
NEGATIVE REGULATED CHARGE PUMP (VOFF) Most negative VOFF output depends on the magnitude of the VDDN input voltage (normally connected to VBOOST) and the external component configuration (doubler or tripler) VDDN IQ1(VDDN) IQ2(VDDN) V(FBN) I(FBN) I(DRVN) Supply Input for Negative Charge Pump Quiescent Current - Shut-down Quiescent Current - Switching Feedback Reference Voltage Feedback Input Bias Current RMS DRVN Output Current Magnitude of input bias VDDN = 12V VDDN = 6V ILR_VOFF FPUMP Load Regulation Charge Pump Frequency -15mA < IL < -5mA Frequency set by ROSC - see boost section 15 -0.5 0.03 0.5*FOSC 0.5 Usually connected to VBOOST output ENBN = 0V ENBN = VDDB -80 5 4.5 2.3 0 0.1 60 17 20 5 +80 V A mA mV A mA mA %/mA
ENABLE CONTROL LOGIC VHI-EN VLO-EN I(EN) Enable Input High Threshold Enable Input Low Threshold Enable Input Bias Current VEN = 5V 3.7 1.6 0.5 7.5 V V A
OVER-TEMPERATURE PROTECTION TOT THYS Over-temperature Threshold Over-temperature Hysteresis 130 40 C C
3
EL7584
Pin Descriptions
PIN NUMBER 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 I = Input, O = Output, S = Supply PIN NAME SS FBB EN VDDB LX1 LX2 VSSN* DRVN VDDN FBN DP INC VDDC VCOM VSSC* FBP VDDP DRVP VSSP* PGND* PGND* VREF ROSC VSSB* PIN TYPE I I I P O O P O P I I I P O P I P O P P P O I P PIN FUNCTION Soft-Start input: a capacitor determines the current limit ramp time. Voltage feedback input determines the value of VBOOST. Starts internal power sequencing of VBOOST, VOFF, VCOM and VON outputs (See Applications Information) ; active HIGH input. Positive supply for VBOOST DC:DC controller. Boost inductor saturating MOSFET #1. Boost inductor saturating MOSFET #2. Ground return for VOFF regulator. Pump capacitor driver for VOFF regulator. Positive supply for VOFF regulator. Voltage feedback input determines the value of VOFF. An external capacitor increases VON power up delay time. VCOM Buffer input. Positive supply for VCOM Buffer. VCOM Buffer output. Ground return for VCOM Buffer. Voltage feedback input determines the value of VON. Positive supply for VON regulator. Pump capacitor driver for VON regulator. Ground return for VON regulator. Ground return for MOSFET #1. Ground return for MOSFET #2. Voltage reference for VOFF feedback . An external resistor sets the DC:DC switching frequency. Ground return for VBOOST DC:DC controller.
NOTE: *VSSB, VSSC, VSSN, VSSP, and PGND (2) are shorted internally to the device substrate.
4
EL7584 Typical Performance Curves
95 90 85 EFFICIENCY (%) 80 75 70 65 60 55 50 0 100 200 300 400 500 600 700 800 IOUT (mA) VIN=3.3V FREQ=1MHz 65 60 0 100 200 300 400 500 600 700 800 IOUT (mA) VIN=5V FREQ=1MHz 15V 12V 5V 9V EFFICIENCY (%) 95 90 85 80 75 70 12V 15V 9V
FIGURE 1. EFFICIENCY vs IOUT
FIGURE 2. EFFICIENCY vs IOUT
95 90 EFFICIENCY (%) EFFICIENCY (%) 85 80 75 70 65 60 0 100 200 300 400 500 600 700 800 IOUT (mA) VIN=3.3V FREQ=700kHz 15V 12V 5V 9V
95 90 85 80 75 70 65 60 0 100 200 300 400 500 600 700 800 IOUT (mA) VIN=5V FREQ=700kHz 15V 12V 9V
FIGURE 3. EFFICIENCY vs IOUT
FIGURE 4. EFFICIENCY vs IOUT
970 969 FREQUENCY (kHz) 968 967 966 965 964 963 962 3 3.5 4 4.5 VDDB (V) 5 5.5 6 VOLTAGE (V) ROSC = 61.9k
1.27
1.265
1.26
1.255
1.25 -50
0
50 TEMPERATURE (C)
100
150
FIGURE 5. FS vs VDDB
FIGURE 6. VREF vs TEMPERATURE
5
EL7584 Typical Performance Curves (Continued)
1.5 1.0 0.5 0.0 -0.5 -1.0 -1.5 0 100 200 18V 300 15V 400 12V 500 9V -1.5 600 700 0 100 200 300 400 500 600 700 800 IOUT (mA) LOAD REGULATION (%) LOAD REGULATION (%) f=675kHz, VIN=5.0V 1.5 1.0 0.5 0.0 -0.5 15V -1.0 18V 12V 9V 5V f=675kHz, VIN=3.3V
IOUT (mA)
FIGURE 7. LOAD REGULATION vs IOUT
FIGURE 8. LOAD REGULATION vs IOUT
1.5 1.0 LOAD REGULATION (%) 0.5 0.0 -0.5 -1.0 -1.5
f=1MHz, VIN=5.0V
1.5 1.0 LOAD REGULATION (%) 0.5 0.0 -0.5 -1.0 -1.5
f=1MHz, VIN=3.3V
18V 15V 0 100 200 300 400
12V
9V
15V 12V 18V 9V 300 400 500 600 5V 700 800
500
600
700
0
100
200
IOUT (mA)
IOUT (mA)
FIGURE 9. LOAD REGULATION vs IOUT
FIGURE 10. LOAD REGULATION vs IOUT
20 19 18 VOFF (-V) VON (V) VDDP = 12V 17 16 15 14 0 10 20 30 40 50 60 70 80 ILOAD (mA) VDDP = 15V
6.5 6 5.5 5 4.5 4 3.5 0 10 20 30 40 50 60 70 80 VDDN = 12V VDDN = 15V
ILOAD (mA)
FIGURE 11. VON vs ION
FIGURE 12. VOFF vs IOFF
6
EL7584 Typical Performance Curves (Continued)
1400 1200 FREQUENCY (kHz) 1000 800 600 400 200 0 0 50 100 150 200 250 300 350 400 450 ROSC (k) SWITCHING PERIOD (s) f(MHz)=1/(0.0118 ROSC+0.378) 6 5 4 3 2 1 0 0 50 100 150 200 250 300 350 400 450 ROSC (k) SWITCHING PERIOD(s)=0.0118 ROSC+0.378)
FIGURE 13. FS vs ROSC
FIGURE 14. FS vs ROSC
100K & 0.1F DELAY NETWORK ON ENP, CSS=0.1F
100K & 0.1F DELAY NETWORK ON ENP, CSS=0.1F
VBOOST 5V/DIV VON 5V/DIV
VBOOST
10V/DIV VON
10V/DIV
2V/DIV
VOFF
2V/DIV
VOFF
200ms/DIV
1ms/DIV
FIGURE 15. POWER-DOWN
FIGURE 16. POWER-UP
VIN=3.3V, VOUT=11.3V, IOUT=50mA
VIN=3.3V, VOUT=11.3V, IOUT=250mA
FIGURE 17. LX WAVEFORM - DISCONTINUOUS MODE
FIGURE 18. LX WAVEFORM - CONTINUOUS MODE
7
EL7584 Typical Performance Curves (Continued)
JEDEC JESD51-7 HIGH EFFECTIVE THERMAL CONDUCTIVITY TEST BOARD 1.4 1.2 1.176W 1 0.8 0.6 0.4 0.2 0 0 25 50 75 85 100 125 AMBIENT TEMPERATURE (C)
TS SO JA P2 =8 4 5 C/ W
JEDEC JESD51-3 LOW EFFECTIVE THERMAL CONDUCTIVITY TEST BOARD 0.9 0.8 POWER DISSIPATION (W) 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0 0 25 50 75 85 100 125 AMBIENT TEMPERATURE (C) 781mW
TS SO P2 12 4 8 C/ W
POWER DISSIPATION (W)
JA =
FIGURE 19. PACKAGE POWER DISSIPATION vs AMBIENT TEMPERATURE
FIGURE 20. PACKAGE POWER DISSIPATION vs AMBIENT TEMPERATURE
Functional Block Diagram
VOUT R2 R1 13k 110k 49 10F 10H VIN 10F
0.1F FBB MAX_DUTY ROSC R3 62k REFERENCE GENERATOR VDDB LX
VREF VRAMP PWM COMPARATOR PWM LOGIC 0.22
EN
12A
START-UP OSCILLATOR
ILOUT
+
7.2K
160m
VSSB
SS 0.1F
PGND
8
EL7584 Applications Information
The EL7584 is high efficiency multiple output power solution designed specifically for thin-film transistor (TFT) liquid crystal display (LCD) applications. The device contains one high current boost converter and two low power charge pumps (VON and VOFF). The boost converter contains an integrated N-channel MOSFET to minimize the number of external components. The converter output voltage can be set from 5V to 18V with external resistors. The VON and VOFF charge pumps are independently regulated to positive and negative voltages using external resistors. Output voltages as high as 40V can be achieved with additional capacitors and diodes.
Steady-State Operation
When the output reaches the preset voltage, the regulator operates at steady state. Depending on the input/output condition and component, the inductor operates at either continuous-conduction mode or discontinuous-conduction mode. In the continuous-conduction mode, the inductor current is a triangular waveform and LX voltage a pulse waveform. In the discontinuous-conduction mode, the inductor current is completely `dried-out' before the MOSFET is turned on again. The input voltage source, the inductor, and the MOSFET and output diode parasitic capacitors forms a resonant circuit. Oscillation will occur in this period. This oscillation is normal and will not affect the regulation. At very low load, the MOSFET will skip pulse sometimes. This is normal.
Boost Converter
The boost converter operates in constant frequency pulsewidth-modulation (PWM) mode. Quiescent current for the EL7584 is only 5mA when enabled, and since only the low side MOSFET is used, switch drive current is minimized. 90% efficiency is achieved in most common application operating conditions. A functional block diagram with typical circuit configuration is shown on previous page. Regulation is performed by the PWM comparator which regulates the output voltage by comparing a divided output voltage with an internal reference voltage. The PWM comparator outputs its result to the PWM logic. The PWM logic switches the MOSFET on and off through the gate drive circuit. Its switching frequency is external adjustable with a resistor from timing control pin (ROSC) to ground. The boost converter has 200kHz to 1.2MHz operating frequency range.
Current Limit
The MOSFET is current limited to <1.75Amps (nominal). This restricts the maximum output current IOMAX based on the following formula:
V IN I OMAX = I LMT - L x ------------- V 2 O
where: * IL is the inductor peak-to-peak current ripple and is decided by:
V IN D I L = --------- x -----L FS
Start-Up
After VDDB reaches a threshold of about 2V, the power MOSFET is controlled by the start-up oscillator, which generates fixed duty-ratio of 0.5 - 0.7 at a frequency of several hundred kilohertz. This will boost the output voltage, providing the initial output current load is not too great (<250mA). When VDDB reaches about 3.7V, the PWM comparator takes over the control. The duty ratio will be decided by the multiple-input direct summing comparator, Max_Duty signal (about 90% duty-ratio), and the Current Limit Comparator, whichever is the smallest. The soft-start is provided by the current limit comparator. As the internal 12A current source charges the external softstart capacitor, the peak MOSFET current is limited by the voltage on the capacitor. This in turn controls the rising rate of output voltage. The regulator goes through the start-up sequence as well after the EN signal is pulled to HI.
* D is the MOSFET turn-on radio and is decided by:
V O - V IN D = ----------------------VO
* FS is the switching frequency.
9
EL7584
The following table gives typical values: (Margins are considered 10%, 3%, 20%, 10%, and 15% on VIN, VO, L, FS, and ILMT, respectively)
TABLE 1. MAXIMUM CONTINUOUS OUTPUT CURRENT VIN (V) 3.3 3.3 3.3 5 5 5 12 VO (V) 9 12 15 9 12 15 18 L (H) 10 10 10 10 10 10 10 FS (kHz) 1000 1000 1000 1000 1000 1000 1000 IOMAX (mA) 430 320 250 650 470 370 830
Schottky Diode
Speed, forward voltage drop, and reverse current are the three most critical specifications for selecting the Schottky diode. The entire output current flows through the diode, so the diode average current is the same as the average load current and the peak current is the same as the inductor peak current. When selecting the diode, one must consider the forward voltage drop at the peak diode current. On the Elantec demo board, MBRM120 is selected. Its forward voltage drop is 450mV at 1A forward current.
Output Capacitor
The EL7584 is specially compensated to be stable with capacitors which have a worst-case minimum value of 10F at the particular VOUT being set. Output ripple voltage requirements also determine the minimum value and the type of capacitors. Output ripple voltage consists of two components - the voltage drop caused by the switching current though the ESR of the output capacitor and the charging and discharging of the output capacitor:
I OUT V OUT - V IN V RIPPLE = I LPK x ESR + ------------------------------- x -----------------------------C x FS V
OUT OUT
Component Considerations
Input Capacitor
It is recommended that CIN is larger than 10F. Theoretically, the input capacitor has ripple current of IL. Due to high-frequency noise in the circuit, the input current ripple may exceed the theoretical value. Larger capacitor will reduce the ripple further.
Boost Inductor
The inductor has peak and average current decided by:
I L I LPK = I LAVG + -------2 IO I LAVG = ------------1-D
For low ESR ceramic capacitors, the output ripple is dominated by the charging/discharging of the output capacitor. In addition to the voltage rating, the output capacitor should also be able to handle the RMS current is given by:
I CORMS =
2 I L 1 ( 1 - D ) x D + ------------------- x ----- x I LAVG 2 12 I LAVG
The inductor should be chosen to be able to handle this current. Furthermore, due to the fixed internal compensation, it is recommended that maximum inductance of 10H and 15H to be used in the 5V and 12V or higher output voltage, respectively. The output diode has average current of IO, and peak current the same as the inductor's peak current. Schottky diode is recommended and it should be able to handle those currents.
Positive and Negative Charge Pump (VON and VOFF)
The EL7584 contains two independent charge pumps (see charge pump block and connection diagram.) The negative charge pump inverts the VDDN supply voltage and provides a regulated negative output voltage. The positive charge pump doubles the VDDP supply voltage and provides a regulated positive output voltage. The regulation of both the negative and positive charge pumps is generated by the internal comparator that senses the output voltage and compares it with and internal reference. The switching frequency of the charge pump is set to 1/2 the boost converter switching frequency. The pumps use pulse width modulation to adjust the pump period, depending on the load present. The pumps are shortcircuit protected to 180mA at 12V supply and can provide 15mA to 60mA for 6V to 12V supply.
Feedback Resistor Network
An external resistor divider is required to divide the output voltage down to the nominal reference voltage. Current drawn by the resistor network should be limited to maintain the overall converter efficiency. The maximum value of the resistor network is limited by the feedback input bias current and the potential for noise being coupled into the feedback pin. A resistor network in the order of 200k is recommended. The boost converter output voltage is determined by the following relationship:
R1 + R2 V BOOST = -------------------- x V FBB R1
where VFBB is 1.300V. 10
EL7584 Single Stage Charge Pump
VDDN 0.1F RONP DRVN CCPN VOFF COUT2 3.3F RONN VSSN RONN VSSP R12 V COUT1ON 2.2F OSC RONP DRVP 0.1F CCPP
5V TO 17V
VDDP
5V TO 17V
R21
FBN
+ -
+ + RON IS 30 - 40 FOR VDD 6V TO 12V VFBP
FBP
R11
R22 VREF
Positive Charge Pump Design Considerations
A single stage charge pump is shown above. The maximum VON output voltage is determined by the following equation:
1 1 V ON ( max ) 2 x V DDCPP - I OUT x 2 x ( R ONN + R ONP ) - 2 x V DIODE - I OUT x ------------------------------------------- - I OUT x ----------------------------------------------0.5 x F x C 0.5 x F x C
S CPP S OUT1
where: * RONN and RONP resistance values depend on the VDDP voltage levels. For 12V supply, RON is typically 33. For 6V supply, RON is typically 45. If additional stage is required, the LX switching signal is recommended to drive the additional charge pump diodes. The drive impedance at the LX switching is typically 150m. The figure below illustrates an implementation for two-stage positive charge pump circuit.
11
EL7584 Two-Stage Positive Charge Pump Circuit
VDDP RONP DRNP RONN VSSP R12 + FBP CCPP COUT1 COUT1 VBOOST (5V-17V)
VLX CCPP VON
1.265V
+ -
R11
The maximum VON output voltage for N+1 stage charge pump is:
1 V ON ( max ) 2 x V DDP - I OUT x 2 x ( R ONN + R ONP ) - 2 x V DIODE - I OUT x ------------------------------------------- - I OUT x 0.5 x F x C 1 1 1 ----------------------------------------------- + N x V LX ( max ) - N x 2 x V DIODE + I OUT x ------------------------------------------- + I OUT x ----------------------------------------------- 0.5 x F S x C OUT1 0.5 x F S x C CPP 0.5 x F S x C OUT1
S CPP
R11 and R12 set the VON output voltage:
R 11 + R 12 V ON = V FBP x -------------------------R
11
where VFBP is 1.310V.
Negative Charge Pump Design Considerations
The criteria for the negative charge pump is similar to the positive charge pump. For a single stage charge pump, the maximum VOFF output voltage is:
1 1 V OFF ( max ) I OUT x 2 x ( R ONN + R ONP ) + 2 x V DIODE - IOUT x ------------------------------------------- - I OUT x ----------------------------------------------- - V DDN 0.5 x F x C 0.5 x F x C
S CPN S OUT2
Similar to positive charge pump, if additional stage is required, the LX switching signal is recommended to drive the additional charge pump diodes. The figure on the next page shows a two stage negative charge pump circuit.
12
EL7584 Two-Stage Negative Charge Pump Circuit
VDDN RONP DRVN RONN VSSN FBN CCPN COUT2 COUT2 R21 5V-17V VLX CCPN VOFF
+ -
R22 VREF
The maximum VOFF output voltage for N+1 stage charge pump is:
1 1 V OFF ( max ) I OUT x 2 x ( R ONN + R ONP ) + 2 x V DIODE - I OUT x -------------------------------------------- - I OUT x ----------------------------------------------- 0.5 x F x C 0.5 x F x C 1 1 V DDN - N x V LX ( max ) + N x 2 x V DIODE + I OUT x -------------------------------------------- + I OUT x ----------------------------------------------- 0.5 x F S x C CPN 0.5 x F S x C OUT2
S CPN S OUT2
R21 and R22 determine VOFF output voltage:
R 21 V OFF = -V REF x --------R
22
where VREF is 1.310V.
The VCOM Buffer
The VCOM buffer is designed to control the voltage on the back plane of an LCD display. This plane is capacitively coupled to the pixel drive voltage which alternately cycles positive and negative at the line rate for the display. Thus the amplifier must be capable of sourcing and sinking capacitive pulses of current, which can occasionally be quite large (a few 100mA for typical applications). The use of the VCOM Buffer is illustrated in Figure 21. Here, a voltage, corresponding to the mid-DAC potential, is generated by a resistive divider and buffered by the amplifier. The amplifier's stability is designed to be dominated by the load capacitance, thus for very short duration pulses (< 1s) the output capacitor supplies the current. For longer pulses the VCOM buffer supplies the current. By virtue of its high transconductance which progressively increases as more current is drawn, it can maintain regulation within 5mV as currents up to 50mA are drawn, while consuming only 1.5mA of quiescent current.
If VBOOST exceeds 15V, VDDC must be protected from overvoltage by including a zener diode between VBOOST and VDDC.
VBOOST
R32 INC R31 + VDDC -V SSC
0.1F VCOM VCOM
1F CERAMIC LOW ESR
FIGURE 21. VCOM USED AS A VOLTAGE BUFFER
As with any high performance buffer, there are several design issues that must be considered when using the part. These are summarized below.
Good Decoupling of Power Supplies
This is essential for this component and 1F ceramic low ESR decoupling capacitors are recommended. These should be placed close to the pins.
Choice of Output Capacitor
A 1F ceramic capacitor with low ESR (X5R or X7R type) is recommended for this amplifier. This capacitor determines the stability of the amplifier. Reducing it will make the amplifier less stable, and should be avoided. With a 1F capacitor, the unity gain bandwidth of the amplifier is close to 13
EL7584
500kHz when reasonable currents are being drawn. (For lower load currents, the gain and hence bandwidth progressively decreases.) This means the active transconductance is:
2 x 1F x 500kHz = 3.14S
and the current capability of these negative charge pumps (which is rising as VBOOST and hence VDDN rises.) 2. When VBOOST reaches a voltage such that V(FBB)> 1.13V and VOFF first reaches its required regulation voltage, the VCOM regulator is enabled and VCOM rises at a rate determined by the VCOM load capacitor, the load on VCOM, and the current limit of the VCOM amplifier. 3. When VCOM rises to within 100mV of V(INC), an internal delay circuit triggers and, for VDDP = 12V, a default delay of approximately 3.5ms is introduced before the positive charge pump is then enabled. This delay can be increased externally by connecting a capacitor between DP and VSSP. A 1nF capacitor will typically increase the delay before VON becomes enabled to 80ms. The enabled states of the on-chip functions become independent of VBOOST, VOFF, VCOM, and VON once each is triggered. The chip may be reset by forcing EN to logic 0 and allowing sufficient time for the various supplies to discharge sufficiently before taking EN to 1 again.
This high transconductance indicates why it is important to have a low ESR capacitor. If: * ESR * 3.14 > 1 then the capacitor will not force the gain to roll off below unity, and subsequent poles can affect stability. The recommended capacitor has an ESR of 10m, but to this must be added the resistance of the board trace between the capacitor and the VCOM pin, where the sense connection is made internally - therefore this should be kept short. Also ground resistance between the capacitor and the base of R2 must be kept to a minimum. These constraints should be considered when laying out the PCB. If the capacitor is increased above 1F, stability is generally improved and short pulses of current will cause a smaller "perturbation" on the VCOM voltage. The speed of response of the amplifier is however degraded as its bandwidth is decreased. At capacitor values around 10F, a subtle interaction with internal DC gain boost circuitry will decrease the phase margin and may give rise to some overshoot in the response. The amplifier will remain stable, though.
Over-Temperature Protection
An internal temperature sensor continuously monitors the die temperature. In the event that die temperature exceeds the thermal trip point, the device will shut down and disable itself. The upper and lower trip points are typically set to 130C and 90C respectively.
PCB Layout Guidelines
Careful layout is critical in the successful operation of the application. The following layout guidelines are recommended to achieve optimum performance. 1. VREF and VDDB bypass capacitors should be placed next to the pins. 2. Place the boost converter diode and inductor close to the LX pins. 3. Place the boost converter output capacitor close to the PGND pins. 4. Locate feedback dividers close to their respected feedback pins to avoid switching noise coupling into the high impedance node. 5. Place the charge pump feedback resistor network after the diode and output capacitor node to avoid switching noise. 6. All low-side feedback resistors should be connected directly to VSSB. VSSB should be connected to the power ground at one point only. A demo board is available to illustrate the proper layout implementation.
Response to High Current Spikes
The VCOM amplifier's output current is limited to 180mA. This limit level, which is roughly the same for sourcing and sinking, is included to maintain reliable operation of the part. It does not necessarily prevent a large temperature rise if the current is maintained. (In this case the whole chip may be shut down by the thermal trip to protect functionality.) If the display occasionally demands current pulses higher than this limit, the reservoir capacitor will provide the excess and the amplifier will top the reservoir capacitor back up once the pulse has stopped. This will happen on the s time scale in practical systems and for pulses 2 or 3 times the current limit, the VCOM voltage will have settled again before the next line is processed.
Power-Up Sequencing
With the components shown in the application diagram the on-chip power-up sequencing operates as follows. When the EN pin is taken to logic 1, the following sequence is followed by on-chip functions: 1. The boost circuit and negative charge pumps are enabled. VBOOST rises at a rate set by the boost load capacitor, the external load, and the boost's current limit (controlled by the SS pin input.) Similarly, VOFF falls in voltage determined by the load capacitor, the VOFF load, 14
EL7584 Typical Application Circuit
C7 R2 110k R1 13k R4 49.9 VBOOST (12V@ 350mA) VIN GND C5 22F + *D1 6 LX L1 C1 10F + 10H C22 8 DRVN 0.1F VOFF -6V C21 R21 154k C26 3.3F **D21 0.1F 9 VDDN 10 FBN 11 DP 12 INC FBP 16 VSSC 15 VCOM 14 VDDC 13 C32 0.1F C33 R22 33.2k VDDP 17 C11 0.1F 7 VSSN VSSP 19 DRVP 18 C12 0.1F **D11 C13 2.2F VON 18V R12 51k R11 3.9k VCOM C6 0.1F 1 SS 0.1F 2 FBB 3 EN 4 VDDB 5 LX ROSC 23 VREF 22 PGND 21 PGND 20 VSSB 24 R3 61.9k C8 1nF
C31 1F
***C20 1nF VCOM REFERENCE
* MBRM120LT3 ** BAT54S *** C20 is optional if extended VON delay is required
15
EL7584 Package Outline Drawing
NOTE: The package drawing shown here may not be the latest version. To check the latest revision, please refer to the Intersil website at
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems. Intersil Corporation's quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com 16

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