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Standard Products
ACT4435N Transceiver
for H009 Specification
June 18, 2004 FEATURES

ACT4435N Transceiver meets H009 data bus specifications Transmitter can be used to drive clock signal line Operates with 15 Volts to 12 Volts power supplies Direct replacement for CT1641 and CT1816 devices Voltage source output for higher bus drive power Plug-in and flat package available Monolithic construction using linear ASICs Processed and screened to MIL-STD-883 specs MIL-PRF-38534 compliant devices available Aeroflex is a Class H & K MIL-PRF-38534 Manufacturer
X LE FN O 35 R49 E 4 37 AT8 C -8 AA S U
X P LE F FN O59 R37 E43 A T 4 -88 CA AS U
ACT4435NFP / 4435N GENERAL DESCRIPTION
The Aeroflex Laboratories transceiver model ACT4435N is a new generation monolithic transceiver which provide full compliance with Macair and MIL-STD-1553 data bus requirements The model ACT4435N performs the front-end analog function of inputting and outputting data through a transformer to a H009 data bus. The Design of these transceivers reflects particular attention to active filter performance. This results in low bit and word error rate with superior waveform purity and minimal zero crossover distortion. The ACT4435N active filter design has additional high frequency roll-off to provide the required low harmonic distortion waveform without increasing the pulse delay characteristics significantly. Efficient transmitter electrical and thermal design provides low internal power dissipation and heat rise at high and well as low duty cycles. An optional receiver input threshold adjustment can be accomplished by the use of the "External Threshold" terminals.
TRANSMITTER
The Transmitter section accepts bi-phase TTL data at the input and when coupled to the data bus with a 1:1 transformer, isolated on the transceiver side with two 35 Ohm bus terminating resistors, with the bus terminated by a 170 Ohm resistor the data bus signal produced is 20.0 Volts typical P-P at A-A' (See Figure 5). When both DATA and DATA inputs are held low or high, the transmitter output becomes a low impedance and signal is "removed" from the line. In addition, an overriding "INHIBIT" input returns the output to a high impedance state. A logic "1" applied to the "INHIBIT" takes priority over the condition of the data inputs and disables the transmitter (See Transmitter Logic Waveforms - Figure 1). The transmitter utilizes an active filter to suppress harmonics above 1 MHz to meet H009 specifications. The transmitter may be safely operated for an indefinite period at 100% duty cycle into a data bus short circuit.
RECEIVER
The Receiver section accepts bi-phase differential data at the input and produces two TTL signals at the output. The outputs are DATA and DATA, and represent positive and negative excursions of the input beyond a pre-determined threshold (See Receiver Logic Waveforms Figure 2). The internal threshold is nominally set to detect data bus signals exceeding 1.05 Volts P-P and reject signals less than 0.6 Volts P-P when used with a 1:1 turns ratio transformer (See Figure 5 for transformer data and typical connection). This threshold setting can be held by grounding the appropriate pins or modified with the use of external resistors. A low level at the Strobe input inhibits the DATA and DATA outputs. If unused, a 2K Ohm pull-up to +5 Volts is recommended.
SCD4435N Rev B
TX DATA OUT TX DATA IN TX DATA IN TX INHIBIT EXT. THRESHOLD DATA DATA SET INTERNAL THRESHOLD DATA EXT. THRESHOLD DATA +5 V -12V or -15V RX DATA IN RX DATA IN +15V or +12V STROBE INPUT AMP COMP . RX DATA OUT DRIVER SHAPING V+ OUTPUT STAGE TX DATA OUT
V-
ACTIVE FILTER
COMP .
RX DATA OUT
BLOCK DIAGRAM (WITHOUT TRANSFORMER)
Region 1 2 3
DATA IN
DATA IN
INHIBIT
LINE TO LINE OUTPUT
Notes: 1. Data and DATA inputs must be complementry waveforms or 50% duty cycle average, with no delays between them, and in the same state during the off time (both high and low). 2. Region 1 ; no output signal, High Z state, (Receive Mode), Region 2; No Output signal, Low Z state, (Terminate Mode), Region 3, Transmitter signal on, low Z.
FIGURE 1 - TRANSMITTER LOGIC WAVEFORMS
LINE TO LINE INPUT
Rx DATA OUT
Note overlap
Rx DATA OUT
Note: Waveforms shown are for normally low devices. For normally high receiver output level devices, the receiver outputs are swapped as shown by the dashed lines
FIGURE 2 - RECEIVER LOGIC WAVEFORMS
SCD4435N Rev B
2
ABSOLUTE MAXIMUM RATINGS
Operating Case Temperature Storage Case Temperature Power Supply Voltages Logic Input Voltage Receiver Differential Input Receiver Input Voltage (Common Mode) Driver Peak Output Current Total Package Power Dissipation over the Full Operating Case Temperature Range Maximum Junction to Case Temperature (100% duty cycle) Junction-Case, Thermal Resistance -55C to +125C -65C to +150C 15VDC P.S. to 18VDC MAX +5VDC P.S. to +7VDC
-0.3 V to +5.5 V 40 V 10V 150 mA 3.25 Watts 16.25C 5C/W
ELECTRICAL CHARACTERISTICS - DRIVER SECTION INPUT CHARACTERISTICS, TX DATA IN OR TX DATA IN
Parameter "0" Input Current "1" Input Current "0" Input Voltage "1" Input Voltage Condition VIN = 0.4V VIN = 2.7V Symbol IILD IIHD VILD VIHD Min 2.0 Typ -0.2 1 Max -0.4 40 0.7 Unit mA A V V
INHIBIT CHARACTERISTICS
"0" Input Current "1" Input Current "0" Input Voltage "1" Input Voltage Delay from TX inhibit, (01) to inhibited output Delay from TX inhibit, (10) to active output Differential Output Noise, inhibit mode Differential Output Impedance (inhibited) Note2 Note 1 Note 1 VIN = 0.4V VIN = 2.7V IILI IIHI VILI VIHI tDXOFF tDXON VNOI ZOI 2 10K -0.2 1.0 200 250 0.8 -0.4 40 0.7 500 700 10 mA A V V nS nS mV p-p
OUTPUT CHARACTERISTICS
Differential output level at point A-A' on Figure 5 Rise and fall times (10% to 90% of p-p output) Output offset at point A-A' on Figure 5, 2.5 S after midpoint crossing of the last bit Delay from 50% point of TX DATA or TX DATA input to zero crossing of differential signal (Note 1)
SCD4435N Rev B
RL=170
VO
17 200 -
21 270
24 300 265 400
V p-p nS mV peak nS
tr
RL=170 VOS
tDTX
3
ELECTRICAL CHARACTERISTICS - RECEIVER SECTION
Parameter Differential Input Impedance (Note 1) Differential Input Voltage Range Input Common Mode Voltage Range Common Mode Rejection Ratio Note 1 Point A-A on Figure 5 Condition f= 1MHz Symbol ZIN VIDR VICR CMRR Min 20K 10 40 Typ Max 40 Unit
V p-p V p-p dB
STROBE CHARACTERISTICS (LOGIC "0" INHIBITS OUTPUT)
"0" Input Current "1" Input Current "0" Input Voltage "1" Input Voltage Strobe Delay (turn-on or turn-off) VS = 0.4V VS = 2.7V IIL IIH VIL VIH 2.0 -0.2 1 -0.4 +40 0.7 150 mA A V V nS
tSD(ON)
THRESHOLD CHARACTERISTICS (SINEWAVE INPUT )
Internal Threshold Voltage (Referred to the bus) Pins 6 and 11 to GND For 4435N-701 only - Pins 6 and 11 to GND 100KHz-1MHz VTH 0.60 1.2 0.80 1.8 4000 1.15 2.3 V P-P V P-P
External Threshold Pins 6 & 11 open, threshold settings resistors from Pin 5 & 12 to ground; For RTH = 3K mimumn to 10K maximum
RTH/V TH1
/ V P-P
OUTPUT CHARACTERISTICS, RX DATA AND RX DATA
"1" State "0" State Delay, (average) from differential input zero crossings to RX DATA and RX DATA output IOH = -0.4mA IOL = 4mA 50% points VOH VOL 2.5 3.6 0.35 275 0.5 450 V V nS
tDRX
POWER SUPPLY CURRENT
Duty Cycle Transmitter Standby Condition Symbol ICC IEE IL ICC IEE IL ICC IEE IL ICC IEE IL Typ 5 15 18 25 35 18 45 55 18 85 95 18 Max 10 35 30 40 60 30 60 80 30 120 140 30 Unit mA
25%
50%
100%
Notes: 1. Characteristics guaranteed by design, not production tested. 2. Measured at 1mHz at point A-A', power on or off. 3. Specifications apply over the temperature range of -55C to +125C (case temperature) unless otherwise noted. 4. All typical values are measured at +25C.
SCD4435N Rev B
4
tf* 90%
LAST BIT
Magnified View
OUTPUT OFFSET*
17V P-P MIN 24V P-P MAX
0 Volts
0 Volts
OUTPUT OFFSET*
10%
2.5 sec
tr* * Rise and fall times measured at point A-A' in Fig 5 *Offset measured at point A-A' in Fig 5
FIGURE 3 - TRANSMITTER (TX) OUTPUT WAVEFORM
FIGURE 4 - TRANSMITTER (TX) OUTPUT OFFSET
TX DATA OUT
35 N1:N2 POWER DISSIPATION WATTS A 170 A'
4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0 0 10 20 30 40 50 60 70 80 90 100 (TYPICAL)
TX DATA OUT RX DATA IN RX DATA IN
35
Transformer turns ratio: N1:N2 = 1:1 Use Aeroflex 25T1553-1
DUTY CYCLE, PERCENT
FIGURE 5 - TYPICAL TRANSFORMER CONNECTION
FIGURE 6 - POWER DISSIPATION VS. DUTY CYCLE
SCD4435N Rev B
5
CONFIGURATIONS AND ORDERING INFORMATION
Model No. ACT4435N ACT4435N-FP ACT4435N-701 DESC No. To Be Assigned Receiver Data level Normally High Normally High Normally High Case Plug In Flat Pack Plug In H009 Commercial (0C - 70C) Specs. H009
PACKAGE CONFIGURATIONS AND PINOUTS PLUG-IN PACKAGE PIN CONNECTIONS FLAT PACKAGE
1.27 MAX 0.017 0.002 Designator Pin 1 & ESD 1.27 MAX 1. TX DATA OUT 2. TX DATA OUT 1.27 MAX 3. TX GND (+5V) 1.10 4. +15V (TX) 5. EXT. DATA THRES 6. INT. DATA THRES 24 13 7. RX DATA OUT 8. STROBE 9. RX GND (+5V) 1.27 10. RXDATA OUT 1.10 MAX 11. INT DATA THRES 12. EXT DATA THRES 13. +15V (RX) 14. N.C. 12 15. RX DATA IN 16. RX DATA IN 17. GND Designator 18. CASE GND Pin 1 & ESD 0.175 19. -15V (RX) MAX 20. +5V 21. TX INHIBIT 22. TX DATA IN 0.24 23. TX DATA IN MIN 24. -15V (TX) 0.018 DIA. 0.100 0.002
0.10 Typ 0.400 MAX
2 sides
0.009 0.002 0.167 for Low Profile Flat Pack 0.200 for Std Flat Pack 0.080 0.015
Notes 1. Dimensions shown are in inches. 2. Pins are equally spaced at 0.1000.002 tolerance non-cumulative each row.
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Aeroflex Microelectronic Solutions reserves the right to change at any time without notice the specifications, design, function, or form of its products described herein. All parameters must be validated for each customer's application by engineering. No liability is assumed as a result of use of this product. No patent licenses are implied.
SCD4435N Rev B
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