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Ordering number : ENN6951
Monolithic Linear IC
LA8522M
Audio Signal-Processing IC with I/O Switching
Overview
The LA8522M is an I/O switching audio signal-processing IC for use in facsimile units and telephones. It integrates a crosspoint switch, a BTL power amplifier, an electronic volume control, a microphone amplifier, and other functions on a single chip.
* Built-in electronic volume (seven 4.0 dB steps) * Two output level switching circuits (4 positions and 2 positions) * Crosspoint switch that supports mixing
Package Dimensions
unit: mm 3112A-MFP24S
[LA8522M]
24 13
Applications
Personal facsimile units and telephones
Functions
* * * * Crosspoint switch (equivalent to an 4 x 4 switch) BTL power amplifier Electronic volume control Output level switching (ATT1: 0, -4, -8, -12 dB, ATT2: 0, -6 dB) * Serial interface
5.4 7.6 0.15
12.5
0.35
1.0
Features
* Built-in BTL power amplifier (8 to 32 load): VCC = 5 V, RL = 16 , Pomax = 250 mW
0.1 1.5
(0.75)
SANYO: MFP24S
Specifications
Maximum Ratings at Ta = 25C
Parameter Maximum supply voltage Allowable power dissipation Operating temperature Storage temperature Symbol VCC max Pd max Topr Tstg Ta 70C (Mounted on a glass-epoxy board: 114.3 x 76.1 x 1.6 mm3) Conditions Ratings 7 550 -20 to +70 -40 to +150 Unit V mW C C
Operating Conditions at Ta = 25C
Parameter Recommended supply voltage Allowable operating supply voltage range Symbol VCC VCCop Conditions Ratings 5 4.5 to 6.0 Unit V V
Any and all SANYO products described or contained herein do not have specifications that can handle applications that require extremely high levels of reliability, such as life-support systems, aircraft's control systems, or other applications whose failure can be reasonably expected to result in serious physical and/or material damage. Consult with your SANYO representative nearest you before using any SANYO products described or contained herein in such applications. SANYO assumes no responsibility for equipment failures that result from using products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other parameters) listed in products specifications of any and all SANYO products described or contained herein.
SANYO Electric Co.,Ltd. Semiconductor Company
TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110-8534 JAPAN
O1802RM (OT) No. 6951-1/17
0.63
1
12
1.7max
LA8522M Electrical Characteristics at Ta = 25C, VCC = 5 V, fin = 1 kHz, RL = 10 k
Parameter [Crosspoint switch] Voltage gain Maximum input level Output noise voltage [AMP1] Voltage gain Output total harmonic distortion Equivalent input noise voltage [AMP2] Voltage gain Output total harmonic distortion [AMP3] Output level Output total harmonic distortion [AMP4] Output level Output total harmonic distortion [AMP5] Output level Output total harmonic distortion Maximum voltage gain AMP1 AMP2 AMP3 AMP4 AMP5 Attenuator attenuation 1-1 Attenuator attenuation 1-2 Attenuator attenuation 1-3 Attenuator attenuation 2-1 Electronic volume control output level Electronic volume control step size Electronic volume control output noise voltage [BTL Power Amplifier] Voltage gain Maximum voltage gain Total harmonic distortion Maximum BTL output power Ripple rejection ratio Output noise voltage [CPU Interface] Clock frequency Input signal high level Input signal low level [VREF and Current Drain] Internal reference voltage (the pin 10 voltage) Quiescent current 1 Quiescent current 2 Vref Icco1 Icco2 With the BTL power amplifier on and the crosspoint switch off With the BTL power amplifier off and the crosspoint switch off 2.09 2.26 12.5 7 2.41 20 11 V mA mA Fck VH VL 2.1 1.0 500 kHz V V VGSPW VGp max THDpw Po max SVRR VNOpw Vin = -30 dBV, RL = 16 THD = 10 %, RL = 16 Rg = 620 , frin = 100 Hz, Vrin = -20 dBV, RL = 16 Rg = 620 , 20 to 20 kHz, RL = 16 250 40 Vin = -20 dBV, RL = 16 18.1 30 0.8 400 50 23 60 1.5 19.6 21.1 dB dB % mW dB Vrms G1max G2max G3max G4max G5max Att1-1 Att1-2 Att1-3 Att2-1 VOevr Wevr NOevr Address (010101) Address (011001) Address (011101) Address (000101) Vin = -42 dBV, IN (2), OUT (20), sw (010001) on Vin = -42 dBV, IN (2), OUT (20), sw (010010) on 20 to 20 kHz, OUT (20) 30 25 20 18 18 3.5 7.5 11.7 5.5 -14.3 3.1 20 20 4.2 8.2 12.4 6.2 -12.2 4.0 25 4.9 8.9 13.1 6.9 -10.3 4.9 60 dB dB dB dB dB dB dB dB dB dBV dB Vrms VO5 THD5 Vin = -26 dBV, IN (7), OUT (23), sw (010001) on Vin = -26 dBV, IN (7), OUT (23), sw (010001) on -11.5 -9.0 0.17 -6.5 1.5 dBV % VO4 THD4 Vin = -14 dBV, IN (8), OUT (21), sw (110111) on Vin = -14 dBV, IN (8), OUT (21), sw (110111) on -10.7 -8.2 0.30 -5.7 1.5 dBV % VO3 THD3 Vin = -14 dBV, IN (7), OUT (22), sw (101101) on Vin = -14 dBV, IN (7), OUT (22), sw (101101) on -10.8 -8.3 0.31 -5.8 1.5 dBV % G2 THD2 Vin = -34 dBV Vin = -34 dBV 18.2 19.2 0.16 20.2 1.5 dB % G1 THD1 Niamp1 Vin = -43 dBV Vin = -43 dBV Rg = 620 , 20 to 20 kHz 28.2 29.2 0.15 2.0 30.2 1.5 7.0 dB % Vrms Gsw Vimax Nosw Vin = -14 dBV THD = 1.5 % 20 to 20 kHz -2.5 -14 -0.5 -10 15 60 1.5 dB dBV Vrms Symbol Conditions Ratings min typ max Unit
No. 6951-2/17
AMP5
ATT1 4
OP1-IN 2
AMP1 + - 22 6dB ATT2 2 3
AMP2 SW-OUT4 - 20 EVR 7 5
OP2-IN
+
AMP3 + - 18 7
OP3-IN + - 17 8
OP4-IN + AMP4 9 GND - BTL AMP BTL-OUT1 16
CE
CPU Interface
DI
CL
Block Diagram
+
LA8522M
No. 6951-3/17 + 24 REG 1 VREF 4 6 BTL-VREF 10 11 - 6dB 23 SW-OUT1 SW-OUT2 21 SW-OUT3 19 + BTL-IN BTL.GND SP 15 BTL-OUT2 14 CPU
A13727
BTL.VCC
12
13
VCC +
VCC
Test Circuit Diagram
LA8522M
No. 6951-4/17 VOUT 1kHz VIN 10F 24 1 VREF OP5-NT + 100k 620 15k 100k 0.22F 23 2 IN1 SW1 1F 620 10k 20 5 OP2-IN SW-OUT4 SW2 IN3 SW3 620 SW4 Data generator Top view
A13728
10k 0.1F
OUT1
OP1-IN
SW-OUT1
0.033F 3.3k 3 100k 21 OUT3 4 OP1-OUT SW-OUT3 OP1-NF SW-OUT2 OUT2 22
OUT4
IN2 0.1F 620 IN4
100k 19 6 OP2-OUT BTL-VREF + 47F 10k 18 BTL-IN 0.33F BTL-IN 620
LA8522M
0.1F 7 43k 0.1F 8 43k 9 10 11 12 OP3-IN
100k
OP4-IN
BTL-GND
17 0.1F 16 0.1F
BTL-OUT 1
GND
BTL-OUT1
16
BTL-OUT 2
CE
BTL-OUT2
15 0.1F 14 0.1F
DI
BTL-VCC
CL
VCC
100F
+
13 100F +
VCC
Application Circuit Diagram
LA8522M
No. 6951-5/17 10k + 24 1 VREF AMP5-NF 0.033F 1F 3.3k 22 3 OP1-NF SW-OUT2 100k 23 2 OP1-IN SW-OUT1 100k 21 4 OP1-OUT SW-OUT3 0.1F 10k 20 5 OP2-IN SW-OUT4 100k 19 6 OP2-OUT BTL-VREF 0.1F 7 OP3-IN 100F + 0.33F 10k 15k 0.22F 100k
LA8522M
18
BTL-IN
10k 0.1F 17 8 OP4-IN BTL-GND
100k
10k
0.1F
16
9 10 2.2k 11
GND
BTL-OUT1
SP 8 to 32
0.1F
15
CE
BTL-OUT2
0.1F
0.1F
14
CPU 2.2k 2.2k Top view
A13729
DI
BTL-VCC
12
13
CL
VCC
220F + 0.1F
VCC=5V
LA8522M Pin Functions
Pin No. Pin Pin voltage (V) Notes Equivalent circuit
VCC
1
VREF
2.25
Internal circuit reference voltage (about 2.25 V) * Circuits other than the BTL amplifier operate using this potential as a reference.
2.25V
1
A13743
2
OP1-IN
2.25
Amplifier 1 noninverting input
VCC
3
OP1-NF
2.25
Amplifier 1 inverting input
2 300 3 300
4
4
OP1-OUT
2.25
Amplifier 1 output
A13744
VCC
5 OP2-IN 2.25 Amplifier 2 inverting input
VREF 30k
6 5
6 OP2-OUT 2.25 Amplifier 2 output
300
A13745
VCC VREF
7 OP3-IN 2.25 Amplifier 3 input
30k
50k
8 OP4-IN 2.25 Amplifier 4 input
7 8
5k
A13746
Continued on next page.
No. 6951-6/17
LA8522M
Continued from preceding page.
Pin No. Pin Pin voltage (V) Notes Equivalent circuit
10
CE
VCC
Chip enable input
VCC 100k
11
DI
VCC
Data input
10 11 12
1k
12
CL
VCC
Clock input
A13747
P-VCC
16 BTL-OUT1 0.44VCC BTL power amplifier output 1
16 5k To 19 pin
18 BTL-IN 0.44VCC BTL power amplifier inverting input
300
18
A13748
P-VCC
15 BTL-OUT2 0.44VCC BTL power amplifier output 2
50k 5k 19 20k To 16 pin 40k
A13749
15 20k
19
BTL-VREF
0.44VCC
BTL power amplifier reference voltage
VCC
20
SW-OUT4
2.25
Electronic volume control output (Fourth SW output)
20 40k
A13750
Continued on next page.
No. 6951-7/17
LA8522M
Continued from preceding page.
Pin No. Pin Pin voltage (V) Notes Equivalent circuit
VCC VREF
21
SW-OUT3
2.25
Amplifier 7 output (Third SW output)
21 60k 30k 10k
A13751
VCC
22
SW-OUT2
2.25
Amplifier 6 output (Second SW output)
22
A13752
VCC
23 SW-OUT1 2.25 Amplifier 5 output (First SW output)
23 24
24 OP5-NF 2.25 Amplifier 5 noise filter connection
300
A13753
9
GND
--
Ground
13
VCC
5 V applied
Power supply
14
BTL-VCC
5 V applied
Power amplifier power supply
17
BTL-GND
--
Power amplifier ground
No. 6951-8/17
LA8522M Serial Data Format (6-bit structure)*1
CE CLOCK DATA A4 FIRST BIT
A13754
A3
A2
A1
A0
D
Crosspoint switch (and other device) address setting (binary) Controls the crosspoint switch and power amplifier on/off state. Electronic volume control and attenuator selection D = 1: Crosspoint switch: on D = 0: Crosspoint switch: off A6:0 D *1. When 8-bit serial data input mode is used. Since the serial data has a 6-bit structure, the first and second bits are unused when 8-bit input mode is used. Address table (Crosspoint switch) [Data A4:0]
Input - Output AMP1 AMP2 AMP3 AMP4 OUT1 10000 10001 10010 10011 OUT2 10100 10101 10110 10111 OUT3 11000 11001 11010 11011 OUT4 11100 11101 11110 11111
Other addresses [Data A4:0, D]
Address No. A4:0 00000 00011 00011 01000 01001 01010 01011 01100 01101 01110 01111 01000 01010 01100 01110 00010 00010 D * 0 1 0 0 0 0 0 0 0 0 1 1 1 1 0 1 Mode Reset, control switch default BTL power amplifier: off BTL power amplifier: on Electronic volume control Electronic volume control Electronic volume control Electronic volume control Electronic volume control Electronic volume control Electronic volume control Electronic volume control Attenuator 1-0 Attenuator 1-1 Attenuator 1-2 Attenuator 1-3 Attenuator 2-0 Attenuator 2-1 0 dB -4 dB -8 dB -12 dB -16 dB -20 dB -24 dB -28 dB 0 dB -4 dB -8 dB -12 dB 0 dB -6 dB Default setting Default setting Default setting *2 Default setting
*2. When the reset value is issued, the D data value can be either 0 or 1. Notes 1. A reset command must be issued 200 ms after power is applied. 2. The electronic volume control is set to 0 dB by a reset (address: 00000*). 3. Attenuator 1 is set to 0 dB by a reset (address: 00000*). 4. Attenuator 2 is set to 0 dB by a reset (address: 00000*).
No. 6951-9/17
LA8522M Serial Data Timing
fmax tWH tWH
tCS CE CLOCK DATA A4
tCH tWC
A3
A2 tDS tDH
A1
A0
D
A4
A3
A13755
* fmax (Maximum clock frequency) * tWL (Low-level clock pulse width) * tWH (High-level clock pulse width) * tCS (Chip enable setup time) * tCH (Chip enable hold time) * tDS (Data setup time) * tDH (Data hold time) * tWC (Chip enable pulse time) Usage Notes * Attenuator 1
500 kHz At least 1 s At least 1 s At least 1 s At least 1 s At least 1 s At least 1 s At least 1 s
Normally, attenuator 1 is set to 0 dB. It can be set to attenuate by -4, -8, or -12 dB by issuing serial data with a value of 010101, 011001, or 011101, respectively.
23 ATT1-OUT
A13756
ATT1
Crosspoint switch
* Attenuator 2 Normally, attenuator 2 is set to 0 dB. It can be set to attenuate by -6 dB by issuing serial data with a value of 000101.
22 ATT2-OUT
ATT2
Crosspoint switch
A13757
* Power amplifier phase compensation capacitors (Values shown are examples for reference purposes.)
+
PWR-VREF 19 PWR-IN 18
C1
10k 0.33 100k
PWR-GND 17 C2 PWR-OUT1 16 C3
C7
SP PWR-OUT2 15 C4 PWR-VCC 14 C5
+
C1: 100 F C2: 0.1 F C3: 0.1 F C4: 0.1 F C5: 0.1 F C6: 100 F C7: 100 pF (The time constant will be under 10 s.) SP8: 8 to 32 * Voltage gain: 20 to 30 dB
C6
A13758
No. 6951-10/17
LA8522M Of the external components, the capacitors C2 and C3 are the power amplifier phase compensation capacitors. If these capacitors are located away from the IC pin due to layout considerations, the impedance relationship will result in a reduction in the phase compensation effect, and high band oscillator may occur. Therefore, we recommend that the two capacitors C2 and C3 discussed above be located as close as possible to the IC pins in the layout. However, if you find that, due to layout relationships, the circuit tends to oscillate, we recommend that, rather than compensation using only capacitors, you use a phase compensation design with resistors (about 1 to 2.2 ) inserted in series with the capacitors. If the capacitor C7 is added to the feedback resistor path, the phase of the feedback path will be delayed and capacitors C4 and C5 will be required. Here, the time constant of the feedback resistor and C7 must be 10 s or less (100 k, 100 pF). * LA8522M ground line layout (See the figure on the following page.) The LA8522M circuit blocks can be roughly classified as follows. (1) Power amplifier system, (2) Crosspoint switch small-signal system Since this block structure involves two significantly different circuit types, each block has independent VCC and ground pins. It is best if external devices are connected to the ground line for the corresponding block, and that finally the two block ground lines are connected to the power supply (regulator) ground, which is the final reference. In particular, the PCB pattern should be formed with two ground lines. There are cases, however, where a single line is used for the power supply ground due to limitations on protruding PCB areas. In such cases, the ground line layout must be designed so that the sections of the ground line that carry large currents (the power amplifier block) are closer to the power supply ground (and thus have a lower impedance) than the sections of the ground line for circuits that draw smaller currents. If the large currents drawn by the power amplifier pass through ground line that handles the lower currents from the small-signal processing blocks, the signal path may be influenced by the ground, loops may be created, and low-band oscillation may occur. Therefore we recommend that the ground lines be designed as described above so that lines that carry larger amounts of current are connected the closest to the power supply ground that serves as the reference. * Inter-pin shorting This IC may be damaged or destroyed if power is applied with any pins shorted together. Therefore, when mounting this IC to a printed circuit board always check for pin shorting caused by stray solder or any other foreign material before applying power. * Load shorting This IC may be damaged or destroyed if it is operated for extended periods with the load shorted. Do not allow the load to be shorted. * Maximum ratings The slightest fluctuations in operating conditions may cause the ratings to be exceeded if this IC is operated in the vicinity of the maximum ratings. Since this can lead to destruction of the device, applications must be designed with adequate margins with respect to the power-supply voltage and other parameters so that the maximum ratings are never exceeded.
No. 6951-11/17
LA8522M
Continued from preceding page.
Ground Line Layout
A13759 + 13 12 Top view 15 SP 16 17 18
LA8522M
+
19
20
21
22
23
24
1
2
3
4
5
6
7
8
9
10
+
CPU
14
11
No. 6951-12/17
LA8522M
BTL Amplifier Output Distortion Characteristics (1)
Total harmonic distortion, THD -- % Total harmonic distortion, THD -- %
100 7 5 3 2
BTL Amplifier Output Distortion Characteristics (2)
100 7 5 3 2
RL=8 fIN=1kHz
RL=16 fIN=1kHz
VC C=4.5 V
VC C=5.5 V
3 2 1.0 7 5 3 2 0.1 10 2 3 5 7 100
3 2 1.0 7 5 3 2 0.1 10 2 3 5 7 100
5V
V CC =
2
3
5
7
1k
2
3
V CC =
5 7 1k
Output power, PO -- mW
Output power, PO -- mW
BTL Amplifier Output Distortion Characteristics (3)
Total harmonic distortion, THD -- % Output noise, Output NO -- Vrms
100 7 5 3 2 10 7 5 3 2 1.0 7 5 3 2 0.1 10 2 3 5 7 100 2 3 5 7 1k
BTL Amplifier Output Noise VCC Dependence
30
RL=32 fIN=1kHz
Rg=620
25
16Pin:BTL-OUT2 15Pin:BTL-OUT1
.5V
V 5V CC=5.5 V
VC C=4
20
V CC =
15
10
4
4.5
5
5.5
6
6.5
5V
7
Output power, PO -- mW
Supply voltage, VCC -- V
BTL Amplifier Ripple Rejection Ratio VCC Dependence
70
BTL Amplifier Ripple Rejection Ratio I/O Characteristics
70
Ripple rejection ratio, SVRR -- dB
Ripple rejection ratio, SVRR -- dB
60
VIN=100mVrms fIN=100Hz RL=16 19Pin:100F 15Pin:OUT2
65 60 55 50 45 40 35 30 -30
VCC=5V fIN=100Hz 19Pin:100F 15Pin:OUT2 16Pin:OUT1
50
16Pin:OUT1
40
30
4
4.5
5
5.5
6
6.5
7
-25
-20
VC C=5.5 V
-15 6.5 7
10 7 5
10 7 5
Supply voltage, VCC -- V
-5
Input level -- dBV
VO20 -- VCC
VIN=-42V Input to pin 2 (Amplifier 1 input) Output from pin 20 fIN=1kHz RL=10
Electronic Volume Control Step Width VCC Dependence
6
Output level, VO20 -- dBV
5
-10
Step width -- dB
4
-15
3
-20
4
4.5
5
5.5
6
6.5
7
2
4
4.5
5
5.5
Supply voltage, VCC -- V
Supply voltage, VCC -- V No. 6951-13/17
VC C=4.5 V
6
VIN=-42V Input to pin 2 (Amplifier 1 input) Output from pin 20 fIN=1kHz RL=10
LA8522M
VO23 -- VCC
Attenuator 1 Attenuation VCC Dependence
15 14 13
-5 -6
ATT1-1
VIN=-26V Input to pin 7 (Amplifier 3 input) Output from pin 23 fIN=1kHz RL=10
Output level, VO23 -- dBV
Attenuation, ATT -- dB
-7 -8 -9 -10 -11 -12 -13 -14 -15 4 4.5 5 5.5
12 11 10 9 8 7 6 5 4 3 2 1 0 4 4.5
ATT1-2
VIN=-26V Input to pin 7 (Amplifier 3 input) Output from pin 23 fIN=1kHz RL=10
ATT1-3
Supply voltage, VCC -- V
6
6.5
7
Supply voltage, VCC -- V
5
5.5
6
6.5
7
-5 -6
VO22 -- VCC
Attenuator 2 Attenuation VCC Dependence
10 9
Output level, VO22 -- dBV
-8 -9 -10 -11 -12 -13 -14 -15 4 4.5 5 5.5
Attenuation, ATT -- dB
-7
8 7
ATT2-1
6 5 4 3 2 1
VIN=-14V Input to pin 8 (Amplifier 4 input) Output from pin 22 fIN=1kHz RL=10
VIN=-14V Input to pin 8 (Amplifier 4 input) Output from pin 22 fIN=1kHz RL=10
6 6.5 7
0
4
4.5
Supply voltage, VCC -- V
Supply voltage, VCC -- V
5
5.5
6
6.5
7
No Signal Current Drain VCC Dependence
15 -70
Crosstalk I/O Characteristics
VCC=5V fIN=1kHz with:1k-BPF O N/ UT 1, :O FF
No signal current drain, ICCO -- mA
14
Crosstalk level, CT -- dBV
13 12 11 10 9 8 7 6 5 4 4.5
M PWR-A
P:ON
-80
-90
-100
-110
PWR-AMP:OFF
-120
F :OF SW F T1, :OF OU SW -IN/ T3, 2-I OU OP1 OP -IN/ OP2 1 110 :11 OP3-IN/OUT1, SW:OFF FF W :O 2, S SW UT 2, N/O UT 3-I /O OP N 3-I OP OP1-IN/OUT4, SW:OFF
-50 -40 -30 -20 -10 0
SW
5
5.5
6
6.5
7
-130 -60
Supply voltage, VCC -- V Equivalent input noise voltage, VNI -- Vrms
10
Input level -- dBV
100
VNI -- VCC
Rg=620
VNO -- VCC
Rg=620
Output noise voltage, VNO -- Vrms
7 5 3 2
VOUT:23Pin VOUT:20Pin
7
VOUT:6Pin (AMP2)
5
3
10 7 5 3 2
VOUT:22Pin VOUT:21Pin
2
VOUT:4Pin (AMP1)
1
4
4.5
5
5.5
6
6.5
7
1 4
4.5
5
5.5
6
6.5
7
Supply voltage, VCC -- V
Supply voltage, VCC -- V No. 6951-14/17
LA8522M
BTL Amplifier Output Distortion Characteristics (4)
Total harmonic distortion, THD -- %
100 7 5 3 2 10 7 5 3 2 1.0 7 5 3 2 0.1 10
Output Amplifier Output Noise Temperature Dependence
100
Output noise voltage, VNO -- Vrms
VCC=5V fIN=1kHz RL=16
VCC=5V Rg=620
7
5
3
BTL-OUT1:16Pin
2
TEMP:+70C
BTL-OUT2:15Pin
TEMP:+25C
2 3
TEMP:-20C
5
7
100
2
3
5
7
1k
10 -20
-10
0
10
20
30
40
50
60
70
Output power, PO -- mV
-5
Ambient temperature, Ta -- C
VO20 -- Ta
VIN=-42dBV Input to pin 2 (Amplifier 1 input) Output from pin 20 fIN=1kHz RL=10k
Electronic Volume Control Step Width Temperature Dependence
5
Output level, VO20 -- dBV
4.5
-10
Step width -- dB
VIN=-42dBV Input to pin 2 (Amplifier 1 input) Output from pin 20 fIN=1kHz RL=10k
4
STEP1, STEP STEP4, STEP STEP2, STEP
-15
3.5
-20 -20
-10
0
10
20
30
40
50
60
70
3 -20
-10
0
10
20
30
40
50
60
70
Ambient temperature, Ta -- C
0
Ambient temperature, Ta -- C
VO23 -- Ta
VIN=-44dBV Input to pin 5 (Amplifier 2 input) Output from pin 23 fIN=1kHz RL=10k
Attenuator Attenuation Temperature Dependence
0
Output level, VO23 -- dBV
Attenuation, ATT -- dB
ATT1-1
-5
VIN=-44dBV Input to pin 5 (Amplifier 2 input) Output from pin 23 fIN=1kHz RL=10k
-5
ATT1-2
-10
-10
ATT1-3
-15 -20
-10
0
10
20
30
40
50
60
70
-15 -20
-10
0
10
20
30
40
50
60
70
Ambient temperature, Ta -- C
0
Ambient temperature, Ta -- C
VO22 -- Ta
VIN=-32dBV Input to pin 5 (Amplifier 2 input) Output from pin 22 fIN=1kHz RL=10k
Attenuator Attenuation Temperature Dependence
0 -1 -2
Output level, VO22 -- dBV
Attenuation, ATT -- dB
-3 -4 -5 -6 -7 -8 -9
-5
VIN=-32dBV Input to pin 5 (Amplifier 2 input) Output from pin 22 fIN=1kHz RL=10k
ATT2-1
-10
-15 -20
-10
0
10
20
30
40
50
60
70
-10 -20
-10
0
10
20
30
40
50
60
70
Ambient temperature, Ta -- C
Ambient temperature, Ta -- C No. 6951-15/17
LA8522M
Amplifier 1 I/O Characteristics
Total harmonic distortion, THD -- % Total harmonic distortion, THD -- %
100 7 5 3 2 10 7 5 3 2 1.0 7 5 3 2 0.1 7 5 3 2 -50 -45 -40 -35
Amplifier 2 I/O Characteristics
100 7 5 3 2 10 7 5 3 2 1.0 7 5 3 2 0.1 7 5 3 2
VCC=5V fIN=1kHz Input to pin 2 Output from pin 4
VCC=5V fIN=1kHz Input to pin 5 Output from pin 6
P:+7 0C
TEM P:
TEM
-20
C
TEM TEM TEM
C
P:-2
0C
TE MP :+2 5
P:+7 P:+2
0C 5C
-35 -30 -25 -20 -15
0.01 -55
-25
-20
0.01 -45
-40
Input level -- dBV
100 7 5 3 2 10 7 5 3 2 1.0 7 5 3 2 0.1 -25 -20 -15 -10 -5 0
Input level -- dBV
100 7 5 3 2 10 7 5 3 2 1.0 7 5 3 2 0.1 -25
THD -- VO20
fIN=1kHz Input to pin 5 (Amplifier 2 input) Output from pin 20
THD -- VO21
fIN=1kHz Input to pin 5 (Amplifier 2 input) Output from pin 20
Total harmonic distortion, THD -- %
Total harmonic distortion, THD -- %
0C
5 C P:+2 TEM
P:+7
TEM
TEM
P:-2
0C
TEMP
:-20 C TEMP :+25C
TEMP
-20 -15
:+70
C
-5 0
-10
Output level, VO20 -- dBV
100 7 5 3 2 10 7 5 3 2 1.0 7 5 3 2 0.1 -25
Output level, VO21 -- dBV
100 7 5 3 2 10 7 5 3 2 1.0 7 5 3 2
THD -- VO22
Total harmonic distortion, THD -- %
fIN=1kHz Input to pin 5 (Amplifier 2 input) Output from pin 22
THD -- VO23
fIN=1kHz Input to pin 5 (Amplifier 2 input) Output from pin 23
Total harmonic distortion, THD -- %
TEMP
TEM
TEM
C TEMP:+ 25C
:-20
P:+
25
C
C
P:+
TEM
-20 -15
0C P:+7
-10 -5 0 5
70
TEMP
:-20
-20
C
-15 -10 -5 0 5
0.1 -25
Output level, VO22 -- dBV Equivalent input noise voltage, VNI -- Vrms
100 7 5 3 2
Output level, VO23 -- dBV
VCC=5V Rg=620
1000 7 5 3 2
VNI -- Ta
VNO -- Ta
VCC=5V Rg=620
Output noise voltage, VNO -- Vrms
100 7 5 3 2 10 7 5 3 2 -10 0 10
OUT1 OUT4 OUT2 OUT3
10 7 5 3 2
AMP2
AMP1
0.1 -20
-10
0
10
20
30
40
50
60
70
0.1 -20
20
30
40
50
60
70
Ambient temperature, Ta -- C
Ambient temperature, Ta -- C No. 6951-16/17
LA8522M
Specifications of any and all SANYO products described or contained herein stipulate the performance, characteristics, and functions of the described products in the independent state, and are not guarantees of the performance, characteristics, and functions of the described products as mounted in the customer's products or equipment. To verify symptoms and states that cannot be evaluated in an independent device, the customer should always evaluate and test devices mounted in the customer's products or equipment. SANYO Electric Co., Ltd. strives to supply high-quality high-reliability products. However, any and all semiconductor products fail with some probability. It is possible that these probabilistic failures could give rise to accidents or events that could endanger human lives, that could give rise to smoke or fire, or that could cause damage to other property. When designing equipment, adopt safety measures so that these kinds of accidents or events cannot occur. Such measures include but are not limited to protective circuits and error prevention circuits for safe design, redundant design, and structural design. In the event that any or all SANYO products (including technical data, services) described or contained herein are controlled under any of applicable local export control laws and regulations, such products must not be exported without obtaining the export license from the authorities concerned in accordance with the above law. No part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopying and recording, or any information storage or retrieval system, or otherwise, without the prior written permission of SANYO Electric Co., Ltd. Any and all information described or contained herein are subject to change without notice due to product/technology improvement, etc. When designing equipment, refer to the "Delivery Specification" for the SANYO product that you intend to use. Information (including circuit diagrams and circuit parameters) herein is for example only; it is not guaranteed for volume production. SANYO believes information herein is accurate and reliable, but no guarantees are made or implied regarding its use or any infringements of intellectual property rights or other rights of third parties.
This catalog provides information as of October, 2002. Specifications and information herein are subject to change without notice. PS No. 6951-17/17

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