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| Final Electrical Specifications LTC1597 16-Bit Parallel, Low Glitch Multiplying DAC with 4-Quadrant Resistors September 1998 FEATURES s s s DESCRIPTION The LTC (R)1597 is a parallel input 16-Bit multiplying current output DAC that operates from a single 5V supply. INL and DNL are accurate to 1LSB over the industrial temperature range in both 2- and 4-quadrant multiplying modes. True 16-bit 4-quadrant multiplication is achieved with on-chip 4-quadrant multiplication resistors. The LTC1597 is available in 28-pin SSOP package and is specified over the commercial and industrial temperature ranges. The device includes an internal deglitcher circuit that reduces the glitch impulse to less than 2nV-s (typ). The asynchronous CLR pin resets the LTC1597 to zero scale and the LTC1597-1 to midscale. For serial interface 16-bit current output DACs refer to the LTC1595/LTC1596 data sheet. s s s s s True 16-Bit Performance over Industrial Temperature Range DNL and INL: 1LSB Max On-Chip 4-Quadrant Resistors Allow Precise 0V to 10V, 0V to - 10V or 10V Outputs Asynchronous Clear Pin LTC1597: Reset to Zero Scale LTC1597-1: Reset to Midscale Glitch Impulse < 2nV-s 28-Lead SSOP Package Low Power Consumption: 10W Typ Power-On Reset APPLICATIONS s s s s Process Control and Industrial Automation Direct Digital Waveform Generation Software-Controlled Gain Adjustment Automatic Test Equipment , LTC and LT are registered trademarks of Linear Technology Corporation. TYPICAL APPLICATION 16-Bit, 4-Quadrant Multiplying DAC with a Minimum of External Components VREF 5V 0.1F INTEGRAL NONLINEARITY (LSB) LT1468 3 R1 R1 16 DATA INPUTS 10 TO 21, 24 TO 27 2 RCOM R2 1 REF 23 4 VCC ROFS ROFS RFB 5 RFB 33pF IOUT1 6 LTC1597-1 16-BIT DAC LT1468 DGND WR LD CLR 22 WR LD CLR 9 8 28 Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. + AGND 7 VOUT = -VREF TO VREF 1597 TA01 U - U U LTC1597/LTC1597-1 Integral Nonlinearity 1.0 0.8 0.6 0.4 0.2 0 -0.2 -0.4 -0.6 -0.8 -1.0 0 49152 32768 16384 DIGITAL INPUT CODE 65536 1597 TA02 + - VREF = 10V VOUT = 10V BIPOLAR 1 LTC1597 ABSOLUTE MAXIMUM RATINGS (Note 13) PACKAGE/ORDER INFORMATION TOP VIEW REF RCOM R1 ROFS RFB IOUT1 AGND LD WR 1 2 3 4 5 6 7 8 9 28 CLR 27 D0 26 D1 25 D2 24 D3 23 VCC 22 DGND 21 D4 20 D5 19 D6 18 D7 17 D8 16 D9 15 D10 G PACKAGE 28-LEAD PLASTIC SSOP TJMAX = 125C, JA = 95C/ W VCC to AGND ............................................... - 0.5V to 7V VCC to DGND .............................................. - 0.5V to 7V AGND to DGND ............................................. VCC + 0.5V DGND to AGND ............................................. VCC + 0.5V REF, ROFS, RFB, R1, RCOM to AGND, DGND .......... 25V Digital Inputs to DGND ............... - 0.5V to (VCC + 0.5V) IOUT1 to AGND ............................ - 0.5V to( VCC + 0.5V) Maximum Junction Temperature .......................... 125C Operating Temperature Range LTC1597/LTC1597-1C ............................ 0C to 70C LTC1597/LTC1597-1I ........................ - 40C to 85C Storage Temperature Range ................ - 65C to 150C Lead Temperature (Soldering, 10 sec)................. 300C ORDER PART NUMBER LTC1597ACG LTC1597BCG LTC1597AIG LTC1597BIG LTC1597-1ACG LTC1597-1BCG LTC1597-1AIG LTC1597-1BIG D15 10 D14 11 D13 12 D12 13 D11 14 Consult factory for Military grade and PDIP parts. ELECTRICAL CHARACTERISTICS VDD = 5V 10%, VREF = 10V, IOUT1 = AGND = DGND = 0V, TA = TMIN to TMAX, unless otherwise noted. SYMBOL PARAMETER Accuracy Resolution Monotonicity INL DNL GE Integral Nonlinearity Differential Nonlinearity Gain Error (Note 1) TA = 25C TMIN to TMAX TA = 25C TMIN to TMAX Unipolar Mode (Note 2) TA = 25C TMIN to TMAX Bipolar Mode (Note 2) TA = 25C TMIN to TMAX Gain Temperature Coefficient Bipolar Zero Error ILKG PSRR OUT1 Leakage Current Power Supply Rejection (Note 3) Gain/Temperature TA = 25C TMIN to TMAX (Note 4) TA = 25C TMIN to TMAX VCC = 5V 10% q q q q CONDITIONS LTC1597A/LTC1597-1A MIN TYP MAX 16 16 0.25 0.35 0.2 0.2 2 3 2 3 1 1 1 1 1 16 16 16 16 2 5 8 5 15 1 2 LTC1597B/LTC1597-1B MIN TYP MAX 16 16 2 2 1 1 16 24 16 24 1 2 10 16 5 15 1 2 UNITS Bits Bits LSB LSB LSB LSB LSB LSB LSB LSB ppm/C LSB LSB nA nA LSB/V q q q q q q 2 U W U U WW W LTC1597 ELECTRICAL CHARACTERISTICS VCC = 5V, VREF = 10V, IOUT1 = AGND = DGND = 0V, TA = TMIN to TMAX, unless otherwise noted. SYMBOL RREF R1/R2 ROFS, RFB PARAMETER DAC Input Resistance (Unipolar) R1/R2 Resistance (Bipolar) Feedback and Offset Resistances Output Current Settling Time Midscale Glitch Impulse Digital-to-Analog Glitch Impulse Multiplying Feedthrough Error THD Total Harmonic Distortion Output Noise Voltage Density Analog Outputs (Note 3) COUT Output Capacitance (Note 3) DAC Register Loaded to All 1s: COUT1 DAC Register Loaded to All 0s: COUT1 q q CONDITIONS (Note 5) (Notes 5, 12) (Note 5) (Notes 6, 7) (Note 11) (Note 8) VREF = 10V, 10kHz Sine Wave (Note 9) (Note 10) q q q MIN 4.5 9 9 TYP 6 12 12 1 2 1 1 108 10 115 70 MAX 10 20 20 UNITS k k k s nV-s nV-s mVP-P dB nV/Hz Reference Input AC Performance (Note 3) 130 80 pF pF V Digital Inputs VIH VIL IIN CIN tDS tDH tWR tLD tCLR tLWD VDD IDD Digital Input High Voltage Digital Input Low Voltage Digital Input Current Digital Input Capacitance Data to WR Setup Time Data to WR Hold Time WR Pulse Width LD Pulse Width Clear Pulse Width WR to LD Delay Time Supply Voltage Supply Current Digital Inputs = 0V or VCC (Note 3) VIN = 0V q q q q 2.4 0.8 0.001 1 8 60 0 60 110 60 0 4.5 5 5.5 10 20 -12 25 55 40 V A pF ns ns ns ns ns ns V A Timing Characteristics q q q q q q Power Supply q q The q denotes specifications that apply over the full operating temperature range. Note 1: 1LSB = 0.0015% of full scale = 15.3ppm of full scale. Note 2: Using internal feedback resistor. Note 3: Guaranteed by design, not subject to test. Note 4: I(OUT1) with DAC register loaded to all 0s. Note 5: Typical temperature coefficient is 100ppm/C. Note 6: IOUT1 load = 100 in parallel with 13pF. Note 7: To 0.0015% for a full-scale change, measured from the rising edge of LD. Note 8: VREF = 0V. DAC register contents changed from all 0s to all 1s or all 1s to all 0s. Note 9: VREF = 6VRMS at 1kHz. DAC register loaded with all 1s. Note 10: Calculation from en = 4kTRB where: k = Boltzmann constant (J/K), R = resistance (), T = temperature (K), B = bandwidth (Hz). Note 11: Midscale transition code 0111 1111 1111 1111 to 1000 0000 0000 0000. Note 12: R1 and R2 are measured between R1 and RCOM, REF and RCOM. Note 13: Absolute Maximum Ratings are those values beyond which the life of a device may be impaired. 3 LTC1597 PIN FUNCTIONS REF (Pin 1): Reference Input and 4-Quadrant Resistor R2. Typically 10V, accepts up to 25V. 2-Quadrant mode reference input. 4-quadrant mode, driven by external inverting reference amplifier. RCOM (Pin 2): Center Tap Point of the Two 4-Quadrant Resistors R1 and R2. Normally tied to the inverting input of an external amplifier in 4-quadrant operation, otherwise shorted to the REF pin. See Figures 1 and 2. R1 (Pin 3): 4-Quadrant Resistor R1. In 2-quadrant operation short to the REF pin. In 4-quadrant mode tie to the reference input. ROFS (Pin 4): Bipolar Offset Resistor. Typically swings 10V, accepts up to 25V. 2-quadrant operation tie to RFB. 4-quadrant operation tie to R1. RFB (Pin 5): Feedback Resistor. Normally tied to the output of the current to voltage converter op amp. Typically swings 10V. Swings VREF. IOUT1 (Pin 6): DAC Current Output. Tie to the inverting input of the current to voltage converter op amp. AGND (Pin 7): Analog Ground. Tie to ground. LD (Pin 8): DAC Digital Input Load Control Input. When LD is taken to a logic high, data is loaded from the input register into the DAC register, updating the DAC output. WR (Pin 9):DAC Digital Write Control Input. When WR is taken to a logic low, data is loaded from the digital input pins into the 16-bit wide input register. D15 to D4 (Pins 10 to 21): Digital Input Data Bits. DGND (Pin 22): Digital Ground. Tie to ground. VCC (Pin 23): The Positive Supply Input. 4.5V VCC 5.5V. Requires a bypass capacitor to ground. D3 to D0 (Pins 24 to 27): Digital Input Data Bits. CLR (Pin 28):Digital Clear Control Function for the DAC. When CLR is taken to a logic low, it sets the DAC output and all internal registers to zero code for the LTC1597 and midscale code for the LTC1597-1. TRUTH TABLE Table 1 CONTROL INPUTS CLR WR LD 0 1 1 1 1 1 1 0 X 0 1 0 X 0 1 1 REGISTER OPERATION Reset Input and DAC Register to All 0s for LTC1597 and midscale for LTC1597-1 (Asynchronous Operation) Load Input Register with All 16 Data Bits Load DAC Register with the Contents of the Input Register Input and DAC Register Are Transparent CLK = LD and WR Tied Together. The 16 Data Bits Are Loaded into the Input Register on the Falling Edge of the CLK and Then Loaded into the DAC Register on the Rising Edge of the CLK No Register Operation 4 U U U LTC1597 BLOCK DIAGRA REF 1 12k RCOM 2 12k R1 3 48k 48k VCC 23 DECODER LD 8 WR 9 TI I G DIAGRA APPLICATIONS INFORMATION Description The LTC1597 is a 16-bit multiplying, current output DAC with a full parallel 16-bit digital interface. The device operates from a single 5V supply and provides both unipolar 0V to - 10V or 0V to 10V and bipolar 10V output ranges from a 10V or -10V reference input. It has three additional precision resistors on chip for bipolar operation. Refer to the block diagram regarding the following description. The 16-bit DAC consists of a precision R-2R ladder for the 13LSBs. The 3MSBs are decoded into seven segments of resistor value R. Each of these segments and the R-2R ladder carries an equally weighted current of one eighth of full scale. The feedback resistor RFB and 4-quadrant U W W W 48k 48k 5 RFB 48k 48k 48k 48k 48k 96k 96k 96k 96k 12k 12k 4 ROFS 6 IOUT1 7 AGND 22 DGND D14 D13 D12 D11 *** D0 (LSB) RST LOAD D15 (MSB) DAC REGISTER 28 CLR WR INPUT REGISTER RST 1597 BD 10 D15 11 D14 **** 21 D4 24 D3 25 D2 26 D1 27 D0 U U UW tWR WR DATA tDS tDH tLWD LD tLD tCLR CLR 1597TD 5 LTC1597 APPLICATIONS INFORMATION resistor ROFS have a value of R/4. 4-quadrant resistors R1 and R2 have a magnitude of R/4. R1 and R2 together with an external op amp (see Figure 2) inverts the reference input voltage and applies it to the 16-bit DAC input REF, in 4-quadrant operation. The REF pin presents a constant input impedance of R/8 in unipolar mode and R/12 in bipolar mode. The output impedance of the current output pin IOUT1 varies with DAC input code. The IOUT1 capacitance due to the NMOS current steering switches also varies with input code from 70pF to 115pF. An added feature of the LTC1597, especially for waveform generation, is a proprietary deglitcher that reduces glitch energy to below 2nV-s over the DAC output voltage range. Digital Section The LTC1597 has a 16-bit wide, full parallel data input bus. The device is double-buffered with two 16-bit registers. The double-buffered feature permits the update of several DACs simultaneously. The input register is loaded directly from a 16-bit microprocessor bus when the WR pin is brought to a logic low level. The second register (DAC register) is updated with the data from the input register when the LD pin is brought to a logic high level. Updating the DAC register updates the DAC output with the new data. To make both registers transparent for flowthrough mode, tie WR low and LD high. However, this defeats the deglitcher operation and output glitch impulse may increase. The deglitcher is activated on the rising edge of the LD pin. The versatility of the interface also allows the use of the input and DAC registers in a master slave or edge-triggered configuration. This mode of operation occurs when WR and LD are tied together. The asynchronous clear pin resets the LTC1597 to zero scale and the LTC1597-1 to midscale. CLR resets both the input and DAC registers. The device also has a power-on reset. Table 1 shows the truth table for the device. Unipolar Mode (2-Quadrant Multiplying, VOUT = 0V to - VREF) The LTC1597 can be used with a single op amp to provide 2-quadrant multiplying operation as shown in Figure 1. With a fixed - 10V reference, the circuit shown gives a precision unipolar 0V to 10V output swing. Bipolar Mode (4-Quadrant Multiplying, VOUT = - VREF to VREF) The LTC1597 contains on chip all the 4-quadrant resistors necessary for bipolar operation. 4-quadrant multiplying operation can be achieved with a minimum of external components, a capacitor and a dual op amp, as shown in Figure 2. With a fixed 10V reference, the circuit shown gives a precision bipolar - 10V to 10V output swing. Op Amp Selection Because of the extremely high accuracy of the 16-bit LTC1597, thought should be given to op amp selection in order to achieve the exceptional performance of which the part is capable. Fortunately, the sensitivity of INL and DNL to op amp offset has been greatly reduced compared to previous generations of multiplying DACs. Op amp offset will contribute mostly to output offset and gain and will have minimal effect on INL and DNL. For the LTC1597, a 500V op amp offset will cause about 0.55LSB INL degradation and 0.15LSB DNL degradation with a 10V full-scale range. The main effects of op amp offset will be a degradation of zero-scale error equal to the op amp offset, and a degradation of full-scale error equal to twice the op amp offset. For the LTC1597, the same 500V op amp offset will cause a 3.3LSB zero-scale error and a 6.5LSB full-scale error with a 10V full-scale range. Op amp input bias current (IBIAS) contributes only a zeroscale error equal to IBIAS(RFB//ROFS) = IBIAS(6k). For a thorough discussion of 16-bit DAC settling time and op amp selection, refer to Application Note 74,"Component and Measurement Advances Ensure 16-Bit DAC Settling Time." Grounding As with any high resolution converter, clean grounding is important. A low impedance analog ground plane and star grounding should be used. AGND must be tied to the star ground with as low a resistance as possible. 6 U W U U LTC1597 APPLICATIONS INFORMATION 5V 0.1F VREF 3 R1 R1 16 DATA INPUTS 10 TO 21, 24 TO 27 WR LD CLR WR LD CLR 9 8 28 2 RCOM R2 1 REF 23 VCC 4 ROFS ROFS RFB 5 RFB 33pF IOUT1 LTC1597 16-BIT DAC 6 DGND 22 Unipolar Binary Code Table DIGITAL INPUT BINARY NUMBER IN DAC REGISTER LSB MSB 1111 1111 1111 1111 1000 0000 0000 0000 0000 0000 0000 0001 0000 0000 0000 0000 ANALOG OUTPUT VOUT -VREF (65,535/65,536) -VREF (32,768/65,536) = -VREF/2 -VREF (1/65,536) 0V Figure 1. Unipolar Operation (2-Quadrant Multiplication) VOUT = 0V to - VREF VREF 5V 0.1F 1/2 LT1112 3 R1 R1 16 DATA INPUTS 10 TO 21, 24 TO 27 2 RCOM R2 1 REF 23 4 VCC ROFS ROFS RFB 5 RFB 33pF IOUT1 6 LTC1597-1 16-BIT DAC AGND DGND 22 7 WR LD CLR WR LD CLR 9 8 28 Bipolar Offset Binary Code Table DIGITAL INPUT BINARY NUMBER IN DAC REGISTER LSB MSB 1111 1111 1111 1111 1000 0000 0000 0001 1000 0000 0000 0000 0111 1111 1111 1111 0000 0000 0000 0000 ANALOG OUTPUT VOUT VREF (32,767/32,768) VREF (1/32,768) 0V -VREF (1/32,768) -VREF Figure 2. Bipolar Operation (4-Quadrant Multiplication) VOUT = - VREF to VREF + AGND 7 - + - U + - W U U LT1001 VOUT = 0V TO -VREF 1597 F01 1/2 LT1112 VOUT = -VREF TO VREF 1597 F02 7 LTC1597 TYPICAL APPLICATION 5V 0.1F 2 RCOM VREF 3 R1 R1 16 DATA INPUTS 10 TO 21, 24 TO 27 WR LD CLR WR LD CLR 9 8 28 R2 LTC1597 16-BIT DAC AGND DGND 22 7 Figure 3. Noninverting Unipolar Operation (2-Quadrant Multiplication) VOUT = 0V to VREF PACKAGE DESCRIPTION Dimensions in inches (millimeters) unless otherwise noted. G Package 28-Lead Plastic SSOP (0.209) (LTC DWG # 05-08-1640) 0.205 - 0.212** (5.20 - 5.38) 0.068 - 0.078 (1.73 - 1.99) 0.397 - 0.407* (10.07 - 10.33) 28 27 26 25 24 23 22 21 20 19 18 17 16 15 0 - 8 0.301 - 0.311 (7.65 - 7.90) 0.002 - 0.008 (0.05 - 0.21) 0.005 - 0.009 (0.13 - 0.22) 0.022 - 0.037 (0.55 - 0.95) 0.0256 (0.65) BSC *DIMENSIONS DO NOT INCLUDE MOLD FLASH. MOLD FLASH SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE **DIMENSIONS DO NOT INCLUDE INTERLEAD FLASH. INTERLEAD FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE 0.010 - 0.015 (0.25 - 0.38) 1 2 3 4 5 6 7 8 9 10 11 12 13 14 G28 SSOP 0694 RELATED PARTS PART NUMBER LT1001 LT1112 LT1468 LTC1595/LTC1596 DESCRIPTION Precision Operational Amplifier Dual Low Power, Precision Picoamp Input Op Amp 90MHz, 22V/s, 16-Bit Accurate Op Amp Serial 16-Bit Current Output DACs COMMENTS Low Offset, Low Drift Low Offset, Low Drift Precise, 1s Settling to 0.0015% Low Glitch, 1LSB Maximum INL, DNL 8 Linear Technology Corporation 1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408)432-1900 q FAX: (408) 434-0507 q www.linear-tech.com + - U U + - 1/2 LT1112 1 REF 23 4 VCC ROFS ROFS RFB 5 RFB 33pF IOUT1 6 1/2 LT1112 VOUT = 0V TO VREF 15/97 F03 1597i LT/TP 0998 4K * PRINTED IN USA (c) LINEAR TECHNOLOGY CORPORATION 1998 |
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