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| CXD3400N 6-channel CCD Vertical Clock Driver Description The CXD3400N is a vertical clock driver for CCD image sensor. This IC is composed of 6 channels which supports high frame rate readout mode. Features * Composition Vertical transfer output 20 pin SSOP (Plastic) 3 levels driver x 4 2 levels driver x 2 Electronic shutter output 2 levels driver x 1 * Suitable drive capability for high-pixel CCD (40% improved compared to current device) * Small package (20-pin SSOP) * 2.7 to 5.5V supported input interface Applications Digital still camera Structure CMOS Absolute Maximum Ratings * Supply voltage VDD GND - 0.3 to +7.0 * Supply voltage VL GND to -10 * Supply voltage VH VL + 26 * Input voltage VIN GND - 0.3V to VDD + 0.3 * Operating temperature Topr -20 to +75 * Storage temperature Tstg -55 to +150 Recommended Operating Conditions * Supply voltage VDD 2.7 to 5.5 * Supply voltage VL -5.0 to -9.0 * Supply voltage VH 11.5 to 15.5 * Operating temperature Topr -20 to +75 V V V V C C V V V C Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits. -1- E98Y42A9X CXD3400N Block Diagram VDD XSHT XV3 XSG3B XSG3A XV1 XSG1B XSG1A XV4 XV2 1 Input Buffer 2 3 4 5 6 7 8 9 10 19 V3B 18 VL 17 V3A 16 V1B 15 VH 14 V1A 13 V4 12 V2 11 GND 20 SHT Pin Description Pin No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 Symbol VDD XSHT XV3 XSG3B XSG3A XV1 XSG1B XSG1A XV4 XV2 GND V2 V4 V1A VH V1B V3A VL V3B SHT I/O -- I I I I I I I I I -- O O O -- O O -- O O Input power supply (3.3V system) SHT pulse input V3A and V3B transfer pulse input V3B readout pulse input V3A readout pulse input V1A and V1B readout pulse input V1B readout pulse input V1A readout pulse input V4 transfer pulse input V2 transfer pulse input GND (= VM) High voltage output (2 levels: VM, VL) High voltage output (2 levels: VM, VL) High voltage output (3 levels: VH, VM, VL) Positive power supply for high voltage output (15V system) High voltage output (3 levels: VH, VM, VL) High voltage output (3 levels: VH, VM, VL) Negative power supply for high voltage output (-7.5V system) High voltage output (3 levels: VH, VM, VL) High voltage output (2 levels: VH, VL) -2- Functions CXD3400N Truth Table Input XV1, 3 L L H H X X X X XSG1A, 1B, 3A, 3B L H L H X X X X XV2, 4 X X X X L H X X XSHT X X X X X X L H V1A, 1B, 3A, 3B VH VM Z VL X X X X Output V2, 4 X X X X VM VL X X SHT X X X X X X VH VL Z: High impedance X: Don't care Electrical Characteristics DC Characteristics Item "H" level input voltage "L" level input voltage Input current Operating supply current Operating supply current Operating supply current Output current Output current Output current Output current Output current Output current Symbol VIH VIL IIN IH IDD IL IOL IOM1 IOM2 IOH IOSL IOSH VIN = GND to 5V 1 1 1 V1A, 1B, 3A, 3B, V2, 4 = -8.25V V1A, 1B, 3A, 3B, V2, 4 = -0.25V V1A, 1B, 3A, 3B = 0.25V V1A, 1B, 3A, 3B = 14.75V SHT = -8.25V SHT = 14.75V Conditions (VDD = 3.3V, VH = 15V, VM = GND, VL = -8.5V) Min. 0.7VDD -- -10 -- -- -8.5 10 -- 5.0 -- 5.4 -- Typ. -- -- 0.0 0.10 0.25 -5.5 -- -- -- -- -- -- Max. -- 0.3VDD 10 0.20 0.50 -- -- -5.0 -- -7.2 -- -4.0 Unit V V A mA mA mA mA mA mA mA mA mA 1 See Measurement Circuit. Shutter speed 1/10000 Note) Current direction +: inflow to IC; -: outflow from IC -3- CXD3400N Switching Characteristics Item Propagation delay time Propagation delay time Propagation delay time Propagation delay time Propagation delay time Propagation delay time Rise time Rise time Rise time Fall time Fall time Fall time Output noise voltage Output noise voltage Output noise voltage Output noise voltage Symbol TPLM TPMH TPLH TPML TPHM TPHL TTLM TTMH TTLH TTML TTHM TTHL VCLH VCLL VCMH VCML 1 1 1 1 1 1 VL VM1 VM VH1 VL VH1 VM VL1 VH VM1 VH VL1 2 2 2 2 Conditions (VDD = 3.3V, VH = 15V, VM = GND, VL = -7.5V) Min. 50 50 50 10 10 10 200 200 30 200 200 30 -- -- -- -- Typ. 70 70 70 30 30 30 350 350 60 350 350 60 -- -- -- -- Max. 100 100 100 50 50 50 500 500 90 500 500 90 1.0 1.0 1.0 1.0 Unit ns ns ns ns ns ns ns ns ns ns ns ns V V V V 1 See Switching Waveform. 2 See Noise on a Waveform. Note) Each item is evaluated by Measurement Circuit. Notes on Operation (See Application Circuit.) 1. Be sure to protect against static electricity because this IC is MOS structure. 2. A bypass capacitor (0.1F or more) is connected between GND and near each power supply (VH, VDD, VL). 3. In order to protect CCD image sensor, input SHT pin output to SUB pin of CCD image sensor after that has been clamped at VH. -4- CXD3400N Switching Waveform VDD (3.3V) XV1 to 4 GND VDD (3.3V) XSG1A, 1B, 3A, 3B GND TPMH VH V1A, 1B, 3A, 3B TTLM TPLM VM 90% 10% TPML TTML TTMH 90% 50% TPHM TTHM 50% VL 10% TTLM TTML TPML 90% VM V2, 4 VL VDD (3.3V) XSHT GND VH TPLM 10% 50% TTLH TPLH TPHL 90% TTHL SHT VL 10% Noise on a Waveform VCHH VM VCHH VCHL VCHL VL VCLH VCLL -5- CXD3400N Measurement Circuit C1 R1 C1 R1 C1 R1 C2 C2 C2 C2 C2 C2 C2 C2 C2 C2 C1 R1 C1 C2 C2 R2 C1 R1 C2 C2 C2 R1 -7.5V C3 20 19 18 17 15V 0V 16 15 14 13 12 11 Between vertical transfer clock and GND C1 3300pF Capacitance between vertical transfer clocks C2 560pF Capacitance between substrate clock and GND C3 820pF Vertical transfer clock series resistor R1 30 Vertical transfer clock ground resistor R2 10 CXD3400N 1 2 3 4 5 6 7 8 9 10 3.3V Timing Generator -6- CXD3400N Application Circuit 15V 3.3V 0.1 100k 1/35V 1 2 3 4 5 6 7 8 9 10 from Timing Generator 20 0.1 19 -7.5V 18 17 16 15 14 13 12 11 0.1 0.1 SUB V3B V3A V1B V1A V4 V2 CCD 1M 2200p CXD3400N See with drive circuit of CCD image sensor. Application circuits shown are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits or for any infringement of third party patent and other right due to same. Note with Power-on Sequence To protect CCD image sensor, rise two power supplies, VL and VH as follows. Note that rise VDD first. VH t1 20% VM 20% t2 t2 t1 VL -7- CXD3400N Package Outline Unit: mm 20PIN SSOP (PLASTIC) 6.5 0.1 + 0.2 1.25 - 0.1 0.1 20 11 A 4.4 0.1 1 10 0.65 b 0.13 M b=0.22 0.03 0.1 0.1 0.5 0.2 DETAIL B : PALLADIUM NOTE: Dimension "" does not include mold protrusion. 0 to 10 PACKAGE STRUCTURE DETAIL A PACKAGE MATERIAL SONY CODE EIAJ CODE JEDEC CODE SSOP-20P-L01 SSOP020-P-0044 LEAD TREATMENT LEAD MATERIAL PACKAGE MASS EPOXY RESIN PALLADIUM PLATING COPPER ALLOY 0.1g -8- + 0.03 0.15 - 0.01 6.4 0.2 |
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