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C8051F330 ANALOG PERIPHERALS 8KB Flash, 768 RAM, 10-Bit ADC, 20-Pin MCU ADVANCED INFORMATION 10-BIT ADC - Up to 200ksps - Up to 16 External Inputs - Reference from Internal VREF, VDD, or External Pin - Internal or External Start of Conversion Sources - Built-in Temperature Sensor ( 3C) 10-BIT DAC (Current Mode) Comparator - Programmable Hysteresis and Response Time - Configurable as Wake-up or Reset Source - Low Current (0.4uA) HIGH SPEED 8051 C Core - Pipelined Instruction Architecture; Executes 70% of Instructions in 1 or 2 System Clocks Up to 25MIPS Throughput with 25MHz Clock Expanded Interrupt Handler 768 Bytes Internal Data RAM (256 + 512 XRAM) 8k Bytes FLASH; In-System Programmable in 512 byte Sectors MEMORY DIGITAL PERIPHERALS 17 Port I/O; All 5V tolerant with High Sink Current Enhanced Hardware UART, SPI, and SMBus Serial Ports Four General Purpose 16-Bit Counter/Timers 16-bit Programmable Counter Array with Three Capture/Compare Modules, WDT ON-CHIP DEBUG On-Chip Debug Circuitry Facilitates Full Speed, Non-Intrusive In-System Debug (No Emulator Required!) Provides Breakpoints, Single Stepping, Watchpoints Inspect/Modify Memory, Registers, and Stack Superior Performance to Emulation Systems Using ICE-Chips, Target Pods, and Sockets Low Cost, Complete Development Kit Typical Operating Current: 5.8mA @ 25MHz 11uA @ 32kHz Typical Stop Mode Current: <0.1uA - Real Time Clock Mode using PCA or Timer and External Clock Source Two Internal Oscillators: 24.5MHz, 2% Accuracy Supports UART Operation 80kHz Low Frequency, Low-power External Oscillator: Crystal, RC, C, or Clock (1 or 2 Pin Modes) Can Switch Between Clock Sources on-the-fly; Useful in Power Saving Modes 4 x 4mm PCB Footprint CLOCK SOURCES - SUPPLY VOLTAGE ................2.7V to 3.6V Temperature Range: -40C to +85C 20-Pin Micro Lead Package SMBus is a trademark of Intel Corp.; SPI is a trademark of Motorola, Inc. Port 0 Latch UART Timer 0, 1, 2, 3 3-Chnl PCA/ WDT SMBus SPI Port 1 Latch P 1 D r v P 0 D r v X B A R P0.0/VREF P0.1/IDAC P0.2/XTAL1 P0.3/XTAL2 P0.4/TX P0.5/RX P0.6/CNVST P0.7 P1.0 P1.1 P1.2 P1.3 P1.4 P1.5 P1.6 P1.7 CP0 + - VDD GND Analog/Digital Power 8kbyte FLASH 256 byte SRAM 512 byte XRAM C2D Debug HW Reset BrownOut /RST/C2CK POR External Oscillator Circuit 8 0 5 1 XTAL1 XTAL2 24.5MHz (2%) Internal Oscillator 80kHz Internal Oscillator System Clock C o SFR Bus r e 10-bit DAC IDAC VREF VDD VREF Temp A M U X 10-bit 200ksps ADC Port 2 Latch AIN0-AIN15 C2D P2.0/C2D 9.9.2002 C8051F330 8KB Flash, 768 RAM, 10-Bit ADC, 20-Pin MCU ADVANCED INFORMATION SELECTED ELECTRICAL SPECIFICATIONS TA = -40C to +85C, VDD = 2.7V unless otherwise specified. PARAMETER CONDITIONS MIN TYP MAX UNITS GLOBAL CHARACTERISTICS Supply Voltage Supply Current with CPU active Supply Current (shutdown) Clock Frequency Range 2.7 Clock=25MHz Clock=1MHz Clock=32kHz; VDD Monitor Disabled Oscillator off; VDD Monitor Enabled Oscillator off; VDD Monitor Disabled DC 24.0 Note 1 24.5 80 10 1/2 1/2 5.8 0.34 11 10 <0.1 25 25.0 3.6 V mA mA A A A MHz MHz kHz bits LSB LSB dB ksps V bits LSB s s A s A s A s A INTERNAL OSCILLATORS Frequency (OSC0) Frequency (OSC1) A/D CONVERTER Resolution Integral Nonlinearity Differential Nonlinearity Signal-to-Noise Plus Distortion Throughput Rate Input Voltage Range Guaranteed Monotonic 53 0 10 Guaranteed Monotonic 10 (CP+) - (CP-) = 100mV (CP+) - (CP-) = 100mV (CP+) - (CP-) = 100mV (CP+) - (CP-) = 100mV 0.1 7.6 0.18 3.2 0.32 1.3 1 0.4 1 1 1 200 VREF D/A CONVERTER Resolution Differential Nonlinearity Output Settling Time COMPARATOR Response Time Mode0 Current Consumption Mode0 Response Time Mode1 Current Consumption Mode1 Response Time Mode2 Current Consumption Mode2 Response Time Mode3 Current Consumption Mode3 Note 1: OSC1 can be calibrated in 2.5% steps using an internal calibration register PACKAGE INFORMATION Bottom View A A1 A2 A3 b D D2 E E2 e L N ND NE R AA BB CC DD MIN 0.80 0 0 0.18 2.00 2.00 0.45 MM TYP 0.90 0.02 0.65 0.25 0.23 4.00 2.15 4.00 2.15 0.5 0.55 20 5 5 0.435 0.435 0.18 0.18 MAX 1.00 0.05 1.00 0.30 2.35 2.35 0.65 10 6 7 8 9 C8051F330DK DEVELOPMENT KIT L 5 11 D2 E2 D2 2 12 R 13 14 15 17 16 4xe E 4 3 e b 2 1 DETAIL 1 20 19 18 E2 2 0.09 4xe D Side View A2 A DETAIL 1 AA BB DD CC A3 A1 e 9.9.2002 |
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