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2-Phase Stepper-Motor Driver
TLE 4726
Bipolar IC Overview Features * 2 x 0.75 A / 50 V outputs * Integrated driver, control logic and current control (chopper) * Fast free-wheeling diodes * Low standby-current drain * Full, half, quarter, mini step
P-DSO-24-3
Type TLE 4726 G Description
Ordering Code Q67006-A9297
Package P-DSO-24-3
TLE 4726 is a bipolar, monolithic IC for driving bipolar stepper motors, DC motors and other inductive loads that operate on constant current. The control logic and power output stages for two bipolar windings are integrated on a single chip which permits switched current control of motors with 0.75 A per phase at operating voltages up to 50 V. The direction and value of current are programmed for each phase via separate control inputs. A common oscillator generates the timing for the current control and turn-on with phase offset of the two output stages. The two output stages in a full-bridge configuration have integrated, fast free-wheeling diodes and are free of crossover current. The logic is supplied either separately with 5 V or taken from the motor supply voltage by way of a series resistor and an integrated Z-diode. The device can be driven directly by a microprocessor with the possibility of all modes from full step through half step to mini step.
Data Sheet
1
1999-09-15
TLE 4726
10 11 Phase 1 OSC GND GND GND GND Q11 R1 + VS Q12
1 2 3 4 5 6 7 8 9 10 11 12
24 23 22 21 20 19 18 17 16 15 14 13
IEP00898
20 21 Phase 2 Inhibit GND GND GND GND Q21 R2 +VL Q22
Figure 1
Pin Configuration (top view)
Data Sheet
2
1999-09-15
TLE 4726
Pin Definitions and Functions Pin No. 1, 2, 23, 24 Function Digital control inputs IX0, IX1 for the magnitude of the current of the particular phase. IX1 H H L L 3 IX0 H L H L Phase Current 0 1/3 Imax 2/3 Imax Example of Motor Status No current Hold Set Accelerate typical Imax with Rsense = 1 : 750 mA
Imax
Input Phase 1; controls the current through phase winding 1. On H-potential the phase current flows from Q11 to Q12, on L-potential in the reverse direction.
5, 6, 7, 8, 17, Ground; all pins are connected internally. 18, 19, 20 4 10 9, 12 11 Oscillator; works at approx. 25 kHz if this pin is wired to ground across 2.2 nF. Resistor R1 for sensing the current in phase 1. Push-pull outputs Q11, Q12 for phase 1 with integrated free-wheeling diodes. Supply voltage; block to ground, as close as possible to the IC, with a stable electrolytic capacitor of at least 10 F in parallel with a ceramic capacitor of 220 nF. Logic supply voltage; either supply with 5 V or connect to + VS across a series resistor. A Z-diode of approx. 7 V is integrated. In both cases block to ground directly on the IC with a stable electrolytic capacitor of 10 F in parallel with a ceramic capacitor of 100 nF. Push-pull outputs Q22, Q21 for phase 2 with integrated free-wheeling diodes. Resistor R2 for sensing the current in phase 2. Inhibit input; the IC can be put on standby by low potential on this pin. This reduces the current consumption substantially. Input phase 2; controls the current flow through phase winding 2. On H-potential the phase current flows from Q21 to Q22, on L potential in the reverse direction.
3 1999-09-15
14
13, 16 15 21 22
Data Sheet
TLE 4726
+VL 14 4 Oscillator D11 T11 10 1 D13 11 2 Functional Logic Phase 1 T13
+ VS 11
D12 T12 9
Q11
Phase 1 D14 T14 12 Q12
Phase 1
3
10
R1
Inhibit
21
Inhibit D21 T21 D22 T22 16 Q21
20
24 D23 D24 T24 13 T23 Q22
Phase 2 Functional Logic Phase 2
21
23
Phase 2
22 5-8, 17-19 GND
15
R2
IEB00899
Figure 2
Block Diagram
Data Sheet
4
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TLE 4726
Absolute Maximum Ratings
TA = - 40 to 125 C
Parameter Supply voltage Logic supply voltage Z-current of VL Output current Ground current Logic inputs Symbol Limit Values min. max. 52 6.5 50 1 2 V V mA A A V V C C C - Z-diode - - - 0 0 - -1 -2 -6 - 0.3 - - - 50 Unit Remarks
VS VL IL IQ IGND VIxx VRX, VOSC Tj Tj Tstg
VL +
0.3
IXX ; Phase 1, 2;
Inhibit - - max. 10,000 h -
R1, R2, oscillator input voltage
Junction temperature Storage temperature
VL +
0.3 125 150 125
Note: Stresses above those listed here may cause permanent damage to the device. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
Data Sheet
5
1999-09-15
TLE 4726
Operating Range Parameter Supply voltage Logic supply voltage Case temperature Symbol Limit Values min. max. 50 6.5 110 V V C - without series resistor measured on pin 5 Pdiss = 2 W - 5 4.5 - 25 Unit Remarks
VS VL TC
Output current Logic inputs
IQ VIXX
- 800 -5
800
mA V
VL
IXX ; Phase 1, 2;
Inhibit
Thermal Resistances Junction ambient Junction ambient (soldered on a 35 m thick 20 cm2 PC boar copper area) Junction case
Rth ja Rth ja
- -
75 50
K/W P-DSO-24-3 K/W P-DSO-24-3
Rth jc
-
15
K/W measured on pin 5 P-DSO-24-3
Note: In the operating range, the functions given in the circuit description are fulfilled.
Characteristics VS = 40 V; VL = 5 V; - 25 C Tj 125 C Parameter Symbol Limit Values min. Current Consumption from + VS from + VS from + VL from + VL typ. max. Unit Test Condition
IS IS IL IL
- - - -
0.2 16 1.7 18
0.5 20 3 25
mA mA mA mA
Vinh = L Vinh = H IQ1/2 = 0, IXX = L Vinh = L Vinh = H IQ1/2 = 0, IXX = L
Data Sheet
6
1999-09-15
TLE 4726
Characteristics (cont'd) VS = 40 V; VL = 5 V; - 25 C Tj 125 C Parameter Oscillator Output charging current Charging threshold Discharging threshold Frequency Symbol Limit Values min. typ. 110 1.3 2.3 25 max. - - - 40 A V V kHz - - - Unit Test Condition
IOSC VOSCL VOSCH fOSC
- - - 18
COSC = 2.2 nF
Phase Current Selection Current Limit Threshold No current Hold Setpoint Accelerate Logic Inputs (IX1 ; IX0 ; Phase x) Threshold L-input current L-input current H-input current
Vsense n Vsense h Vsense s Vsense a
- 200 420 700
0 250 540 825
- 300 680 950
mV mV mV mV
IX0 = H; IX1 = H IX0 = L; IX1 = H IX0 = H; IX1 = L IX0 = L; IX1 = L
VI IIL IIL IIH
1.4 (HL) - 10 - 100 -
- - - -
2.3 (LH) - - 10
V A A A
-
VI = 1.4 V VI = 0 V VI = 5 V
Standby Cutout (inhibit) Threshold Threshold Hysteresis Internal Z-Diode Z-voltage
VInh
(LH)
2 1.7 0.3
3 2.3 0.7
4 2.9 1.1
V V V
- - -
VInh
(HL)
VInhhy
VLZ
6.5
7.4
8.2
V
IL = 50 mA
Data Sheet
7
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TLE 4726
Characteristics (cont'd) VS = 40 V; VL = 5 V; - 25 C Tj 125 C Parameter Symbol Limit Values min. Power Outputs Diode Transistor Sink Pair (D13, T13; D14, T14; D23, T23; D24, T24) Saturation voltage Saturation voltage Reverse current Forward voltage Forward voltage typ. max. Unit Test Condition
Vsatl Vsatl IRl VFl VFl
- - - - -
0.3 0.5 - 0.9 1
0.6 1 300 1.3 1.4
V V A V V
IQ = - 0.5 A IQ = - 0.75 A VQ = 40 V IQ = 0.5 A IQ = 0.75 A
Diode Transistor Source Pair (D11, T11; D12, T12; D21, T21; D22, T22) Saturation voltage Saturation voltage Saturation voltage Saturation voltage Reverse current Forward voltage Forward voltage Diode leakage current
VsatuC VsatuD VsatuC VsatuD IRu VFu VFu ISL
- - - - - - - -
0.9 0.3 1.1 0.5 - 1 1.1 1
1.2 0.7 1.4 1 300 1.3 1.4 2
V V V V A V V mA
IQ = 0.5 A; charge IQ = 0.5 A; discharge IQ = 0.75 A; charge IQ = 0.75 A; discharge VQ = 0 V IQ = - 0.5 A IQ = - 0.75 A IF = - 0.75 A
Note: The listed characteristics are ensured over the operating range of the integrated circuit. Typical characteristics specify mean values expected over the production spread. If not otherwise specified, typical characteristics apply at TA = 25 C and the given supply voltage.
Data Sheet
8
1999-09-15
TLE 4726
Quiescent Current IS, IL versus Supply Voltage VS
40
IED01655
Quiescent Current IS, IL versus Junction Temperature Tj
40
IED01656
S, L
mA
T j = 25 C
S, L
mA
V S = 40V
30
XX = L L XX = H L
30
20
20
L L
XX = L XX = H
10
10
S
S
0
0
10
20
30
V VS
50
0
-25
0
25
50
75 100 C 150 Tj
Output Current IQX versus Junction Temperature Tj
800
IED01657
Operating Condition: = 5V =H = 2.2 nF = 1 Load: L = 10 mH R = 2.4 fphase = 50 Hz mode: fullstep
QX
mA
600
VL VInh COSC Rsense
400
200
0
-25
0
25 50
75 100 C 150 Tj
Data Sheet
9
1999-09-15
TLE 4726
Output Saturation Voltages Vsat versus Output Current IQ
Forward Current IF of Free-Wheeling Diodes versus Forward Voltages VF
F
1.0 A 0.8
IED01167
V Fl T j = 25 C
V Fu
0.6
0.4
0.2
0
0
0.5
1.0
V
1.5
VF
Typical Power Dissipation Ptot versus Output Current IQ (Non Stepping)
Permissible Power Dissipation Ptot versus Case Temperature TC
12 W
IED01660
Ptot
Measured at pin 5.
10 P-DSO-24 8
6 P-DIP-20 4
2
0 -25
0
25 50 75 100 125 C 175 Tc
Data Sheet
10
1999-09-15
TLE 4726
Input Characteristics of Ixx, Phase X, Inhibit
0.8 mA
IED01661
Input Current of Inhibit versus Junction Temperature Tj
IXX 0.6
V L = 5V
0.4 0.2 0 0.2 0.4 0.6 0.8 -6 -5 -2 3.9 2 V 6 V IXX
Oscillator Frequency fOSC versus Junction Temperature Tj
30 kHz
IED01663
f OSC
V S = 40V V L = 5V COSZ = 2.2nF
25
20
15 -25 0
25 50 75 100 125 C 150 Tj
Data Sheet
11
1999-09-15
TLE 4726
100 F
220 nF
L
14
S
11
220 nF
100 F
VS
1 2
10 11
VL
VS
Q11 Q12 9 12 16 13
L H
3 21 24 23 22
Phase 1 Inhibit 20 21 Phase 2 OSC 4
TLE 4726
Q21 Q22
Q - Fu
-R Ru VSatl
VSatu - VFu
V L V H
15
10
OSC VOSC
2.2 nF
GND 5, 6, 7, 8 17, 18, 19, 20
- VFl
R2 1 VSense
R1 1
GND
VSense
AES02301
Figure 3
Test Circuit
+5 V 100 F 220 nF 14 VL 11 VS Q11 Q12 9 12 16 13 220 nF
+40 V 100 F
1 2 3 Micro Controller 21 24 23 22
10 11
Phase 1 Inhibit 20 21 Phase 2 OSC 4
TLE 4726
Q21 Q22
M
15
10
2.2 nF
R2 1
R1 1
GND 5, 6, 7, 8 17, 18, 19, 20
AES02302
Figure 4
Data Sheet
Application Circuit
12 1999-09-15
TLE 4726
Accelerate Mode
Normal Mode
10 11
Phase 1
H L H L H L
t
t
t
i acc i set
Q1
i set i acc i acc i set
t
Q2
i set i acc
Phase 2 H L H L H L
t
t
t
20 21
t
IED01666
Figure 5
Full-Step Operation
Data Sheet
13
1999-09-15
TLE 4726
Accelerate Mode
Normal Mode
10 11
H L H L H L
t
t
Phase 1
t
i acc i set
Q1
- i set - i acc
t
i acc i set
Q2
- i set - i acc Phase 2 H L H L H L
t
t
20 21
t
t
IED01667
Figure 6
Half-Step Operation
Data Sheet
14
1999-09-15
TLE 4726
Figure 7
Quarter-Step Operation
Data Sheet
15
1999-09-15
TLE 4726
10 11
Phase 1
H L H L H L
t
t
t
i acc i set i hold
Q1
i hold i set i acc i acc i set i hold
t
Q2
i hold i set i acc
Phase 2 H L H L H L
t
t
20 21
t
t
IED01665
Figure 8
Mini-Step Operation
Data Sheet
16
1999-09-15
TLE 4726
V Osc
2.4 V 1.4 V 0
T
t
GND
0
t
V Q12
+ VS
V FU V sat 1
0
t V Q11
+ VS
V satu D
V satu C t
V Q22
+ VS
0
t V Q21
+ VS
Operating conditions:
VS VL L phase x R phase x V phase x V Inhibit V xx
= 40 V =5V = 10 mH = 20 =H =H =L
t
IED01177
Figure 9
Current Control
Data Sheet
17
1999-09-15
TLE 4726
Inhibit L
V Osc
t
2.3 V 1.3 V 0 Oscillator High Imped. Phase Changeover Oscillator High Imped.
t
Phase 1
GND
L
N
0
t
t V Fu V Q11
+V S High Impedance
Vsatu C
Vsatu D
High Impedance V Fl
V satl
t V Q12
+V S High Impedance
t
Phase 1
Slow Current Decay
Operating Conditions:
= 40 V VS =5V V L phase 1 = 10 mH R phase 1 = 20 1X = L; 1X = H
t
Fast Current Decay Fast Current Decay by Inhibit
IED01178
Slow Current Decay
Figure 10 Phase Reversal and Inhibit
Data Sheet 18 1999-09-15
TLE 4726
Calculation of Power Dissipation The total power dissipation Ptot is made up of saturation losses Psat (transistor saturation voltage and diode forward voltages), quiescent losses Pq (quiescent current times supply voltage) and switching losses Ps (turn-ON / turn-OFF operations). The following equations give the power dissipation for chopper operation without phase reversal. This is the worst case, because full current flows for the entire time and switching losses occur in addition.
Ptot = 2 x Psat + Pq + 2 x Ps where Psat IN { Vsatl x d + VFu (1 - d ) + VsatuC x d + VsatuD (1 - d ) } Pq = Iq x VS + IL x VL
V S i D x t DON i D + i R x t ON I N P S ------ --------------------- + ----------------------------- + ---- t DOFF + t OFF T 2 2 4
IN Iq iD iR tp tON tOFF tDON tDOFF T d Vsatl VsatuC VsatuD VFu VS VL IL
= nominal current (mean value) = quiescent current = reverse current during turn-on delay = peak reverse current = conducting time of chopper transistor = turn-ON time = turn-OFF time = turn-ON delay = turn-OFF delay = cycle duration = duty cycle tp/T = saturation voltage of sink transistor (T3, T4) = saturation voltage of source transistor (T1, T2) during charge cycle = saturation voltage of source transistor (T1, T2) during discharge cycle = forward voltage of free-wheeling diode (D1, D2) = supply voltage = logic supply voltage = current from logic supply
Data Sheet
19
1999-09-15
TLE 4726
+V S
Tx1
Dx1
Dx2
Tx2
L
Tx4
Tx3
Dx3
Dx4
V sense R sense
IES01179
Figure 11
Voltage and Current at Chopper Transistor
Turn-ON
iR iD
Turn-OFF
N
VS + VFu
VS + VFu Vsatl t D ON t ON tp t D OFF t OFF t
IET01210
Figure 12
Data Sheet
20
1999-09-15
TLE 4726
Application Hints The TLE 4726 is intended to drive both phases of a stepper motor. Special care has been taken to provide high efficiency, robustness and to minimize external components. Power Supply The TLE 4726 will work with supply voltages ranging from 5 V to 50 V at pin VS. As the circuit operates with chopper regulation of the current, interference generation problems can arise in some applications. Therefore the power supply should be decoupled by a 0.22 F ceramic capacitor located near the package. Unstabilized supplies may even afford higher capacities. Current Sensing The current in the windings of the stepper motor is sensed by the voltage drop across R1 and R2. Depending on the selected current internal comparators will turn off the sink transistor as soon as the voltage drop reaches certain thresholds (typical 0 V, 0.25 V, 0.5 V and 0.75 V); (R1 , R2 = 1 ). These thresholds are neither affected by variations of VL nor by variations of VS . Due to chopper control fast current rises (up to 10 A/s) will occur at the sensing resistors R1 and R2 . To prevent malfunction of the current sensing mechanism R1 and R2 should be pure ohmic. The resistors should be wired to GND as directly as possible. Capacitive loads such as long cables (with high wire to wire capacity) to the motor should be avoided for the same reason. Synchronizing Several Choppers In some applications synchrone chopping of several stepper motor drivers may be desireable to reduce acoustic interference. This can be done by forcing the oscillator of the TLE 4726 by a pulse generator overdriving the oscillator loading currents (approximately 100 A). In these applications low level should be between 0 V and 1 V while high level should be between 2.6 V and VL . Optimizing Noise Immunity Unused inputs should always be wired to proper voltage levels in order to obtain highest possible noise immunity. To prevent crossconduction of the output stages the TLE 4726 uses a special break before make timing of the power transistors. This timing circuit can be triggered by short glitches (some hundred nanoseconds) at the Phase inputs causing the output stage to become high resistive during some microseconds. This will lead to a fast current decay during that time. To achieve maximum current accuracy such glitches at the Phase inputs should be avoided by proper control signals.
Data Sheet
21
1999-09-15
TLE 4726
Thermal Shut Down To protect the circuit against thermal destruction, thermal shut down has been implemented. To provide a warning in critical applications, the current of the sensing element is wired to input Inhibit. Before thermal shut down occurs Inhibit will start to pull down by some hundred microamperes. This current can be sensed to build a temperature prealarm.
Data Sheet
22
1999-09-15
TLE 4726
Package Outlines P-DSO-24-3 (Plastic Dual Small Outline Package)
0.35 x 45
+0.09
2.65 max
2.45 -0.2
0.2 -0.1
7.6 -0.2 1)
1.27 0.35 +0.15 2) 24 0.2 24x 13 0.1
0.4 +0.8 10.3 0.3
1 Index Marking
15.6 -0.4 1)
12
1) Does not include plastic or metal protrusions of 0.15 max rer side 2) Does not include dambar protrusion of 0.05 max per side
Sorts of Packing Package outlines for tubes, trays etc. are contained in our Data Book "Package Information". SMD = Surface Mounted Device Dimensions in mm
Data Sheet
23
0.23
GPS05144
8 ma x
1999-09-15

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