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Ordering number : ENN*6746
CMOS IC
LC86E6449
8-Bit Single Chip Microcontroller with the UVEPROM
Preliminary Overview
The LC86E6449 is a CMOS 8-bit single chip microcontroller with UVEPROM for the LC866400 series. This microcontroller has the function and the pin description of the LC866400 series mask ROM version, and 48K-byte EPROM. The program data is rewritable. It is suitable to develop the program.
Features
(1) Option switching by EPROM data The option function of the LC866400 series can be specified by the EPROM data. LC86E6449 can be checked the function of the trial pieces using the mass production board. (2) Internal one-time EPROM capacity : 49408 bytes (3) Internal RAM capacity : 1152 bytes Used EPROM or RAM capacity are equal ROM or RAM capacity of mask ROM version which applies LC86E6449.
Mask ROM version LC866448 LC866444 LC866440 LC866436 LC866432 LC866428 LC866424 LC866420 LC866416 LC866412 LC866408 EPROM capacity 49152 bytes 45056 bytes 40960 bytes 36864 bytes 32768 bytes 28672 bytes 24576 bytes 20480 bytes 16384 bytes 12288 bytes 8192 bytes RAM capacity 1152 bytes 1152 bytes 1152 bytes 1152 bytes 768 bytes 768 bytes 768 bytes 640 bytes 640 bytes 512 bytes 512 bytes
Ver.1.04 73196
91400 RM (IM) SK No.6746-1/22
LC86E6449 (4) Operating supply voltage : 4.5V to 6.0V (5) Instruction cycle time : 1.0s to 366s (6) Operating temperature : +10C to +40C (7) The pin compatible with the LC866400 series mask ROM devices (8) Applicable mask ROM version : LC866448/LC866444/LC866440/LC866436//LC866432/LC866428 /LC866424/LC866420/LC866416/LC866412/LC866408 (9) Operating temperature : QFC80E (with window)
Notice for use
LC86E6449 is provided for the first release and small shipping of the LC866400 series. At using, take notice of the followings. (1) A point of difference LC86E6449 and LC866400 series
Item Operation after reset releasing LC86E6449 The option is specified until 3ms after going to a `H' level to the reset terminal by dgrees. The program is executed from 00H of the program counter. Pull-down resistor provided/not provided Not provided Provided (fixed) Provided (fixed) Not provided 4.5V to 6.0V +10C to +40C LC866448/44/40/36/32/28/24/20/16/12/08 The program is executed from 00H of the program counter immediately after going to a `H' level to reset terminal. Pull-down resistor provided/not provided Specified by the option Provided (fixed) Specified by the option Specified by the option 2.5V to 6.0V -30C to +70C
Pull-down resistor of the following pins *S0/T0 - S6/T6 *S7/T7 - S15/T15 *S16 - S27 *S28 - S37 Operating supply Voltage range (VDD) Operating temperature range (Topg) "L" level hold Tr. of the high voltage withstand input terminal Power dissipation
Refer to `electrical characteristics' on the semiconductor news.
LC86E6449 uses 256 bytes that is addressed on FF00H to FFFFH in the program memory as the option configuration data area. This option configuration cannot execute all options which LC866400 series have. Next tables show the options that correspond and not correspond to LC86E6449.
No.6746-2/22
LC86E6449 * A kind of the option corresponding of the LC86E6449
A kind of option Input/output form of Input/output ports Pins, Circuits Port 0 Contents of the option 1. N-channel open drain output 2. CMOS output 1. 2. Port 1 Pull-up MOS Tr. proveded Pull-up MOS Tr. not provided : Programmable pull-up MOS Tr. : N-channel open drain : Programmable pull-up MOS Tr. : CMOS : No Programmable pull-up MOS Tr. : N-channel open drain : Programmable pull-up MOS Tr. : CMOS *1 *2
*1 Port 3
1. Input Output 2. Input Output 1. Input Output 2. Input Output
*1 Pull-up MOS Tr. of input ports Port 7 *1
1. No Pull-up MOS Tr. 2. Pull-up MOS Tr.
*1) Specified in a bit *2) Specified in nibble unit.
The port of N-channel open drain output does not have the Pull-up MOS Tr..
* A kind of the option not corresponding of the LC86E6449
A kind of option Pull-down resistor of the high voltage Withstand output terminals Pins, Circuits *S0/T0 to S6/T6 *S16 to S27 *S28 to S37 LC86E6449 Not provided Provided (fixed) Not provided LC866448/44/40/36/32/28/24/20/16/12/08 Specified by the option Specified by the option Specified by the option
(2) Option The option data is created by the option specified program "SU86K.EXE". program area by linkage loader "L86K.EXE".
The created option data is linked to the
No.6746-3/22
LC86E6449 (3) ROM space LC86E6449 and LC866400 series use 256 bytes that is addressed on 0FF00H to 0FFFFH in the program memory as the option specified data area. These program memory capacity are 61440 bytes that is addressed on 0000H to BFFFH.
0FFFFH The option specified area 256 bytes 0FF00H 0EFFFH 0DFFFH 0CFFFH 0BFFFH 0AFFFH 9FFFH 8FFFH 7FFFH 6FFFH 5FFFH 4FFFH 3FFFH 2FFFH 1FFFH Program area 0FFFH 48K bytes 0000H LC866448
The option specified area
The option specified area
The option specified area
The option specified area
The option specified area
Program area 44K bytes LC866444
Program area 40K bytes LC866440
Program area 36K bytes LC866436
Program area 32K bytes LC866432
Program area 28K bytes LC866428
0FFFFH 0FF00H 0EFFFH 0DFFFH 0CFFFH 0BFFFH 0AFFFH 9FFFH 8FFFH 7FFFH 6FFFH 5FFFH 4FFFH 3FFFH 2FFFH 1FFFH 0FFFH 0000H
The option specified area
The option specified area
The option specified area
The option specified area
The option specified area
Program area 24K bytes LC866424
Program area 20K bytes LC866420
Program area 16K bytes LC866416
Program area 12K bytes LC866412
Program area 8K bytes LC866408
No.6746-4/22
LC86E6449
How to use
(1) Specification of option Programming data for EPROM of the LC86E6449 is required. Debugged evaluation file (EVA file) must be converted to an INTEL-HEX formatted file (HEX file) with file converter program, EVA2HEX.EXE. The HEX file is used as the programming data for the LC86E6449. (2) How to program for the EPROM LC86E6449 can be programmed by the EPROM programmer with attachment ; W86EP6448Q. * Recommended EPROM programmer
Productor Advantest Andou AVAL Minato electronics EEPROM programmer R4945, R4944, R4943 AF-9704 PKW-1100, PKW-3000 MODEL 1890A
* "27512 (Vpp=12.5V) Intel high speed programming" mode available. The address must be set to "0 to 0FFFFH" and a jumper (DASEC) must be set to `OFF' at programming. (3) How to use the data security function "Data security" is the disabled function to read the data of the EPROM. The following is the process in order to execute the data security. 1. Set `ON' the jumper of attachment. 2. Program again. Then EPROM programmer displays the error. The error means normally activity of the data security. It is not a trouble of the EPROM programmer or the LSI. Notes * Data security is not executed when the data of all address have `FFH' at the sequence 2 above. * The programming by a sequential operation "BLANKPROGRAMVERIFY" cannot be executed data security at the sequence 2 above. * Set to `OFF' the jumper after executing the data security.
Data security
1 pin mark of LSI
Not data security 1 pin W86EP6448Q
No.6746-5/22
LC86E6449 (4) How to eliminate The programming data can be erased by using the EPROM eraser. (5) Shielding The UVEPROM (ultraviolet erasable programmable ROM) is in it. Put the seal on the window in use.
Pin Assignment
RES XT1/P74 XT2/P75 VSS1 CF1 CF2 VDD1 P80/AN0 P81/AN1 P82/AN2 P83/AN3 P84/AN4 P85/AN5 P86/AN6 P87/AN7 P71/INT1 P72/INT2/T0IN P73/INT3/T0IN
P17/PWM0 P30 P31 P32 P33 P70/INT0
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24
P00 P01 P02 P03 P04 P05 P06 P07 VSS2 P10/SO0 P11/SI0/SB0 P12/SCK0 P13/SO1 P14/SI1/SB1 P15/SCK1 P16/BUZ
65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80
64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41
S37/PE5 S36/PE4 S35/PE3 S34/PE2 S33/PE1 S32/PE0 S31/PD7 S30/PD6 S29/PD5 S28/PD4 S27/PD3 S26/PD2 S25/PD1 S24/PD0 S23/PC7 S22/PC6 S21/PC5 S20/PC4 S19/PC3 S18/PC2 S17/PC1 S16/PC0 VP VDD2
40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25
S15/T15 S14/T14 S13/T13 S12/T12 S11/T11 S10/T10 S9/T9 S8/T8 S7/T7 S6/T6 S5/T5 S4/T4 S3/T3 S2/T2 S1/T1 S0/T0
SANYO: QFC80E
No.6746-6/22
LC86E6449
System Block Diagram
Interrupt Control
IR
PLA
A15-A0 D7-D0 TA CE OE DASEC
Stand-by Control EPROM Control CF RC X'tal PC
Clock Generator
EPROM(48KB)
Base Timer
Bus Interface
ACC
SIO0
Port 1
B Register
SIO1
Port 3
C Register
Timer 0
Port 7 ALU
Timer 1
Port 8
ADC
PSW
INT0 to 3 Noise Filter
RAR
Real Time Service
RAM
RAM 128 bytes
Stack Pointer
Port 0 VFD Controller Watchdog Timer High Voltage Output
No.6746-7/22
LC86E6449
LC86E6449 Pin description
Pin name VSS1,2 VDD1,2 VP PORT0 P00 to P07 I/O I/O Power pin (-) Power pin (+) *4 Refer to Notes Power pin (-) for the VFD output pull-down resist *8-bit input/output port *Input for port 0 interrupt *Input/output in nibble units *Input for HOLD release *15V withstand at N-channel open drain output *8-bit input/output port *Input/output can be specified in a bit unit *Other pin functions P10 SIO0 data output P11 SIO0 data input/bus input/output P12 SIO0 clock input/output P13 SIO1 data output P14 SIO1 data input/bus input/output P15 SIO1 clock input/output P16 Buzzer output P17 Timer 1 output (PWM0 output) *4-bit input/output port *Input/output can be specified *15V withstand at N-channel open drain output *6-bit input port *Other functions P70 : INT0 input/HOLD release input/ N-ch Tr. output for watchdog timer P71 : INT1 input/HOLD release input P72 : INT2 input/timer 0 event input P73 : INT3 input with noise rejection filter/timer 0 event input P74 : XT1 terminal for 32.768kHz crystal oscillation P75 : XT2 terminal for 32.768kHz crystal oscillation *Interrupt received forms, the vector addresses rising falling rising high level & falling low vector level Function description Option EPROM mode
*Pull-up resistor : Provided/Not provided *Output form : CMOS/N-channel open drain
PORT1 P10 to P17
I/O
*Output form : Data line CMOS/N-channel open drain D0 to D7
PORT3 P30 to P33
I/O
*Output form : CMOS/N-channel open drain
PORT7
Pull-up resistor : Provided/Not provided (P70,71,72,73) * P74 ,P75 don't have pull-up resistor option.
P70 P71 to P75
I/O I
EPROM control signals DASEC (*1) OE (*2) CE bE (*3)
INT0 enable enable disable enable enable 03H INT1 enable enable disable enable enable 0BH INT2 enable enable enable disable disable 13H INT3 enable enable enable disable disable 1BH
Continue.
No.6746-8/22
LC86E6449
Pin name PORT8 P80 to 87 S0/T0 to S6/T6 *6 S7/T7 to S15/T15 *7 S16 to S31 *8 I/O I Function description *8-bit input port *Other function AD input port (8 port pins) Output for VFD display controller Segment/timing in common *Output for VFD display controller Segment/timing with internal pull-down resistor in common *Output for VFD display controller Segment output *Other function S16 : High voltage input port PC0 S17 : High voltage input port PC1 S18 : High voltage input port PC2 S19 : High voltage input port PC3 S20 : High voltage input port PC4 S21 : High voltage input port PC5 S22 : High voltage input port PC6 S23 : High voltage input port PC7 S24 : High voltage input port PD0 S25 : High voltage input port PD1 S26 : High voltage input port PD2 S27 : High voltage input port PD3 S28 : High voltage input port PD4 S29 : High voltage input port PD5 S30 : High voltage input port PD6 S31 : High voltage input port PD7 S32 to S37 *9 I/O *Output for VFD display controller Segment *Other function S32 : High voltage I/O port PE0 S33 : High voltage I/O port PE1 S34 : High voltage I/O port PE2 S35 : High voltage I/O port PE3 S36 : High voltage I/O port PE4 S37 : High voltage I/O port PE5 Reset pin *Input pin for 32.768kHz crystal oscillation *Other function XT1 : Input port P74 In case of non use, connect to VDD1. XT2/P75 O *Output pin for 32.768kHz crystal oscillation *Other function XT2 : Input port P75 In case of non use, connect to VDD1 at using as port or unconnect at using as oscillation. Option EPROM mode
O O
-
TA (*5)
I/O
-
*Address input A15 to A0 *EPROM control signal input
RES
I I
-
-
XT1/ P74
No.6746-9/22
LC86E6449
Pin name CF1 CF2 I/O I O Function description Input pin for the ceramic resonator oscillation Output pin for the ceramic resonator oscillation Option EPROM mode
All of port options except the pull-up resistor option of port 0 can be specified in a bit unit. *1 *2 *3 *4 *5 *6 *7 *8 *9 *10 Memory select input for data security Output enable input Chip enable input Connect like the following figure to reduce noise into a VDD1 terminal. TA ! EPROM control signal input S0/T0 to S6/T6 : not provided the pull-down resistor S7/T7 to S15/T15 : provided the pull-down resistor (fixed) S16 to S27 : provided the pull-down resistor (fixed) S28 to S31 : not provided the pull-down resistor S32 to S37 : not provided the pull-down resistor
[Notes] When connecting to the power supply, the power pins must be connected like following figure.
For the LC866448B/44B/40B/36B
LSI VDD1 Power Supply For back-up VDD2 (VFD power pin) VSS1 VSS2
For the LC866432A/28A/24A/20A/16A/12A/08A
LSI VDD1 Power Supply For back-up VDD2 (VFD power pin) VSS1 VSS2
No.6746-10/22
LC86E6449 1. Absolute Maximum Ratings at VSS1=VSS2=0V and Ta=25C
Parameter Supply voltage Input voltage Symbol VI(1) VI(2) VO(1) VIO(1) Pins *Ports 71,72,73, 74 ,75,8 * RES VP S0/T0 to S15/T15 *Port 1 *Port 70 *Ports 0, 3 of CMOS output Ports 0, 3 of open drain output S16 to S37 Ports 0, 1, 3 S0/T0 to S15/T15 S16 to S37 Ports 0,1,3 S0/T0 to S15/T15 S16 to S37 Ports 0,1,3 Port 70 Conditions VDD1=VDD2 Ratings typ. unit V
VDD[V]
VDDMAX VDD1, VDD2
min. -0.3 -0.3 VDD-45 VDD-45 -0.3
max. +7.0 VDD+0.3 VDD+0.3 VDD+0.3 VDD+0.3
Output voltage Input/Output voltage
VIO(2) VIO(3) IOPH(1) IOPH(2) IOPH(3) IOAH(1) IOAH(2) IOAH(3) IOPL(1) IOPL(2)
-0.3 VDD-45 -10 -30 -15 -30 -55 -115
15 VDD+0.3 mA
High Peak level output output current current Total output current Low Peak level output output current current Total output current Maximum power dissipation Operating temperature range Storage temperature range
*CMOS output *At each pins At each pins At each pins The total of all pins The total of all pins The total of all pins At each pins At each pins The total of all pins The total of all pins Ta=+10 to+40C
20 15 40 40 480 mW C
IOAL(1) Port 0 IOAL(2) Ports 1,3 Pdmax QFC80E
Topr
+10
+40
Tstg
-55
+125
No.6746-11/22
LC86E6449 2. Recommended Operating Range at Ta=+10C to +40C, VSS1=VSS2=0V
Parameter Operating Supply voltage Hold voltage Symbol VDD(1) Pins VDD1=VDD2 Conditions 98stCYC tCYC400s RAMs and the registers hold voltage at HOLD mode. 4.5 to 6.0 Output disable Output disable Output disable Ratings typ. unit V
VDD[V]
min. 4.5
max. 6.0
VHD
VDD1=VDD2
2.0
6.0
Pull-down Voltage Input high voltage
VP VIH(1) VIH(2) VIH(3)
VP Port 0 at CMOS output Port 0 at open drain output *Port 1 *Ports 72,73 *Port 3 at CMOS output Port 3 at open drain output *Port 70 Port input/interrupt *Port 71 * RES Port 70 Watchdog timer *Port 8 *Ports 74 ,75 S16 to S37 Port 0 at CMOS output option Port 0 at open drain output *Ports 1,3 *Ports 72,73 *Port 70 Port input/interrupt *Port 71 * RES Port 70 Watchdog timer *Port 8 *Ports 74 ,75 S16 to S37
-35
VDD VDD 13.5 VDD
4.5 to 6.0 0.33VDD
+1.0 4.5 to 6.0 0.75VDD
4.5 to 6.0 0.75VDD
VIH(4) VIH(5)
Output disable Output N-channel Tr. OFF
4.5 to 6.0 0.75VDD 4.5 to 6.0 0.75VDD
13.5 VDD
VIH(6) VIH(7) VIH(8) Input low voltage VIL(1) VIL(2) VIL(3) VIL(4)
Output N-channel Tr. OFF Using as port Output P-channel Tr. OFF Output disable Output disable Output disable Output N-channel Tr. OFF
4.5 to 6.0 0.9VDD 4.5 to 6.0 0.75VDD 4.5 to 6.0 0. 33VDD
+1.0
VDD VDD VDD 0.2VDD
0.25VDD 0.25VDD 0.25VDD
4.5 to 6.0 4.5 to 6.0 4.5 to 6.0 4.5 to 6.0
VSS VSS VSS VSS
VIL(5) VIL(6) VIL(7) Operation tCYC cycle time Oscillation FmCF(1) frequency range (Note 1) FmCF(2)
Output N-channel Tr. OFF Using as port Output P-channel Tr. OFF
4.5 to 6.0 4.5 to 6.0 4.5 to 6.0 4.5 to 6.0
VSS VSS VP 0.98 6
0. 8VDD -1.0
0.25VDD
0.2VDD 400 s MHz
CF1, CF2
CF1, CF2
FmRC FsXtal
XT1, XT2
*6MHz (ceramic resonator oscillation) *Refer to figure 1 *3MHz (ceramic resonator oscillation) *Refer to figure 1 RC oscillation *32.768kHz (crystal oscillation) *Refer to figure 2
4.5 to 6.0
4.5 to 6.0
3
4.5 to 6.0 4.5 to 6.0
0.3
0.8 32.768
3.0 kHz
Continue.
No.6746-12/22
LC86E6449
Ratings typ.
Parameter Oscillation stabilizing time period (Note 1)
Symbol tmsCF(1)
Pins CF1, CF2
Conditions *6MHz (ceramic resonator oscillation) *Refer to figure 3 *3MHz (ceramic resonator oscillation) *Refer to figure 3 *32.768kHz (crystal oscillation) *Refer to figure 3
VDD[V] 4.5 to 6.0
min.
max.
unit ms
tmsCF(2)
CF1, CF2
4.5 to 6.0
tssXtal
XT1, XT2
4.5 to 6.0
s
(Note 1) The oscillation constant is shown on table 1 and table 2.
No.6746-13/22
LC86E6449 3. Electrical Characteristics at Ta=+10C to +40C, VSS1=VSS2=0V
Parameter Input high current Symbol IIH(1) Pins Ports 0,3 at open drain output Conditions *Output disable *VIN=13.5V (including off-leakage current of output Tr.) *Output disable *Pull-up MOS Tr. OFF. *VIN=VDD (including off-leakage current of output Tr.) VIN=VDD Ratings typ. unit A
VDD[V] 4.5 to 6.0
min.
max. 5
IIH(2)
*Ports 1,3 *Port 0 without pull-up MOS Tr.
4.5 to 6.0
1
IIH(3)
IIH(4) IIH(5) IIH(6) Input low current IIL(1)
*Ports 70,71,72,73 without pull-up MOS Tr. *Port 8 RES Ports 74 ,75 S28 to S37 *Ports 1,3 *Port 0 without pull-up MOS Tr.
4.5 to 6.0
1
IIL(2)
IIL(3) IIL(4) Output high voltage
*Ports 70,71,72,73 without pull-up MOS Tr. *Port 8 RES Ports 74 ,75
VIN=VDD Using as port VIN=VDD *Output disable *VIN=VDD *Output disable *Pull-up MOS Tr. OFF. *VIN=VSS (including off-leakage current of output Tr.) VIN=VSS
4.5 to 6.0 4.5 to 6.0 4.5 to 6.0 4.5 to 6.0 -1
1 1 1
4.5 to 6.0
-1
VOH(1) Ports 0,1,3 of VOH(2) CMOS output VOH(3) S0/T0 to S15/T15 VOH(4)
VOH(5) S16 to S37 VOH(6)
Output low voltage
VOL(1) Ports 0,1,3 VOL(2) VOL(3)
VOL(4) Port 70 Pull-up MOS Rpu *Ports 0,1,3 Tr. resistor *Ports 70,71,72,73
VIN=VSS Using as port VIN=VSS IOH=-1.0mA IOH=-0.1mA IOH=-20mA *IOH=-1.0mA *The current of these each pins is not over 1mA. IOH=-5mA *IOH=-1.0mA *The current of these each pins is not over 1mA. IOL=10mA IOL=1.6mA *IOL=1mA *The current of these each pins is not over 1mA. IOL=1mA VOH=0.9VDD
4.5 to 6.0 4.5 to 6.0
-1 -1 V
4.5 to 6.0 VDD-1 4.5 to 6.0 VDD-0.5 4.5 to 6.0 VDD-1.8 4.5 to 6.0 VDD-1
4.5 to 6.0 VDD-1.8 4.5 to 6.0 VDD-1
4.5 to 6.0 4.5 to 6.0 4.5 to 6.0
1.5 0.4 0.4
4.5 to 6.0 4.5 to 6.0
15
40
0.4 70
k
Continue.
No.6746-14/22
LC86E6449
Ratings typ.
Parameter Output offleakage current
Symbol
Pins
Conditions *Output P-channel Tr. OFF *VOUT=VSS *Output P-channel Tr. OFF *VOUT=VDD-40V Output P-channel Tr. OFF *Output P-channel Tr. OFF *VOUT=3V *Vp=-30V Output disable
IOFF(1) *S0/T0 to S6/T6 *S28 to S37 (without pull-down IOFF(2) resistor)
VDD[V] 4.5 to 6.0
min. -1
max.
unit A
4.5 to 6.0
-30
`L' level hold Tr. Rinpd of high voltage withstand input pull-down Rpd transistor resistor
S16 to S37
4.5 to 6.0
400
k
Hysteresis voltage Pin capacitance
VHIS
CP
*S7/T7 to S15/T15 *S16 to S27 (without pull-down resistor) *Port 1 *Ports 70,71,72,73 * RES All pins
5.0
60
100
200
k
4.5 to 6.0
0.1VDD
V
*f=1MHz *VIN=VSS for all unmeasured terminals. *Ta=25C
4.5 to 6.0
10
pF
4. Serial Input/Output Characteristics at Ta=+10C to +40C, VSS1=VSS2=0V
Parameter Cycle Low Level pulse width High Level pulse width Cycle Low Level pulse width High Level pulse width Data set-up time Input clock Symbol tCKCY(1) tCKL(1) tCKH(1) tCKCY(2) tCKL(2) tCKH(2) tICK *SI0,SI1 *SB0,SB1 SCK0,SCK1 *Use pull-up resistor (1k) in the open drain output. *Refer to figure 5 *Data set-up to SCK0,1 *Data hold from SCK0,1 *Refer to figure 5 *Use pull-up resistor (1k) in the open drain output. *Data hold from SCK0,1 *Refer to figure 5 4.5 to 6.0 Pins SCK0,SCK1 Conditions Refer to figure 5 Ratings typ. unit tCYC
VDD[V] 4.5 to 6.0
min. 2 1 1 2
max.
Serial clock
Output clock
1/2tCKCY 1/2tCKCY 4.5 to 6.0 0.1 s
Serial input
Data hold time Output delay time (External clock using for serial transfer clock) Output delay time (Internal clock using for serial transfer clock)
tCKI tCKO(1) *SO0,SO1 *SB0,SB1
0.1 4.5 to 6.0 7/12 tCYC
+0.2
Serial output
tCKO(2)
1/3 tCYC
+0.2
No.6746-15/22
LC86E6449 5. Pulse Input Conditions at Ta=+10C to +40C, VSS1=VSS2=0V
Parameter Symbol Pins Conditions *Interrupt acceptable *Timer0-countable *Interrupt acceptable *Timer0-countable *Interrupt acceptable *Timer0-countable *Interrupt acceptable *Timer0-countable Reset acceptable Ratings typ. max. unit tCYC
High/low level tPIH(1) *INT0, INT1 pulse width tPIL(1) *INT2/T0IN tPIH(2) INT3/T0IN tPIL(2) (The noise rejection clock selected to 1/1.) tPIH(3) INT3/T0IN tPIL(3) (The noise rejection clock selected to 1/16.) tPIH(4) INT3/T0IN tPIL(4) (The noise rejection clock selected to 1/64.) tPIL(5) RES
VDD[V] 4.5 to 6.0 4.5 to 6.0
min. 1 2
4.5 to 6.0
32
4.5 to 6.0
128 s
4.5 to 6.0
200
6. AD Converter Characteristics at Ta=+10C to + 40C, VSS1=VSS2=0V
Parameter Resolution Absolute precision (Note 2) Conversion time Symbol N ET tCAD AD conversion time = 16 x tCYC (ADCR2=0) (Note 3) AD conversion time = 32 x tCYC (ADCR2=1) (Note 3) AN0 to AN7 VAIN=VDD VAIN=VSS Pins Conditions Ratings typ. 8 unit bit LSB s
VDD[V] 4.5 to 6.0 4.5 to 6.0 4.5 to 6.0
min.
max. 1.5
15.68 (tCYC= 0.98s) 31.36 (tCYC= 0.98 s)
65.28 (tCYC= 4.08s) 130.56 (tCYC= 4.08s) VDD 1
Analog input voltage range Analog port input current
VAIN IAINH IAINL
4.5 to 6.0 4.5 to 6.0 4.5 to 6.0
VSS
V A
-1
(Note 2) Absolute precision excepts the quantizing error (1/2 LSB). (Note 3) The conversion time means the time from executing the AD conversion instruction to setting the complete digital conversion value to the register.
No.6746-16/22
LC86E6449 7. Current Dissipation Characteristics at Ta=+10C to +40C, VSS1=VSS2=0V
Parameter Current dissipation during basic operation (Note 4) Symbol IDDOP(1) Pins Conditions *FmCF=6MHz Ceramic resonator oscillation *FsXtal=32.768kHz crystal oscillation *System clock : CF oscillation *Internal RC oscillation stops *1/1 divided *FmCF=3MHz Ceramic resonator oscillation *FsXtal=32.768kHz crystal oscillation *System clock : CF oscillation *Internal RC oscillation stops *1/2 divided *FmCF=0Hz (The oscillation stops) *FsXtal=32.768kHz crystal oscillation *System clock : RC oscillation *1/2 divided *FmCF=0Hz (The oscillation stops) *FsXtal=32.768kHz crystal oscillation *System clock : 32.768kHz *Internal RC oscillation stops *1/2 divided Ratings typ. 14 unit mA
VDD[V] 4.5 to 6.0
min.
max. 33
IDDOP(2)
4.5 to 6.0
6
18
IDDOP(3)
4.5 to 6.0
4
13
IDDOP(4)
4.5 to 6.0
3
10
Continue.
No.6746-17/22
LC86E6449
Ratings typ. 5
Parameter
Symbol
Pins
Conditions *HALT mode *FmCF=6MHz Ceramic resonator oscillation *FsXtal=32.768kHz crystal oscillation *System clock : CF oscillation *Internal RC oscillation stops *1/1 divided *HALT mode *FmCF=3MHz Ceramic resonator oscillation *FsXtal=32.768kHz crystal oscillation *System clock : CF oscillation *Internal RC oscillation stops *1/2 divided *HALT mode FmCF=0Hz (The oscillation stops) *FsXtal=32.768kHz crystal oscillation *System clock : RC oscillation *1/2 divided *HALT mode FmCF=0Hz (The oscillation stops) *FsXtal=32.768kHz crystal oscillation *System clock : crystal oscillation *Internal RC oscillation stops *1/2 divided HOLD mode
Current dissipation IDDHALT(1) in HALT mode (Note 4)
VDD[V] 4.5 to 6.0
min.
max. 14
unit mA
IDDHALT(2)
4.5 to 6.0
2.2
7
IDDHALT(3)
4.5 to 6.0
400
1600
A
IDDHALT(4)
4.5 to 6.0
25
100
Current dissipation IDDHOLD(1) in HOLD mode (Note 4)
4.5 to 6.0
0.05
30
(Note 4) The currents of the output transistors and the pull-up MOS transistors are ignored.
No.6746-18/22
LC86E6449 Table 1. Ceramic resonator oscillation recommended constant (main-clock)
Oscillation type 6MHz ceramic resonator oscillation 3MHz ceramic resonator oscillation Maker Murata on chip Kyocera Murata on chip Kyocera Oscillator C1 C2
* Both C1 and C2 must be use K rank (10%) and SL characteristics.
Table 2. Crystal oscillation guaranteed constant (sub-clock)
Oscillation type 32.768kHz crystal oscillation Maker Oscillator C3 C4 Rd
* Both C3 and C4 must be use J rank (5%) and CH characteristics. (Not in need of high precision, use K rank (10%) and SL characteristics.)
(Notes)
* Please place the oscillation-related parts as close to the oscillation pins as possible with the shortest possible pattern length since the circuit pattern affects the oscillation frequency. * If you use other oscillators herein, we provide no guarantee for the characteristics.
CF1
CF2
XT1
XT2
Rd
CF C1 C2 C3
X'tal C4
Figure 1
Main-clock circuit Ceramic resonator oscillation
Figure 2
Sub-clock circuit Crystal oscillation
No.6746-19/22
LC86E6449
Power supply
Reset time
VDD VDD limit 0V
RES
Internal RC resonator oscillation CF1, CF2
tmsCF
tssXtal
XT1, XT2
Instruction execution mode OCR6=1
Operation mode
Unfixed
Reset
Instruction execution mode

HOLD release signal Internal RC resonator oscillation
Valid
tmsCF
CF1, CF2
tssXtal
XT1, XT2
Operation mode
HOLD
Instruction execution mode

Figure 3
Oscillation stable time
VDD RRES
RES CRES
(Note) Fix the value of CRES, RRES that is sure to reset until 200s, after Power supply has been over inferior limit of supply voltage.
Figure 4
Reset circuit
No.6746-20/22
LC86E6449
0.5VDD

tCKCY tCKL SCK0 SCK1 SI0 SI1 tCKO SO0, SO1 SB0, SB1 50pF tCKH
VDD
1k tICK tCKI

Figure 5
Serial input / output test condition
tPIL
tPIH
Figure 6
Pulse input timing condition
No.6746-21/22
LC86E6449 memo:
PS No.6746-22/22

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