| PART |
Description |
Maker |
| SMT10E-05S1V5J SMT10E SMT10E-05S1V2J SMT10E-05S1V8 |
3.0 Vin to 5.5 Vin Single output
|
Artesyn Technologies
|
| SIL15E-05S1V8-VJ SIL15E-05W3V3-VJ SIL15E SIL15E-05 |
3.0 Vin to 5.5 Vin Single output
|
ARTESYN[Artesyn Technologies]
|
| MIC69101 |
Single Supply VIN / LOW VIN / LOW VOUT / 1A LDO
|
MICREL
|
| MIC69301-1.2WR MIC69302WU MIC69303YML MIC69301-1.2 |
Single Supply VIN, Low VIN, Low VOUT, 3ALDO
|
Micrel Semiconductor
|
| HEDM-6505U05 HEDS-6510010 HEDM-6505T05 HEDM-6505T0 |
64LED 16 keys User Interface LED driver, I²C Interface; QSOP-24
2 A, Low VIN Dropout, Linear Regulator; 1.1V; 16-Lead LFCSP_VQ; -40°C to 125°C
2 A, Low VIN Dropout, Linear Regulator; 1.5V; 16-Lead LFCSP_VQ; -40°C to 125°C
2 A, Low VIN Dropout, Linear Regulator; 1.2V; 16-Lead LFCSP_VQ; -40°C to 125°C
2 A, Low VIN Dropout, Linear Regulator; 1.8V; 16-Lead LFCSP_VQ; -40°C to 125°C
2 A, Low VIN Dropout, Linear Regulator; 0.75 V; 16-Lead LFCSP_VQ; -40°C to 125°C
2 A, Low VIN Dropout, Linear Regulator; 2.5V; 16-Lead LFCSP_VQ; -40°C to 125°C
Large Diameter (56mm). Housed Two and Three Channel Optical Encoders 大口径（五六毫米）。外套二及中三通道光学编码
Miniature Cold Cathode Fluorescent Lamp, 3x86 大口径（五六毫米）。外套二及中三通道光学编码
2 A, Low Dropout, CMOS Linear Regulator;2 A, Low Dropout, CMOS Linear Regulator 大口径（五六毫米）。外套二及中三通道光学编码
Miniature Cold Cathode Fluorescent Lamp, 2.0x228
|
Agilent Technologies, Inc.
Avago Technologies, Ltd.
Atmel, Corp.
|
| LTM4608AMPV-PBF LTM4608AMPV LTM4608AIV-PBF LTM4608 |
Low VIN, 8A DC/DC μModule with Tracking, Margining, and Frequency Synchronization
Low VIN, 8A DC/DC 渭Module with Tracking, Margining, and Frequency Synchronization
Low VIN, 8A DC/DC 楼矛Module with Tracking, Margining, and Frequency Synchronization
|
Linear Technology
|
| IC62LV1024AL IC62LV1024ALL-45B IC62LV1024ALL-45BI |
70ns; 2.7-3.3V; 128K x 8 low-power and low Vcc CMOS static RAM
ASYNCHRONOUS STATIC RAM, Low Power A.SRAM
128K x 8 Ultra Low Power and Low VCC SRAM
From old datasheet system
55ns; 2.7-3.3V; 128K x 8 low-power and low Vcc CMOS static RAM
|
ICSI[Integrated Circuit Solution Inc]
|
| M38230G4-XXXFP M38230G4-XXXHP M38231G4-XXXHP M3823 |
18-Mbit (512K x 36/1M x 18) Flow-Through SRAM; Architecture: Standard Sync, Flow-through; Density: 18 Mb; Organization: 512Kb x 36; Vcc (V): 3.1 to 3.6 V
36-Mbit QDR(TM)-II SRAM 4-Word Burst Architecture; Architecture: QDR-II, 4 Word Burst; Density: 36 Mb; Organization: 2Mb x 18; Vcc (V): 1.7 to 1.9 V
36-Mbit DDR-II SRAM 2-Word Burst Architecture; Architecture: DDR-II CIO, 2 Word Burst; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 1.7 to 1.9 V
36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 2.4 to 2.6 V
72-Mbit (2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 3.1 to 3.6 V
18-Mbit (512K x 36/1M x 18) Pipelined SRAM; Architecture: Standard Sync, Pipeline SCD; Density: 18 Mb; Organization: 1Mb x 18; Vcc (V): 3.1 to 3.6 V
36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 3.1 to 3.6 V
72-Mbit QDR(TM)-II SRAM 2-Word Burst Architecture; Architecture: QDR-II, 2 Word Burst; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 1.7 to 1.9 V
18-Mbit (512K x 36/1M x 18) Flow-Through SRAM; Architecture: Standard Sync, Flow-through; Density: 18 Mb; Organization: 1Mb x 18; Vcc (V): 3.1 to 3.6 V
36-Mbit QDR(TM)-II SRAM 2-Word Burst Architecture; Architecture: QDR-II, 2 Word Burst; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 1.7 to 1.9 V
36-Mbit (1M x 36/2 M x 18/512K x 72) Flow-Through SRAM with NoBL(TM) Architecture; Architecture: NoBL, Flow-through; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 3.1 to 3.6 V
72-Mbit(2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 72 Mb; Organization: 1Mb x 72; Vcc (V): 2.4 to 2.6 V
72-Mbit QDR(TM)-II SRAM 2-Word Burst Architecture; Architecture: QDR-II, 2 Word Burst; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 1.7 to 1.9 V
36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined Sync SRAM; Architecture: Standard Sync, Pipeline SCD; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 3.1 to 3.6 V
36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 36 Mb; Organization: 2Mb x 18; Vcc (V): 3.1 to 3.6 V
36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 36 Mb; Organization: 512Kb x 72; Vcc (V): 3.1 to 3.6 V
72-Mbit DDR-II SRAM 2-Word Burst Architecture; Architecture: DDR-II CIO, 2 Word Burst; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 1.7 to 1.9 V
Sync SRAM; Architecture: QDR-II, 2 Word Burst; Density: 36 Mb; Organization: 2Mb x 18; Vcc (V): 1.7 to 1.9 V
36-Mbit DDR-II SRAM 2-Word Burst Architecture; Architecture: DDR-II CIO, 2 Word Burst; Density: 36 Mb; Organization: 2Mb x 18; Vcc (V): 1.7 to 1.9 V
72-Mbit(2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 2.4 to 2.6 V
72-Mbit(2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 2.4 to 2.6 V
72-Mbit QDR(TM)-II SRAM 4-Word Burst Architecture; Architecture: QDR-II, 4 Word Burst; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 1.7 to 1.9 V
72-Mbit (2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 72 Mb; Organization: 1Mb x 72; Vcc (V): 3.1 to 3.6 V
72-Mbit (2M x 36/4M x 18/1M x 72) Pipelined Sync SRAM; Architecture: Standard Sync, Pipeline SCD; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 2.4 to 2.6 V
72-Mbit QDR(TM)-II SRAM 4-Word Burst Architecture (2.5 Cycle Read Latency); Architecture: QDR-II , 4 Word Burst; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 1.7 to 1.9 V
72-Mbit DDR-II SRAM 2-Word Burst Architecture (2.0 Cycle Read Latency); Architecture: DDR-II CIO, 2 Word Burst; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 1.7 to 1.9 V
36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined Sync SRAM; Architecture: Standard Sync, Pipeline SCD; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 3.1 to 3.6 V 单芯位CMOS微机
72-Mbit DDR-II SRAM 2-Word Burst Architecture; Architecture: DDR-II CIO, 2 Word Burst; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 1.7 to 1.9 V 单芯位CMOS微机
18-Mbit (512K x 36/1M x 18) Flow-Through SRAM; Architecture: Standard Sync, Flow-through; Density: 18 Mb; Organization: 1Mb x 18; Vcc (V): 3.1 to 3.6 V 单芯位CMOS微机
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER 单芯位CMOS微机
72-Mbit(2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 2.4 to 2.6 V 单芯位CMOS微机
72-Mbit(2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 2.4 to 2.6 V 单芯位CMOS微机
72-Mbit QDR(TM)-II SRAM 4-Word Burst Architecture; Architecture: QDR-II, 4 Word Burst; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 1.7 to 1.9 V 单芯位CMOS微机
72-Mbit QDR(TM)-II SRAM 2-Word Burst Architecture; Architecture: QDR-II, 2 Word Burst; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 1.7 to 1.9 V 单芯位CMOS微机
36-Mbit QDR(TM)-II SRAM 4-Word Burst Architecture; Architecture: QDR-II, 4 Word Burst; Density: 36 Mb; Organization: 2Mb x 18; Vcc (V): 1.7 to 1.9 V 单芯位CMOS微机
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER 单芯8位CMOS微机
Sync SRAM; Architecture: QDR-II, 2 Word Burst; Density: 36 Mb; Organization: 2Mb x 18; Vcc (V): 1.7 to 1.9 V 单芯位CMOS微机
36-Mbit DDR-II SRAM 2-Word Burst Architecture; Architecture: DDR-II CIO, 2 Word Burst; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 1.7 to 1.9 V 单芯位CMOS微机
72-Mbit DDR-II SRAM 2-Word Burst Architecture; Architecture: DDR-II CIO, 2 Word Burst; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 1.7 to 1.9 V
36-Mbit QDR(TM)-II SRAM 2-Word Burst Architecture; Architecture: QDR-II, 2 Word Burst; Density: 36 Mb; Organization: 2Mb x 18; Vcc (V): 1.7 to 1.9 V
|
Renesas Electronics Corporation.
Renesas Electronics, Corp.
|
| MIC2561 MIC2561-0BM MIC2561-1BM |
PCMCIA Card Socket VCC & VPP Switching Matrix
PCMCIA Card Socket VCC & VPP Switching Matrix 1-CHANNEL POWER SUPPLY SUPPORT CKT, PDSO14
|
MICREL[Micrel Semiconductor]
Micrel Semiconductor,Inc.
Micrel Semiconductor, Inc.
|
| CY14B104LA-ZS25XIT CY14B104NA-BA20XI CY14B104NA-BA |
4 Mbit (512K x 8/256K x 16) nvSRAM; Organization: 512Kb x 8; Vcc (V): 2.7 to 3.6 V; Density: 4 Mb; Package: TSOP 512K X 8 NON-VOLATILE SRAM, 25 ns, PDSO44
4 Mbit (512K x 8/256K x 16) nvSRAM; Organization: 256Kb x 16; Vcc (V): 2.7 to 3.6 V; Density: 4 Mb; Package: FBGA
|
Cypress Semiconductor, Corp.
CYPRESS SEMICONDUCTOR CORP
|
| 5962-05238 5962-05240 5962-05241 5962-05242 5962-0 |
30W Total Output Power 28 Vin 1.5 Vout Single DC-DC Radiation Hardened Converter in a LS Package. DLA Number 5962-05238
30W Total Output Power 28 Vin 5 Vout Single DC-DC Radiation Hardened Converter in a LS Package. DLA Number 5962-05240
30W Total Output Power 28 Vin /-12 Vout Dual DC-DC Radiation Hardened Converter in a LS Package. DLA Number 5962-05241
30W Total Output Power 28 Vin /-15 Vout Dual DC-DC Radiation Hardened Converter in a LS Package. DLA Number 5962-05242
30W Total Output Power 28 Vin 12 Vout Single DC-DC Radiation Hardened Converter in a LS Package. DLA Number 5962-06241
30W Total Output Power 28 Vin 2.5 Vout Single DC-DC Radiation Hardened Converter in a LS Package.
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International Rectifier
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