| PART |
Description |
Maker |
| M13S128324A-2M |
Double-data-rate architecture, two data transfers per clock cycle
|
Elite Semiconductor Mem...
|
| M13S5121632A-2S |
Double-data-rate architecture, two data transfers per clock cycle
|
Elite Semiconductor Mem...
|
| M14D5121632A-2K |
Internal pipelined double-data-rate architecture; two data access per clock cycle
|
Elite Semiconductor Mem...
|
| W972GG6JB W972GG6JB-25 |
16M ?8 BANKS ?16 BIT DDR2 SDRAM
Double Data Rate architecture: two data transfers per clock cycle
|
Winbond
|
| DDR110-56T7RL DDR110-XXT7RL DDR110-27T7RL |
10-LINE 56 ohm OTHER TERMINATOR, PDSO24
DOUBLE DATA RATE TERMINATION NETWORK WITH DISABLE SWITCH 双倍数据速率终端网络具有禁用开
DOUBLE DATA RATE TERMINATION NETWORK WITH DISABLE SWITCH
|
STMicroelectronics N.V.
STMICROELECTRONICS[STMicroelectronics]
ST Microelectronics
|
| HYI18T1G400BF-2.5 HYI18T1G400BF-2.5F HYI18T1G800BC |
1-Gbit Double-Data-Rate-Two SDRAM 256M X 4 DDR DRAM, 0.5 ns, PBGA68
1-Gbit Double-Data-Rate-Two SDRAM 256M X 4 DDR DRAM, 0.6 ns, PBGA68
1-Gbit Double-Data-Rate-Two SDRAM 256M X 4 DDR DRAM, 0.45 ns, PBGA68
1-Gbit Double-Data-Rate-Two SDRAM 64M X 16 DDR DRAM, 0.5 ns, PBGA84
1-Gbit Double-Data-Rate-Two SDRAM
|
Qimonda AG
http://
|
| K4D263238M K4D263238M-QC45 K4D263238M-QC50 K4D2632 |
1M x 32Bit x 4 Banks Double Data Rate Synchronous RAM with Bi-directional Data Strobe and DLL
|
Samsung Electronic
SAMSUNG[Samsung semiconductor]
|
| MT46V64M16 MT46V128M8 MT46V256M4 |
DOUBLE DATA RATE (DDR) SDRAM
|
MICRON[Micron Technology]
|
| HYB25D512160BE-6 HYB25D512800BE-5 HYB25D512160BC-5 |
512Mbit Double Data Rate SDRAM
|
INFINEON[Infineon Technologies AG]
|
| MT46V32M8 MT46V16M16 MT46V64M4 MT46V32M8TG-6T MT46 |
DOUBLE DATA RATE DDR SDRAM
|
Micron Technology, Inc.
MICRON[Micron Technology]
|
