| PART |
Description |
Maker |
| HI-8787 HI-8787PQI HI-8787PQT HI-8788 HI-8788PQI H |
16 Bit Parallel data converted to 429 and 561 serial data out
ARINC INTERFACE DEVICE 16-BIT PARALLEL DATA CONVERTED 429&561 SERIAL DATA OUT
512 MACROCELL 3.3 VOLT ZERO POWER ISP CP - NOT RECOMMENDED for NEW DESIGN
|
HOLTIC[Holt Integrated Circuits]
|
| R2705E |
27.195MHz FSK Radio Data Receiver for Manchester Data Format
|
List of Unclassifed Manufacturers
|
| M13S5121632A-2S |
Double-data-rate architecture, two data transfers per clock cycle
|
Elite Semiconductor Mem...
|
| M14D2561616A-2E |
Internal pipelined double-data-rate architecture; two data access per clock cycle
|
Elite Semiconductor Mem...
|
| K4D263238M K4D263238M-QC45 K4D263238M-QC50 K4D2632 |
1M x 32Bit x 4 Banks Double Data Rate Synchronous RAM with Bi-directional Data Strobe and DLL
|
Samsung Electronic
SAMSUNG[Samsung semiconductor]
|
| NT5DS4M32EG-5 NT5DS4M32EG-5G NT5DS4M32EG-6 |
1M × 32 Bits × 4 Banks Double Data Rate Synchronous RAM With Bi-Directional Data Strobe and DLL
|
NanoAmp Solutions, Inc.
|
| S1A0905X01 |
RDS (RADIO DATA SYSTEM) DEMODULATOR IC Data Sheet
|
Samsung Electronic
|
| MC68HC908JB12 MC68HC908JB12DW MC68HC908JB12JDW MC6 |
Addendum to MC68HC908JB16 Technical Data
This section updates data sheet information and introduces the 20-pin SOIC
|
FREESCALE[Freescale Semiconductor, Inc]
|
| W972GG6JB W972GG6JB-25 |
16M ?8 BANKS ?16 BIT DDR2 SDRAM
Double Data Rate architecture: two data transfers per clock cycle
|
Winbond
|
| RC288DPL RCV288DPL RC288DPI RC288DPI-D RC288DPL-D |
V.34 Data/V.17 Fax/Voice Modem Data Pumps
|
N.A.
ETC[ETC]
|
| ST7FDALIF2B6 |
8-BIT MCU WITH SINGLE VOLTAGE FLASH MEMORY, DATA EEPROM, ADC, TIMERS, SPI, DALI (DATA BRIEFING)
|
SGS Thomson Microelectronics
|
