| PART |
Description |
Maker |
| HCPL-6250 HCPL-625K HCPL-625X 5962-8876801PA 5962- |
Hermetically Sealed. Low If. Wide Vcc. Logic Gate Optocouplers 密封。如果低。宽的VCC。逻辑门光电耦合
HCPL-523K-300 · Hermetically Sealed, Low If, Wide Vcc, Logic Gate Optocouplers
HCPL-523K-100 · Hermetically Sealed, Low If, Wide Vcc, Logic Gate Optocouplers
5962-8876904KXA · Hermetically Sealed, Low If, Wide Vcc, Logic Gate Optocouplers
HCPL-520K-100 · Hermetically Sealed, Low If, Wide Vcc, Logic Gate Optocouplers
HCPL-520K-300 · Hermetically Sealed, Low If, Wide Vcc, Logic Gate Optocouplers
5962-8876802KPC · Hermetically Sealed, Low If, Wide Vcc, Logic Gate Optocouplers
5962-8876802KXA · Hermetically Sealed, Low If, Wide Vcc, Logic Gate Optocouplers
5962-8876801PC · Hermetically Sealed, Low If, Wide Vcc, Logic Gate Optocouplers
5962-8876802KPA · Hermetically Sealed, Low If, Wide Vcc, Logic Gate Optocouplers
5962-8876901PA · Hermetically Sealed, Low If, Wide Vcc, Logic Gate Optocouplers
5962-8876801PA · Hermetically Sealed, Low If, Wide Vcc, Logic Gate Optocouplers
5962-8876801XA · Hermetically Sealed, Low If, Wide Vcc, Logic Gate Optocouplers
5962-8876801YA · Hermetically Sealed, Low If, Wide Vcc, Logic Gate Optocouplers
5962-8876801YC · Hermetically Sealed, Low If, Wide Vcc, Logic Gate Optocouplers
5962-8876802KYA · Hermetically Sealed, Low If, Wide Vcc, Logic Gate Optocouplers
5962-8876802KYC · Hermetically Sealed, Low If, Wide Vcc, Logic Gate Optocouplers
5962-8876901PC · Hermetically Sealed, Low If, Wide Vcc, Logic Gate Optocouplers
5962-8876901XA · Hermetically Sealed, Low If, Wide Vcc, Logic Gate Optocouplers
5962-8876901YA · Hermetically Sealed, Low If, Wide Vcc, Logic Gate Optocouplers
5962-8876901YC · Hermetically Sealed, Low If, Wide Vcc, Logic Gate Optocouplers
5962-88769022A · Hermetically Sealed, Low If, Wide Vcc, Logic Gate Optocouplers
5962-8876903FC · Hermetically Sealed, Low If, Wide Vcc, Logic Gate Optocouplers
5962-8876904KPA · Hermetically Sealed, Low If, Wide Vcc, Logic Gate Optocouplers
5962-8876904KPC · Hermetically Sealed, Low If, Wide Vcc, Logic Gate Optocouplers
5962-8876904KYA · Hermetically Sealed, Low If, Wide Vcc, Logic Gate Optocouplers
5962-8876904KYC · Hermetically Sealed, Low If, Wide Vcc, Logic Gate Optocouplers
5962-8876905K2A · Hermetically Sealed, Low If, Wide Vcc, Logic Gate Optocouplers
5962-8876906KFC · Hermetically Sealed, Low If, Wide Vcc, Logic Gate Optocouplers
|
Avago Technologies, Ltd.
HP[Agilent(Hewlett-Packard)]
Agilent (Hewlett-Packard)
|
| AT17N002 AT17N010 AT17N040 AT17N256 AT17N512 AT17N |
COVER 256K X 1 CONFIGURATION MEMORY, PDSO20
FPGA Configuration Memory 256K X 1 CONFIGURATION MEMORY, PDSO20
CAT5 SHLD, PVC PATCH CBL STRGHT PIN, 100 MHZ-GREEN 1M X 1 CONFIGURATION MEMORY, PDIP8
GIGATRUE 550 CAT6 PATCH 100 FT, NON BOOT, ORANGE
GIGATRUE 550 CAT6 PATCH 25 FT, NON BOOT, ORANGE
GIGATRUE 550 CAT6 PATCH 50 FT, NON BOOT, ORANGE
GIGATRUE 550 CAT6 PATCH 15 FT, NON BOOT, ORANGE
GIGATRUE 550 CAT6 PATCH 10 FT, NON BOOT, ORANGE
GIGATRUE 550 CAT6 PATCH 30 FT, NON BOOT, ORANGE
GIGATRUE 550 CAT6 PATCH 20 FT, NON BOOT, ORANGE
AT17N/256/512/010/002/040 [Updated 5/03. 18 Pages]
512K-bit FPGA Configuration EEPROM 3.3V
256K-bit FPGA Configuration EEPROM 3.3V
4M-bit FPGA Configuration EEPROM 3.3V
1M-bit FPGA Configuration EEPROM 3.3V
2M-bit FPGA Configuration EEPROM 3.3V
|
Atmel, Corp.
聚兴科技股份有限公司
Atmel Corp.
|
| APL5546-AKAI-TRL |
Dual Channel 500mA/500mA Regulator Reset IC
|
Anpec Electronics Coropration
|
| RT9167 RT9167-33CB RT9176_A-15CB RT9176_A-15CBR RT |
1.8V low-noise, fixed output voltage 200mA/500mA LDO regulator
1.7V low-noise, fixed output voltage 200mA/500mA LDO regulator
1.6V low-noise, fixed output voltage 200mA/500mA LDO regulator
1.5V low-noise, fixed output voltage 200mA/500mA LDO regulator
PREMIUM RS232 DATA CBL DB25 MALE - DB25 FEMALE
PREMIUM RS232 DATA CBL DB25 MALE - DB25 MALE
CONNECTOR ACCESSORY
D52 - BACKSHELL NON-ENVIRON EMI-RFI STRT
PREMIUM RS232 DATA CBL DB25 FEMALE - DB25 FEMALE
LOW NOISE FIXED OUTPUT VOLTAGE 200MA/500MA LDO REGULATOR 低噪声固定输出电00MA/500MA LDO稳压
EDQ MOLDED 25C 20FT MF 低噪声固定输出电00MA/500MA LDO稳压
IC ENCODER TRANSMITTER RF 8DIP 低噪声固定输出电00MA/500MA LDO稳压
TRANSFORMER 0.50MH 1:1.3 PULSE 低噪声固定输出电00MA/500MA LDO稳压
INDUCTOR, 470UHINDUCTOR, 470UH; Inductance:470uH; Inductor type:Inductor; Current, DC max:0.64A; Resistance:0.16R; Case style:D; Diameter, PCB hole:0.64mm; Flammability rating:UL94V-0 低噪声固定输出电00MA/500MA LDO稳压
Connector assemblies 低噪声固定输出电00MA/500MA LDO稳压
|
RichTek
ETC
Electronic Theatre Controls, Inc.
|
| MAX6456UT MAX6453UT MAX645310 MAX6454UT MAX6455UT |
uP Supervisors with Separate VCC Reset and Manual Reset Outputs
µP Supervisors with Separate VCC Reset and Manual Reset Outputs 1-CHANNEL POWER SUPPLY SUPPORT CKT, PDSO6
|
ON Semiconductor
Maxim Integrated Products, Inc.
MAXIM INTEGRATED PRODUCTS INC
Maxim Integrated Produc...
|
| MC78M12ABT MC78M09BDT MC78M09BDTRK MC78M05BDTRK MC |
500mA, 12V, Positive Voltage Regulator
500mA, 9V, Positive Voltage Regulator
500mA, 5V, Positive Voltage Regulator
500mA, 18V, Positive Voltage Regulator
500mA, 8V, Positive Voltage Regulator
500mA, 15V, Positive Voltage Regulator
500mA, 6V, Positive Voltage Regulator
|
ON Semiconductor
|
| SB05-03Q |
Schottky Barrier Diode 30V, 500mA Rectifier
30V 500mA Rectifier
30V/ 500mA Rectifier
|
Sanyo Semiconductor
SANYO[Sanyo Semicon Device]
Sanyo Electric Co.,Ltd.
|
| M38230G4-XXXFP M38230G4-XXXHP M38231G4-XXXHP M3823 |
18-Mbit (512K x 36/1M x 18) Flow-Through SRAM; Architecture: Standard Sync, Flow-through; Density: 18 Mb; Organization: 512Kb x 36; Vcc (V): 3.1 to 3.6 V
36-Mbit QDR(TM)-II SRAM 4-Word Burst Architecture; Architecture: QDR-II, 4 Word Burst; Density: 36 Mb; Organization: 2Mb x 18; Vcc (V): 1.7 to 1.9 V
36-Mbit DDR-II SRAM 2-Word Burst Architecture; Architecture: DDR-II CIO, 2 Word Burst; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 1.7 to 1.9 V
36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 2.4 to 2.6 V
72-Mbit (2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 3.1 to 3.6 V
18-Mbit (512K x 36/1M x 18) Pipelined SRAM; Architecture: Standard Sync, Pipeline SCD; Density: 18 Mb; Organization: 1Mb x 18; Vcc (V): 3.1 to 3.6 V
36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 3.1 to 3.6 V
72-Mbit QDR(TM)-II SRAM 2-Word Burst Architecture; Architecture: QDR-II, 2 Word Burst; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 1.7 to 1.9 V
18-Mbit (512K x 36/1M x 18) Flow-Through SRAM; Architecture: Standard Sync, Flow-through; Density: 18 Mb; Organization: 1Mb x 18; Vcc (V): 3.1 to 3.6 V
36-Mbit QDR(TM)-II SRAM 2-Word Burst Architecture; Architecture: QDR-II, 2 Word Burst; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 1.7 to 1.9 V
36-Mbit (1M x 36/2 M x 18/512K x 72) Flow-Through SRAM with NoBL(TM) Architecture; Architecture: NoBL, Flow-through; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 3.1 to 3.6 V
72-Mbit(2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 72 Mb; Organization: 1Mb x 72; Vcc (V): 2.4 to 2.6 V
72-Mbit QDR(TM)-II SRAM 2-Word Burst Architecture; Architecture: QDR-II, 2 Word Burst; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 1.7 to 1.9 V
36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined Sync SRAM; Architecture: Standard Sync, Pipeline SCD; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 3.1 to 3.6 V
36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 36 Mb; Organization: 2Mb x 18; Vcc (V): 3.1 to 3.6 V
36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 36 Mb; Organization: 512Kb x 72; Vcc (V): 3.1 to 3.6 V
72-Mbit DDR-II SRAM 2-Word Burst Architecture; Architecture: DDR-II CIO, 2 Word Burst; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 1.7 to 1.9 V
Sync SRAM; Architecture: QDR-II, 2 Word Burst; Density: 36 Mb; Organization: 2Mb x 18; Vcc (V): 1.7 to 1.9 V
36-Mbit DDR-II SRAM 2-Word Burst Architecture; Architecture: DDR-II CIO, 2 Word Burst; Density: 36 Mb; Organization: 2Mb x 18; Vcc (V): 1.7 to 1.9 V
72-Mbit(2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 2.4 to 2.6 V
72-Mbit(2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 2.4 to 2.6 V
72-Mbit QDR(TM)-II SRAM 4-Word Burst Architecture; Architecture: QDR-II, 4 Word Burst; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 1.7 to 1.9 V
72-Mbit (2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 72 Mb; Organization: 1Mb x 72; Vcc (V): 3.1 to 3.6 V
72-Mbit (2M x 36/4M x 18/1M x 72) Pipelined Sync SRAM; Architecture: Standard Sync, Pipeline SCD; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 2.4 to 2.6 V
72-Mbit QDR(TM)-II SRAM 4-Word Burst Architecture (2.5 Cycle Read Latency); Architecture: QDR-II , 4 Word Burst; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 1.7 to 1.9 V
72-Mbit DDR-II SRAM 2-Word Burst Architecture (2.0 Cycle Read Latency); Architecture: DDR-II CIO, 2 Word Burst; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 1.7 to 1.9 V
36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined Sync SRAM; Architecture: Standard Sync, Pipeline SCD; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 3.1 to 3.6 V 单芯位CMOS微机
72-Mbit DDR-II SRAM 2-Word Burst Architecture; Architecture: DDR-II CIO, 2 Word Burst; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 1.7 to 1.9 V 单芯位CMOS微机
18-Mbit (512K x 36/1M x 18) Flow-Through SRAM; Architecture: Standard Sync, Flow-through; Density: 18 Mb; Organization: 1Mb x 18; Vcc (V): 3.1 to 3.6 V 单芯位CMOS微机
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER 单芯位CMOS微机
72-Mbit(2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 2.4 to 2.6 V 单芯位CMOS微机
72-Mbit(2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 2.4 to 2.6 V 单芯位CMOS微机
72-Mbit QDR(TM)-II SRAM 4-Word Burst Architecture; Architecture: QDR-II, 4 Word Burst; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 1.7 to 1.9 V 单芯位CMOS微机
72-Mbit QDR(TM)-II SRAM 2-Word Burst Architecture; Architecture: QDR-II, 2 Word Burst; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 1.7 to 1.9 V 单芯位CMOS微机
36-Mbit QDR(TM)-II SRAM 4-Word Burst Architecture; Architecture: QDR-II, 4 Word Burst; Density: 36 Mb; Organization: 2Mb x 18; Vcc (V): 1.7 to 1.9 V 单芯位CMOS微机
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER 单芯8位CMOS微机
Sync SRAM; Architecture: QDR-II, 2 Word Burst; Density: 36 Mb; Organization: 2Mb x 18; Vcc (V): 1.7 to 1.9 V 单芯位CMOS微机
36-Mbit DDR-II SRAM 2-Word Burst Architecture; Architecture: DDR-II CIO, 2 Word Burst; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 1.7 to 1.9 V 单芯位CMOS微机
72-Mbit DDR-II SRAM 2-Word Burst Architecture; Architecture: DDR-II CIO, 2 Word Burst; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 1.7 to 1.9 V
36-Mbit QDR(TM)-II SRAM 2-Word Burst Architecture; Architecture: QDR-II, 2 Word Burst; Density: 36 Mb; Organization: 2Mb x 18; Vcc (V): 1.7 to 1.9 V
|
Renesas Electronics Corporation.
Renesas Electronics, Corp.
|
|
