| PART |
Description |
Maker |
| QL2005 QL2005-1PQ208I QL2005-1PQ208C |
3.3V and 5.0V pASIC 2 FPGA combining speed, density, low cost and flexibility.
3.3V and 5.0V pASIC 2 FPGA Combining Speed, Density, Low Cost and Flexibility(高速，高可用密度，低成本、可适应性强.3V.0V pASIC 2系列场可编程逻辑器件)
3.3V and 5.0V pASICò 2 FPGA
3.3V and 5.0V pASIC 2 FPGA Combining Speed, Density, Low Cost and Flexibility(楂??锛?????瀵?害锛????????????у己??.3V??.0V pASIC 2绯诲??哄?缂???昏??ㄤ欢)
|
QuickLogic Corp.
|
| QL7120 QL7120_DS |
Combining Performance, Density, and Embedded RAM
From old datasheet system
|
quicklogic
|
| QL6600 QL6600_DS |
Combining Performance, Density, and Embedded RAM
From old datasheet system
|
quicklogic
|
| QL3040-4PB456C QL3040-3PQ208I QL3040-2PB456I QL304 |
40,000 usable PLD gate pASIC 3 FPGA combining high performance and high density.
40000 usable PLD gate pASIC 3 FPGA combining High performance and high density FPGA, 1008 CLBS, 40000 GATES, 225 MHz, PBGA456
40000 usable PLD gate pASIC 3 FPGA combining High performance and high density FPGA, 1008 CLBS, 40000 GATES, 225 MHz, PQFP208
|
QuickLogic, Corp.
QuickLogic Corp.
|
| QL6325E QL6325E_DS |
FPGA Combining Performance, Density, and Embedded RAM
From old datasheet system
|
quicklogic
|
| QL4009-1PL68C QL4009-1PL68I |
9,000 usable PLD gate QuickRAM ESP combining performance, density and embedded RAM.
|
QuickLogic
|
| QL3060 |
PLD Gate pASIC 3 FPGA Combining High Performance and High Density
|
QuickLogic Corporation
|
| A440212 |
The A4402 is a dual-output regulator, combining in a single package a constant on-time buck regulator and a linear regulator (LDO)―each with adjustable output voltages.
|
Allegro MicroSystems
|
| TC1028 |
The TC1028 is a mixed-function device combining two comparators and a voltage reference in a single 8-pin package. The inverting input of comparator A and the non-inverting input of comparator B are internally connected to the reference. T
|
Microchip
|
| ATSAM9713 |
Low Cost Integrated Synthesis with Effects
ATSAM9713 [Updated 11/02. 14 Pages] The ATSAM9713 features highly integrated architecture combining a specialized high performance RISC digital signal processor and a general-purpose 16-bit CISC control processor on a single chip.
|
Atmel
|
| AS2051F-06 AS1001F-04 AS1001F-06 AS3001F-08 AS3001 |
SPEED CONTROLLER 6MM
SPEED CONTROLLER 4MM
SPEED CONTROLLER 8MM
SPEED CONTROLLER 12MM
SPEED CONTROLLER 10MM 调速器10毫米
|
ETC
|
