| PART |
Description |
Maker |
| PD46364185BF1-E40-EQ1 PD46364365BF1-E40-EQ1 PD4636 |
36M-BIT DDR II SRAM SEPARATE I/O 2-WORD BURST OPERATION
|
Renesas Electronics Corporation
|
| UPD44324092BF5-E33-FQ1 UPD44324182BF5-E33-FQ1 PD44 |
4M X 9 DDR SRAM, 0.45 ns, PBGA165
2M X 18 DDR SRAM, 0.45 ns, PBGA165
36M-BIT DDR II SRAM 2-WORD BURST OPERATION
|
Renesas Electronics Corporation
|
| UPD44325084 UPD44325084F5-E50-EQ2 UPD44325094F5-E5 |
CABLE ASSEMBLY; LEAD-FREE SOLDER; SMA MALE TO SMA MALE; 50 OHM, RG142B/U COAX, DOUBLE SHIELDED
36M-BIT QDRII SRAM 4-WORD BURST OPERATION 36M条位推出QDRII SRAM4个字爆发运作
36M-BIT QDRII SRAM 4-WORD BURST OPERATION 36M条位推出QDRII SRAM个字爆发运作
4M X 8 QDR SRAM, 0.45 ns, PBGA165 13 X 15 MM, PLASTIC, FBGA-165
|
NEC Corp.
NEC, Corp.
|
| UPD44325362F5-E50-EQ2 UPD44325082 UPD44325082F5-E4 |
36M-BIT QDRII SRAM 2-WORD BURST OPERATION
|
NEC[NEC]
|
| GS8180S18 |
1Mb x 18Bit Separate I/O Sigma DDR SRAM(1M x 18位独立I/O接口双数据速率读和写模式静态ΣRAM) 1x 18位独立的I / O西格玛的DDR SRAM的（100万18位独立的I / O接口双数据速率读和写模式静态ΣRAM
|
GSI Technology, Inc.
|
| CY7C1319BV18-167BZC CY7C1319BV18-278BZC CY7C1321BV |
2M X 8 DDR SRAM, 0.45 ns, PBGA165
512K X 36 DDR SRAM, 0.45 ns, PBGA165
18-Mbit DDR-II SRAM 4-Word Burst Architecture
|
CYPRESS SEMICONDUCTOR CORP
|
| CY7C1529JV18-250BZXC CY7C1529JV18-250BZXI CY7C1529 |
8M X 9 DDR SRAM, 0.45 ns, PBGA165
72-Mbit DDR-II SIO SRAM 2-Word Burst Architecture
|
CYPRESS SEMICONDUCTOR CORP
|
| CY7C1568KV18-550BZXC |
72-Mbit DDR-II SRAM 2-Word Burst Architecture (2.5 Cycle Read Latency); Architecture: DDR-II CIO, 2 Word Burst; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 1.7 to 1.9 V 4M X 18 DDR SRAM, 0.45 ns, PBGA165
|
Cypress Semiconductor, Corp.
|
| GS8182S18GD-167I |
18Mb Burst of 2 DDR SigmaSIO-II SRAM 1M X 18 DDR SRAM, 0.5 ns, PBGA165
|
GSI Technology, Inc.
|
| BS62LV8005 BS62LV8005BC BS62LV8005BI BS62LV8005EC |
DDR-II, 25-Bit 1:1 or 14-Bit 1:2 Configurable Registered Buffer
Very Low Power/Voltage CMOS SRAM 1M X 8 bit
|
BRILLIANCE SEMICONDUCTOR, INC.
BSI[Brilliance Semiconductor]
|
| CY7C192-15VXC |
64K x 4 Static RAM with Separate IO; Density: 256 Kb; Organization: 64Kb x 4; Vcc (V): 4.5 to 5.5 V; 64K X 4 STANDARD SRAM, 15 ns, PDSO28
64 K × 4 Static RAM with Separate IO CMOS for optimum speed/power
|
Cypress Semiconductor, Corp.
|
| CY7C1423JV18-250BZXC |
36-Mbit DDR-II SIO SRAM 2-Word Burst Architecture; Architecture: DDR-II SIO, 2 Word Burst; Density: 36 Mb; Organization: 2Mb x 18; Vcc (V): 1.7 to 1.9 V 2M X 18 DDR SRAM, 0.45 ns, PBGA165
|
Cypress Semiconductor, Corp.
|
