| PART |
Description |
Maker |
| UPD44164082F5-E50-EQ1 UPD44164362F5-E50-EQ1 UPD441 |
18M-BIT DDRII SRAM 2-WORD BURST OPERATION 1800万位的SRAM 2条DDRII字爆发运
2M X 8 DDR SRAM, 0.45 ns, PBGA165
|
NEC, Corp.
|
| PD46184184BF1-E40-EQ1 PD46185084BF1-E40-EQ1 PD4618 |
18M-BIT DDR II SRAM 4-WORD BURST OPERATION
18M-BIT QDRTM II SRAM 4-WORD BURST OPERATION
|
Renesas Electronics Corporation
|
| PD44324185BF5-E33-FQ1-A PD44324185BF5-E40-FQ1-A PD |
36M-BIT DDR II SRAM SEPARATE I/O 2-WORD BURST OPERATION
|
Renesas Electronics Corporation
|
| UPD44164364F5-E60-EQ1 UPD44164084 UPD44164084F5-E4 |
18M-BIT DDRII SRAM 4-WORD BURST OPERATION
|
NEC[NEC]
|
| UPD44165082F5-E60-EQ1 UPD44165182F5-E60-EQ1 UPD441 |
18M-BIT QDRII SRAM 2-WORD BURST OPERATION 1800万位推出QDRII SRAM字爆发运
|
NEC Corp.
NEC, Corp.
|
| UPD44165362F5-E75-EQ1 UPD44165082 UPD44165082F5-E5 |
(UPD44165082/182/362) 18M-BIT QDRII SRAM 2-WORD BURST OPERATION
|
NEC[NEC]
|
| UPD44324085F5-E50-EQ2 UPD44324365F5-E50-EQ2 UPD443 |
36M-BIT DDRII SRAM SEPARATE I/O 2-WORD BURST OPERATION
|
NEC[NEC]
|
| CY7C1423AV18-250BZC |
36-Mbit DDR-II SIO SRAM 2-Word Burst Architecture 2M X 18 DDR SRAM, 0.45 ns, PBGA165
|
Analog Integrations, Corp.
|
| MC74HC367A MC74HC367AD MC74HC367ADT MC74HC367AN ON |
Telecomm/Datacomm HC/UH SERIES, 6-BIT DRIVER, TRUE OUTPUT, PDSO16
From old datasheet system
Hex 3-State Noninverting Buffer with Separate 2-Bit and 4-Bit Sections
Hex 3-State NonInverting Buffer with Separate 2-Bit and 4-Bit Section High-Performance Silicon-Gate CMOS
|
Motorola Mobility Holdings, Inc.
ONSEMI[ON Semiconductor]
|
| GS8182S18GD-167I |
18Mb Burst of 2 DDR SigmaSIO-II SRAM 1M X 18 DDR SRAM, 0.5 ns, PBGA165
|
GSI Technology, Inc.
|
| CY7C1423JV18-250BZXC |
36-Mbit DDR-II SIO SRAM 2-Word Burst Architecture; Architecture: DDR-II SIO, 2 Word Burst; Density: 36 Mb; Organization: 2Mb x 18; Vcc (V): 1.7 to 1.9 V 2M X 18 DDR SRAM, 0.45 ns, PBGA165
|
Cypress Semiconductor, Corp.
|
