| PART |
Description |
Maker |
| CY7C1418AV18-267BZC |
36-Mbit DDR-II SRAM 2-Word Burst Architecture; Architecture: DDR-II CIO, 2 Word Burst; Density: 36 Mb; Organization: 2Mb x 18; Vcc (V): 1.7 to 1.9 V
|
CYPRESS SEMICONDUCTOR CORP
|
| PRESENTATION |
Presentation - AMDNext Generation Microprocessor Architecture
AMDs Next Generation Microprocessor Architecture
|
Advanced Micro Devices
|
| CY7C1514KV18 CY7C1514KV18-300BZXC CY7C1512KV18-300 |
72-Mbit QDR II SRAM 2-Word Burst Architecture Two-word burst on all accesses
72-Mbit QDR(TM)-II SRAM 2-Word Burst Architecture; Architecture: QDR-II, 2 Word Burst; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 1.7 to 1.9 V 2M X 36 QDR SRAM, 0.45 ns, PBGA165
72-Mbit QDR(TM)-II SRAM 2-Word Burst Architecture; Architecture: QDR-II, 2 Word Burst; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 1.7 to 1.9 V 4M X 18 QDR SRAM, 0.45 ns, PBGA165
|
Cypress Semiconductor, Corp.
|
| CY7C1302DV25-167BZC CY7C1302DV25-167BZI CY7C1302DV |
9-Mbit Burst of Two Pipelined SRAMs with QDR Architecture
9-Mbit Burst of Two Pipelined SRAMs with QDR垄芒 Architecture
9-Mbit Burst of Two Pipelined SRAMs with QDR⑩ Architecture
|
Cypress Semiconductor
|
| CY7C1518JV18-250BZC CY7C1518JV18-300BZXC |
72-Mbit DDR-II SRAM 2-Word Burst Architecture; Architecture: DDR-II CIO, 2 Word Burst; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 1.7 to 1.9 V 4M X 18 DDR SRAM, 0.45 ns, PBGA165
|
Cypress Semiconductor, Corp.
|
| CY7C1315CV18-200BZC CY7C1315CV18-250BZC |
18-Mbit QDR(TM)-II SRAM 4-Word Burst Architecture; Architecture: QDR-II, 4 Word Burst; Density: 18 Mb; Organization: 512Kb x 36; Vcc (V): 1.7 to 1.9 V 512K X 36 QDR SRAM, 0.45 ns, PBGA165
|
Cypress Semiconductor, Corp.
|
| CY7C1513JV18-250BZXC |
72-Mbit QDR(TM)-II SRAM 4-Word Burst Architecture; Architecture: QDR-II, 4 Word Burst; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 1.7 to 1.9 V 4M X 18 QDR SRAM, 0.45 ns, PBGA165
|
Cypress Semiconductor, Corp.
|
| CY7C1568KV18-500BZXC CY7C1568KV18-500BZC CY7C1570K |
72-Mbit DDR-II SRAM 2-Word Burst Architecture (2.5 Cycle Read Latency); Architecture: DDR-II CIO, 2 Word Burst; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 1.7 to 1.9 V 4M X 18 DDR SRAM, 0.45 ns, PBGA165
72-Mbit DDR-II SRAM 2-Word Burst Architecture (2.5 Cycle Read Latency); Architecture: DDR-II CIO, 2 Word Burst; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 1.7 to 1.9 V 2M X 36 DDR SRAM, 0.45 ns, PBGA165
|
Cypress Semiconductor, Corp.
CYPRESS SEMICONDUCTOR CORP
|
| CY7C1470V25-167AXC CY7C1470V25-167AXI CY7C1470V25- |
72-Mbit(2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL垄芒 Architecture
72-Mbit(2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL Architecture
|
Cypress Semiconductor
|
| CY7C1315AV18-250BZC CY7C1311AV18 CY7C1311AV18-167B |
18-Mb QDR(TM)-II SRAM 4-Word Burst Architecture
18-Mb QDRTM-II SRAM 4-Word Burst Architecture
|
CYPRESS[Cypress Semiconductor]
|
| CY7C1370CV CY7C1372CV25-250BZI CY7C1370CV25 CY7C13 |
512K x 36/1M x 18 Pipelined SRAM with NoBL Architecture
512K x 36/1M x 18 Pipelined SRAM with NoBL(TM) Architecture
512K x 36/1M x 18 Pipelined SRAM with NoBL⑩ Architecture
|
CYPRESS[Cypress Semiconductor]
|
| CY7C1231F-100AC CY7C1231F05 |
2-Mbit (128K x 18) Flow-through SRAM with NoBL Architecture
2-Mbit (128K x 18) Flow-through SRAM with NoBL⑩ Architecture
|
Cypress Semiconductor
|
