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CY7C1268XV18-600BZXC - 36-Mbit DDR II Xtreme SRAM Two-Word Burst Architecture (2.5 Cycle Read Latency)

CY7C1268XV18-600BZXC_5954209.PDF Datasheet


 Full text search : 36-Mbit DDR II Xtreme SRAM Two-Word Burst Architecture (2.5 Cycle Read Latency)


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CY7C1566V1808 CY7C1566V18-400BZC CY7C1566V18-400BZ 4M X 18 DDR SRAM, 0.45 ns, PBGA165 15 X 17 MM, 1.40 MM HEIGHT, LEAD FREE, MO-216, FBGA-165
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CY7C1250V18-300BZI CY7C1246V18-333BZI CY7C1246V18- 36-Mbit DDR-II SRAM 2-Word Burst Architecture (2.0 Cycle Read Latency) 36兆位的DDR - II SRAM2字突发架构(2.0周期读写延迟
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CY7C1992BV18-167BZXC CY7C1992BV18-300BZC CY7C1992B 18-Mbit DDR-II SIO SRAM 2-Word Burst Architecture 2M X 9 DDR SRAM, 0.5 ns, PBGA165
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CY7C1423JV18-250BZXC 36-Mbit DDR-II SIO SRAM 2-Word Burst Architecture; Architecture: DDR-II SIO, 2 Word Burst; Density: 36 Mb; Organization: 2Mb x 18; Vcc (V): 1.7 to 1.9 V 2M X 18 DDR SRAM, 0.45 ns, PBGA165
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CY7C1423AV18-300BZI CY7C1423AV18-200BZI CY7C1429AV 36-Mbit DDR-II SIO SRAM 2-Word Burst Architecture 2M X 18 DDR SRAM, 0.45 ns, PBGA165
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Cypress Semiconductor, Corp.
 
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