| PART |
Description |
Maker |
| CAT33C108SI CAT33C108SI-TE13 CAT33C108K-TE13 CAT33 |
Clock Generator for Intel® Alviso Chipset
200-MHz Differential Clock Buffer/Driver 微型导线串行EEPROM
Clock Synthesizer with Differential CPU Outputs 微型导线串行EEPROM
Clock Generator for Intel® Alviso Chipset
Universal Single-chip Clock Solution for VIA P4M266/KM266 DDR Systems
|
Abracon, Corp.
|
| SI5330A-A00200-GM SI5330A-A00202-GM SI5330F-A00216 |
1.8/2.5/3.3 V LOW-JITTER, LOW-SKEW CLOCK BUFFER/LEVEL TRANSLATOR
Supports single-ended or differential input clock singnals Generates four differential (LVPECL, LVDS, HCSL) or eight single-ended (CMOS, SSTL, HSTL) outputs
|
Silicon Laboratories
|
| ICS9DB202 ICS9DB202CF ICS9DB202CFLF ICS9DB202CFLFT |
From old datasheet system
Two 0.7V current mode differential HCSL output pairs, 1 differential clock input
|
http://
ICST[Integrated Circuit Systems]
|
| NB4N111K |
3.3V Differential In 1:10 Differential Fanout Clock Driver
|
ON Semiconductor
|
| MC100EP01 MC10EP445 MC10H172FNR2 MC100EL29 MC100H6 |
3.3V / 5V ECL 4-Input OR/NOR
3.3V / 5VECL 8-Bit Serial/Parallel Converter
Dual Binary 1-4-Decoder (High)
5V ECL Dual Differential Data and Clock D Flip-Flop With Set and Reset
9-Bit TTL-ECL Translator
Quad TTL-ECL Translator
Dual 2-Wide 2-3-Input OR-AND/OR-AND-Invert Gate
3.3V / 5V ECL 8-Bit Synchronous Binary Up Counter
3.3 V 1:9 Differential HSTL/PECL to HSTL Clock Driver with LVTTL Clock Select and Enable
3.3V 10-bit LVTTL/LVCMOS to LVPECL Translator
3.3V / 5V ECL Quad D Flip Flop with Set, Reset, and Differential Clock
5V ECL Voltage Controlled Oscillator
3.3V ECL D-Type Flip-Flop with Set and Reset
Binary to 1-8 Decoder (Low)
Differential -5V ECL To TTL Translator
-3.3V / -5V Triple ECL Input to PECL Output Translator
5V ECL Dual Differential 2:1 Multiplexer
Quad MSTR
5V ECL Quad 4-Input OR/NOR Gate
3.3V ECL Dual Differential Data and Clock D-Type Flip-Flop with Set and Reset
Dual 4-5-Input OR/NOR
|
ON Semiconductor
|
| NB3N106K NB3N106KMNG NB3N106KMNR2G |
Differential 1:6 Fanout Clock Driver
Fanout Clock and Data Driver, 3.3 V Differential in 1:6, with HCSL Outputs
|
ON Semiconductor
|
| NB4N121KMNG NB4N121KMNR2G |
3.3V Differential In 1:21 Differential Fanout Clock Driver with HCSL level Output PECL TO CML TRANSLATOR, COMPLEMENTARY OUTPUT, QCC52
|
Rectron Semiconductor
|
| NB4L339 |
Clock IN to Differential LVPECL Clock Generator
|
ON Semiconductor
|
| NB100LVEP224FAG |
2.5V/3.3V 1:24 Differential ECL/PECL Clock Driver with Clock Select and Output Enable 100LVE SERIES, LOW SKEW CLOCK DRIVER, 24 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP64
|
ON Semiconductor
|
| PI6C4911510FAEIE PI6C4911510ZHIE PI6C4911510FAIE P |
2.5V/3.3V 1.5GHz Low Skew 1-to-10 Differential to LVPECL Fanout Buffer with 2 to 1 Differential Clock Input Mux
|
Pericom Semiconductor C...
|
