| PART |
Description |
Maker |
| NB6L56 |
Clock / Data Multiplexer, 2.5 V / 3.3 V Dual 2:1 Differential, with LVPECL Outputs
|
ON Semiconductor
|
| MC10EP29-D |
3.3V / 5V ECL Dual Differential Data and Clock D Flip-Flop With Set and Reset
|
ON Semiconductor
|
| MC100EL29DW MC100EL29DWG MC100EL29DWR2 MC100EL29DW |
5V ECL Dual Differential Data and Clock D Flip−Flop With Set and Reset
|
ONSEMI[ON Semiconductor]
|
| AND8090 AND8090D MC100H601 MC100H601FN MC10H106FN |
3.3V / 5V ECL Quad 2-Input Differential AND/NAND
5V ECL Low Impedance Driver
LOW VOLTAGE DUAL 1:4, 1:5 DIFFERENTIAL FANOUT BUFFER
8 Input Priority Encoder
3.3V ECL Triple D-Type Flip-Flop with Set and Reset
3.3V / 5V ECL Quad D Flip Flop with Set, Reset, and Differential Clock
3.3V Dual Differential LVPECL to LVTTL Translator
3.3V / 5V ECL 6-Bit Differential Register with Master Reset
3.3V ECL 1:15 Differential ÷1/÷2 Clock Driver
Fibre Channel Coaxial Cable Driver and Loop Resillency Circuit
3.3 V 1:9 Differential HSTL/PECL to HSTL Clock Driver with LVTTL Clock Select and Enable
3.3V / 5V ECL 8-Bit Synchronous Binary Up Counter
2.5 V/3.3 V SiGe Selectable Differential Clock and Data D Flip-Flop/Clock Divider with Reset and OLS
3.3V / 5V Programmable PLL Synthesized Clock Generator (25 to 400 MHz)
2.5 V/3.3 V SiGe 1:2 Differential Clock Driver with RSECL Outputs
2.5 V/3.3 V SiGe 1:10 Differential Clock Driver with RSECL Outputs
Triple 4-3-3-Input NOR Gate
9-Bit ECL-TTL Translator
AC Characteristics of ECL Devices
|
Motorola
ONSEMI[ON Semiconductor]
|
| MC100EPT22DTR2G MC100EPT22DR2G |
3.3V Dual LVTTL/LVCMOS to Differential LVPECL to Differential LVPECL DUAL TTL/CMOS TO PECL TRANSLATOR, COMPLEMENTARY OUTPUT, PDSO8
|
ON Semiconductor
|
| NB4L858MFAG NB4L858MFAR2G NB4L858M |
2.5V/3.3V, 3 GHz Dual Differential Clock/Data 2x2 Crosspoint Switch with CML Output and Internal Termination 2-CHANNEL, CROSS POINT SWITCH, PQFP32
From old datasheet system
|
ONSEMI[ON Semiconductor]
|
| NB4N840M |
3.3V 2.7Gb/s Dual Differential Clock/Data 2 x 2 Crosspoint Switch with CML Output and Internal Termination(带CML输出和内部终端的3.3V2.7Gb/s双差分时数据2x2交点开 3.3 2.7Gb / s双差分时带CML输出和内部终端（带白血病输出和内部终端.3伏，2.7Gb /数据2 × 2交叉点开关S双差分时数据2X2的交点开关）
|
ON Semiconductor
|
| ICS831721I 831721AGILFT |
Differential Clock/Data Multiplexer
|
http://
Integrated Device Technology
|
| MM88C30N MM88C29 MM88C29N MM88C30 MM88C30M MM88C30 |
Dual Differential Line Driver DUAL LINE DRIVER, PDSO14
Quad Single-Ended Line Driver . Dual Differential Line Driver
From old datasheet system
|
Fairchild Semiconductor, Corp.
FAIRCHILD[Fairchild Semiconductor]
|
