| PART |
Description |
Maker |
| 74AUP2G80GN 74AUP2G80GD |
Low-power dual D-type flip-flop; positive-edge trigger AUP/ULP/V SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, INVERTED OUTPUT, PDSO8
Low-power dual D-type flip-flop; positive-edge trigger 低功耗双D型触发器;上升沿触
|
NXP Semiconductors N.V.
|
| 74AUP2G80GD125 74AUP2G80GM125 |
Low-power dual D-type flip-flop; positive-edge trigger; Package: SOT996-2 (XSON8U); Container: Reel Pack, Reverse, Reverse AUP/ULP/V SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, PDSO8
Low-power dual D-type flip-flop; positive-edge trigger; Package: SOT902-1 (XQFN8U); Container: Reel Pack, Reverse, Reverse
|
NXP Semiconductors N.V.
|
| CD4013BMS CD4013BE CD4013 FN3080 |
D-Type Flip Flop, Dual, Rad-Hard, CMOS, Logic
From old datasheet system
CMOS Dual ‘D’-Type Flip-Flop
CMOS Dual ??Type Flip-Flop
IC-4000CMOS
CMOS Dual D-Type Flip-Flop
CMOS Dual ‘D?Type Flip-Flop
|
INTERSIL[Intersil Corporation]
|
| 74AUP2G79 |
Low-power dual D-type flip-flop
|
NXP Semiconductors
|
| 74AUP2G79DC-Q100 |
Low-power dual D-type flip-flop; positive-edge trigger
|
NXP Semiconductors
|
| MM74C74N MM74C74 MM74C74M MM74C74MX |
Dual D Flip-Flop; Package: SOIC; No of Pins: 14; Container: Tape & Reel CMOS SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO14
From old datasheet system
Dual D-Type Flip-Flop
|
Fairchild Semiconductor, Corp.
FAIRCHILD[Fairchild Semiconductor]
|
| MC74LVQ74 |
LOW-VOLTAGE CMOS DUAL D-TYPE FLIP-FLOP
|
Motorola
|
| MC74LCX74 MC74LCX74D MC74LCX74DT ON1574 MC74LCX74M |
LOW-VOLTAGE CMOS DUAL D-TYPE FLIP-FLOP
From old datasheet system
|
ONSEMI[ON Semiconductor]
MOTOROLA[Motorola Inc]
MOTOROLA[Motorola, Inc]
|
| MC100ELT23 MC100EL12DTR2 MC10H131FNR2 MC100H640FNR |
5V Dual Differential PECL to TTL Translator
5V ECL Low Impedance Driver
Dual Type D Master-Slave Flip-Flop
ECL/TTL Clock Driver
3.3V / 5V ECL Quad D Flip Flop with Set, Reset, and Differential Clock
3.3V / 5V ECL ÷4 Divider
Quad 2-Input NOR Gate
3.3V ECL Dual Differential Data and Clock D-Type Flip-Flop with Set and Reset
3.3V / 5V Hex Differential Line Receiver / Driver
3.3V / 5V Triple ECL Input to LVPECL/PECL Output Translator
|
ON Semiconductor
|
| 54VHCT74J/883X 54VHC74J/883X 54VHC74E/883X 54VHC74 |
Dual D-Type Flip-Flop
ACTIVE LOW OD WITH WDI, MR, -40C to 125C, 5-SOT-23, T/R 双D型触发器
|
Vishay Intertechnology, Inc.
|
| 74LVQ74_01 74LVQ74 74LVQ74SC 74LVQ74SJ 74LVQ74SCX |
Low Voltage Dual D-Type Positive Edge-Triggered Flip-Flop
From old datasheet system
|
FAIRCHILD[Fairchild Semiconductor]
|
