| PART |
Description |
Maker |
| K4D26323RA-GC |
1M x 32Bit x 4 Banks Double Data Rate Synchronous RAM with Bi-directional Data Strobe and DLL Data Sheet
|
Samsung Electronic
|
| HI-8787 HI-8787PQI HI-8787PQT HI-8788 HI-8788PQI H |
16 Bit Parallel data converted to 429 and 561 serial data out
ARINC INTERFACE DEVICE 16-BIT PARALLEL DATA CONVERTED 429&561 SERIAL DATA OUT
512 MACROCELL 3.3 VOLT ZERO POWER ISP CP - NOT RECOMMENDED for NEW DESIGN
|
HOLTIC[Holt Integrated Circuits]
|
| M13S128324A-2M |
Double-data-rate architecture, two data transfers per clock cycle
|
Elite Semiconductor Mem...
|
| M13L2561616A-2A |
Double-data-rate architecture, two data transfers per clock cycle
|
Elite Semiconductor Mem...
|
| M13S5121632A-2S |
Double-data-rate architecture, two data transfers per clock cycle
|
Elite Semiconductor Mem...
|
| M14D5121632A-2K |
Internal pipelined double-data-rate architecture; two data access per clock cycle
|
Elite Semiconductor Mem...
|
| S1A0905X01 |
RDS (RADIO DATA SYSTEM) DEMODULATOR IC Data Sheet
|
Samsung Electronic
|
| W972GG6JB W972GG6JB-25 |
16M ?8 BANKS ?16 BIT DDR2 SDRAM
Double Data Rate architecture: two data transfers per clock cycle
|
Winbond
|
| HFBR-0536 HFBR-4532 HFBR-4531 |
Eval Kit for proprietary data com apps at data rates up to 32 MBd with AN 1121 figs. 3 & 4 circuits
Crimpless Connectors for Plastic Optical Fiber and Versatile Link(应用于塑料光纤和通用链接的无压接连接
Eval Kit for proprietary data com apps at data rates up to 32 MBd with AN 1121 figs. 3 & 4 circuits 评估套件与安1121无花果专有数据的COM应用程序的数据传输速率高达32万桶3
|
Agilent(Hewlett-Packard)
|
| W9412G2IB W9412G2IB4 W9412G2IB-6I |
1M × 4 BANKS × 32 BITS GDDR SDRAM
Double Data Rate architecture; two data transfers per clock cycle
4M X 32 DDR DRAM, 0.7 ns, PBGA144
|
Winbond
WINBOND ELECTRONICS CORP
|
