| PART |
Description |
Maker |
| CD4013BMS CD4013BE CD4013 FN3080 |
D-Type Flip Flop, Dual, Rad-Hard, CMOS, Logic
From old datasheet system
CMOS Dual ‘D’-Type Flip-Flop
CMOS Dual ??Type Flip-Flop
IC-4000CMOS
CMOS Dual D-Type Flip-Flop
CMOS Dual ‘D?Type Flip-Flop
|
INTERSIL[Intersil Corporation]
|
| ACTS74HMSR-02 |
Dual D Type Flip Flop with Set and Reset, Advanced Logic, CMOS; Temperature Range: -55°C to 125°C; Package: Die (Military Visual) ACT SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, UUC14
|
Intersil, Corp.
|
| 100351QC 100351 100351SC 100351PC 100351QI 100351Q |
From old datasheet system
Low Power Hex D-Type Flip-Flop
Hex D-Type Flip-Flop 100K SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO24
|
FAIRCHILD[Fairchild Semiconductor]
Fairchild Semiconductor, Corp.
|
| HD74LS107A HD74LS107AFP HD74LS107AP HD74LS107ARP |
Dual J-K Flip-Flops with Clear
Dual J-K Negative-edge-triggered Flip-Flops(with Clear)
FLIP-FLOP|DUAL|J/K TYPE|LS-TTL|SOP|14PIN|PLASTIC
FLIP-FLOP|DUAL|J/K TYPE|LS-TTL|DIP|14PIN|PLASTIC
|
HITACHI[Hitachi Semiconductor]
|
| MC74LVQ74 MC74LVQ74D MC74LVQ74DT MC74LVQ74M MC74LV |
LOW-VOLTAGE CMOS DUAL D-TYPE FLIP-FLOP
|
Motorola, Inc
|
| 74LCX16374 74LCX16374GX 74LCX16374MEAX |
FLIP-FLOP|16-BIT|D TYPE|LCX-CMOS|SSOP|48PIN|PLASTIC 触发器| 16位| D型|回旋支全CMOS | SSOP封装| 48PIN |塑料
Low Voltage 16-Bit D-Type Flip-Flop with 5V Tolerant Inputs and Outputs
|
Fairchild Semiconductor, Corp.
|
| ACS74MS |
CMOS Dual D Type Flip Flop with Set and Reset, Advanced Logic
|
Intersil
|
| MC74LCX74-D |
Low-Voltage CMOS Dual D-Type Flip-Flop With 5 V-Tolerant Inputs
|
ON Semiconductor
|
| HCTS74KTR HCTS74T HCTS74DTR |
DUAL RETRIGGERABLE MONOSTABLE MULTIVIBRATORS 20-LCCC -55 to 125
Radiation Hardened Dual-D Flip-Flop with
Set and Reset(抗辐射双D触发器（带置位、复位）)
Radiation Hardened Dual-D Flip-Flop with Set and Reset
HCT SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, CDIP14
|
Intersil Corporation
|
| IDT74LVC74A IDT74LVC74APY8 IDT74LVC74ADC8 IDT74LVC |
3.3V CMOS Dual POSITIVE-Edge-Triggered D-Type Flip-Flop with Clear and Preset, 5.0V Tolerant I/O
|
IDT
|
| CD4027BMS FN3302 CD4027 |
J-K Flop Flop, Master-Slave, Dual, Rad-Hard, CMOS, Logic
CMOS Dual J-K Master-Slave Flip-Flop
From old datasheet system
|
INTERSIL[Intersil Corporation]
|
