| PART |
Description |
Maker |
| M29W160EB70N1 M29W160EB70N1T M29W160EB70N6 M29W160 |
16-Bit Edge-Triggered D-Type Flip-Flop With 3-State Outputs 56-BGA MICROSTAR JUNIOR -40 to 85 16兆位（含2Mb x8兆x16插槽，引导块3V电源快闪记忆
CAP 3300UF 6.3V ELECT FC RADIAL 16兆位（含2Mb x8兆x16插槽，引导块V电源快闪记忆
16 Mbit (2Mb x8 or 1Mb x16 / Boot Block) 3V Supply Flash Memory
16 MBIT (2MB X8 OR 1MB X16, BOOT BLOCK) 3V SUPPLY FLASH MEMORY
70ns; V(in/out): -0.6 to 0.6V; 16Mbit (2Mb x 8 or 1Mb x 16, boot block) 3V supply flash memory
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STMicroelectronics N.V.
ST Microelectronics
SGS Thomson Microelectronics
|
| M29W160ET M29W160EB70N6 M29W160EB90N6E M29W160EB70 |
16 Mbit (2Mb x8 or 1Mb x16, Boot Block) 3V Supply Flash Memory
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Numonyx B.V
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| M29W160DT90ZA6T M29DCL3-16T M29W160DB M29W160DB70M |
From old datasheet system
16 Mbit (2Mb x8 or 1Mb x16, Boot Block) 3V Supply Flash Memory
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STMICROELECTRONICS[STMicroelectronics]
ST Microelectronics
|
| M29W160DB90N1 M29W160DB70M1 |
16 Mbit (2Mb x8 or 1Mb x16, Boot Block) 3V Supply Flash Memory 16兆位（含2Mb x8兆x16插槽，引导块V电源快闪记忆
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意法半导
STMicroelectronics N.V.
|
| M29DW324DB70ZA6 M29DW324DB70ZA6F M29DW324DB70ZE6F |
CABLE ASSEMBLY; LEAD-FREE SOLDER; N MALE TO N FEMALE; 50 OHM, RG225/U COAX, DOUBLE SHIELDED
32 Mbit 4Mb x8 or 2Mb x16, Dual Bank 16:16, Boot Block 3V Supply Flash Memory 32兆位4Mb的x8或功能的2Mb x16插槽，双66分，启动V电源快闪记忆
32 Mbit 4Mb x8 or 2Mb x16, Dual Bank 16:16, Boot Block 3V Supply Flash Memory 32兆位4Mb的x8或功能的2Mb x16插槽，双66分，启动3V电源快闪记忆
32 Mbit 4Mb x8 or 2Mb x16, Dual Bank 16:16, Boot Block 3V Supply Flash Memory 32兆位4Mb的x8或功能的2Mb x16插槽，双1616分，启动V电源快闪记忆
32 Mbit 4Mb x8 or 2Mb x16 / Dual Bank 16:16 / Boot Block 3V Supply Flash Memory
|
SGS Thomson Microelectronics
意法半导
STMicroelectronics N.V.
ST Microelectronics
|
| M29KW016E 8769 M29KW016E90ZA1T M29KW016E110M1T M29 |
16 MBIT (1MB X16, UNIFORM BLOCK)3V SUPPLY LIGHTFLASHMEMORY
16 Mbit (1Mb x16 / Uniform Block) 3V Supply LightFlash Memory
16 MBIT (1MB X16, UNIFORM BLOCK)3V SUPPLY LIGHTFLASH? MEMORY
From old datasheet system
16 Mbit (1Mb x16, Uniform Block) 3V Supply LightFlash Memory
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ST Microelectronics
STMICROELECTRONICS[STMicroelectronics]
|
| M27C320 6185 M27C320-80N1 M27C320-100M1 M27C320-10 |
From old datasheet system
32 Mbit (4Mb x8 or 2Mb x16) OTP EPROM
32 Mbit 4Mb x8 or 2Mb x16 OTP EPROM 32兆位4Mb的x8或检察官办公室的2Mb x16存储
|
ST Microelectronics
STMICROELECTRONICS[STMicroelectronics]
意法半导
STMicroelectronics N.V.
|
| M58LW032A90ZA6T M58LW032A90ZA1T M58LW032A90N6T M58 |
32 Mbit 2Mb x16, Uniform Block, Burst 3V Supply Flash Memory 32兆位Mb x16插槽，统一座，突发3V电源快闪记忆
32 Mbit 2Mb x16 / Uniform Block / Burst 3V Supply Flash Memory
|
STMicroelectronics N.V.
ST Microelectronics
|
| M36W432TG-ZAT M36W432BGZA M36W432BG70ZA6T M36W432B |
32 Mbit 2Mb x16, Boot Block Flash Memory and 4 Mbit 256Kb x16 SRAM, Multiple Memory Product
32 MBIT (2MB X16, BOOT BLOCK) FLASH MEMORY AND 4 MBIT (256KB X16) SRAM, MULTIPLE MEMORY PRODUCT
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ST Microelectronics
|
| M36DR232A M36DR232B M36DR232BZA M36DR232 M36DR232A |
32 Mbit 2Mb x16, Dual Bank, Page Flash Memory and 2 Mbit 128K x16 SRAM, Multiple Memory Product
32 MBIT (2MB X16, DUAL BANK, PAGE) FLASH MEMORY AND 2 MBIT (128K X16) SRAM, MULTIPLE MEMORY PRODUCT
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ST Microelectronics
STMICROELECTRONICS[STMicroelectronics]
|
| M38230G4-XXXFP M38230G4-XXXHP M38231G4-XXXHP M3823 |
18-Mbit (512K x 36/1M x 18) Flow-Through SRAM; Architecture: Standard Sync, Flow-through; Density: 18 Mb; Organization: 512Kb x 36; Vcc (V): 3.1 to 3.6 V
36-Mbit QDR(TM)-II SRAM 4-Word Burst Architecture; Architecture: QDR-II, 4 Word Burst; Density: 36 Mb; Organization: 2Mb x 18; Vcc (V): 1.7 to 1.9 V
36-Mbit DDR-II SRAM 2-Word Burst Architecture; Architecture: DDR-II CIO, 2 Word Burst; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 1.7 to 1.9 V
36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 2.4 to 2.6 V
72-Mbit (2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 3.1 to 3.6 V
18-Mbit (512K x 36/1M x 18) Pipelined SRAM; Architecture: Standard Sync, Pipeline SCD; Density: 18 Mb; Organization: 1Mb x 18; Vcc (V): 3.1 to 3.6 V
36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 3.1 to 3.6 V
72-Mbit QDR(TM)-II SRAM 2-Word Burst Architecture; Architecture: QDR-II, 2 Word Burst; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 1.7 to 1.9 V
18-Mbit (512K x 36/1M x 18) Flow-Through SRAM; Architecture: Standard Sync, Flow-through; Density: 18 Mb; Organization: 1Mb x 18; Vcc (V): 3.1 to 3.6 V
36-Mbit QDR(TM)-II SRAM 2-Word Burst Architecture; Architecture: QDR-II, 2 Word Burst; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 1.7 to 1.9 V
36-Mbit (1M x 36/2 M x 18/512K x 72) Flow-Through SRAM with NoBL(TM) Architecture; Architecture: NoBL, Flow-through; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 3.1 to 3.6 V
72-Mbit(2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 72 Mb; Organization: 1Mb x 72; Vcc (V): 2.4 to 2.6 V
72-Mbit QDR(TM)-II SRAM 2-Word Burst Architecture; Architecture: QDR-II, 2 Word Burst; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 1.7 to 1.9 V
36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined Sync SRAM; Architecture: Standard Sync, Pipeline SCD; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 3.1 to 3.6 V
36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 36 Mb; Organization: 2Mb x 18; Vcc (V): 3.1 to 3.6 V
36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 36 Mb; Organization: 512Kb x 72; Vcc (V): 3.1 to 3.6 V
72-Mbit DDR-II SRAM 2-Word Burst Architecture; Architecture: DDR-II CIO, 2 Word Burst; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 1.7 to 1.9 V
Sync SRAM; Architecture: QDR-II, 2 Word Burst; Density: 36 Mb; Organization: 2Mb x 18; Vcc (V): 1.7 to 1.9 V
36-Mbit DDR-II SRAM 2-Word Burst Architecture; Architecture: DDR-II CIO, 2 Word Burst; Density: 36 Mb; Organization: 2Mb x 18; Vcc (V): 1.7 to 1.9 V
72-Mbit(2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 2.4 to 2.6 V
72-Mbit(2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 2.4 to 2.6 V
72-Mbit QDR(TM)-II SRAM 4-Word Burst Architecture; Architecture: QDR-II, 4 Word Burst; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 1.7 to 1.9 V
72-Mbit (2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 72 Mb; Organization: 1Mb x 72; Vcc (V): 3.1 to 3.6 V
72-Mbit (2M x 36/4M x 18/1M x 72) Pipelined Sync SRAM; Architecture: Standard Sync, Pipeline SCD; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 2.4 to 2.6 V
72-Mbit QDR(TM)-II SRAM 4-Word Burst Architecture (2.5 Cycle Read Latency); Architecture: QDR-II , 4 Word Burst; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 1.7 to 1.9 V
72-Mbit DDR-II SRAM 2-Word Burst Architecture (2.0 Cycle Read Latency); Architecture: DDR-II CIO, 2 Word Burst; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 1.7 to 1.9 V
36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined Sync SRAM; Architecture: Standard Sync, Pipeline SCD; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 3.1 to 3.6 V 单芯位CMOS微机
72-Mbit DDR-II SRAM 2-Word Burst Architecture; Architecture: DDR-II CIO, 2 Word Burst; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 1.7 to 1.9 V 单芯位CMOS微机
18-Mbit (512K x 36/1M x 18) Flow-Through SRAM; Architecture: Standard Sync, Flow-through; Density: 18 Mb; Organization: 1Mb x 18; Vcc (V): 3.1 to 3.6 V 单芯位CMOS微机
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER 单芯位CMOS微机
72-Mbit(2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 2.4 to 2.6 V 单芯位CMOS微机
72-Mbit(2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 2.4 to 2.6 V 单芯位CMOS微机
72-Mbit QDR(TM)-II SRAM 4-Word Burst Architecture; Architecture: QDR-II, 4 Word Burst; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 1.7 to 1.9 V 单芯位CMOS微机
72-Mbit QDR(TM)-II SRAM 2-Word Burst Architecture; Architecture: QDR-II, 2 Word Burst; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 1.7 to 1.9 V 单芯位CMOS微机
36-Mbit QDR(TM)-II SRAM 4-Word Burst Architecture; Architecture: QDR-II, 4 Word Burst; Density: 36 Mb; Organization: 2Mb x 18; Vcc (V): 1.7 to 1.9 V 单芯位CMOS微机
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER 单芯8位CMOS微机
Sync SRAM; Architecture: QDR-II, 2 Word Burst; Density: 36 Mb; Organization: 2Mb x 18; Vcc (V): 1.7 to 1.9 V 单芯位CMOS微机
36-Mbit DDR-II SRAM 2-Word Burst Architecture; Architecture: DDR-II CIO, 2 Word Burst; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 1.7 to 1.9 V 单芯位CMOS微机
72-Mbit DDR-II SRAM 2-Word Burst Architecture; Architecture: DDR-II CIO, 2 Word Burst; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 1.7 to 1.9 V
36-Mbit QDR(TM)-II SRAM 2-Word Burst Architecture; Architecture: QDR-II, 2 Word Burst; Density: 36 Mb; Organization: 2Mb x 18; Vcc (V): 1.7 to 1.9 V
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Renesas Electronics Corporation.
Renesas Electronics, Corp.
|
| M29F800D M29F800DB M29F800DB55N1F M29F800DT90M6E - |
8 Mbit (1Mb x8 or 512Kb x16 / Boot Block) 5V Supply Flash Memory
8 Mbit (1Mb x8 or 512Kb x16, Boot Block) 5V Supply Flash Memory 8兆（1兆x812KB的x16插槽，引导块V电源快闪记忆
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ST Microelectronics
STMicroelectronics N.V.
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