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CY7C1146V18-333BZI - 18-Mbit DDR-II SRAM 2-Word Burst Architecture (2.0 Cycle Read Latency)

CY7C1146V18-333BZI_2481647.PDF Datasheet
 
Part No. CY7C1146V18-333BZI CY7C1146V18-375BZI CY7C1148V18-333BZI CY7C1148V18-375BZI CY7C1150V18-333BZI CY7C1150V18-375BZI CY7C1157V18-333BZI CY7C1157V18-375BZI CY7C1146V18-333BZXC CY7C1146V18-375BZXI CY7C1146V18-375BZXC CY7C1146V18-333BZXI CY7C1150V18-333BZC CY7C1150V18-375BZXC CY7C1150V18-375BZXI CY7C1150V18-333BZXI CY7C1150V18-333BZXC CY7C1148V18-375BZXI CY7C1148V18-375BZXC CY7C1148V18-333BZXI CY7C1148V18-333BZXC CY7C1157V18-333BZXI CY7C1157V18-333BZC CY7C1157V18-333BZXC
Description 18-Mbit DDR-II SRAM 2-Word Burst Architecture (2.0 Cycle Read Latency)
File Size 962.62K  /  27 Page  

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Cypress Semiconductor Corp.

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72-Mbit (2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 3.1 to 3.6 V
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