| PART |
Description |
Maker |
| W9725G6JB25I |
Double Data Rate architecture: two data transfers per clock cycle
|
Winbond
|
| W9751G6KB-18 W9751G6KB-25 W9751G6KB-3 W9751G6KB25A |
Double Data Rate architecture: two data transfers per clock cycle
|
Winbond
|
| M13S5121632A-2S |
Double-data-rate architecture, two data transfers per clock cycle
|
Elite Semiconductor Mem...
|
| M14D2561616A-2E |
Internal pipelined double-data-rate architecture; two data access per clock cycle
|
Elite Semiconductor Mem...
|
| NB6L572M NB6L572MMNG NB6L572MMNR4G |
6L SERIES, LOW SKEW CLOCK DRIVER, 2 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), QCC32
2.5V / 3.3V Differential 4:1 Mux to 1:2 CML Clock/Data Fanout / Translator
2.5V / 3.3V Differential 4:1 Mux to 1:2 CML Clock/Data Fanout / Translator
|
ON Semiconductor
|
| MAX3170 MAX3170CAI MAXIM |
3.3V, Multiprotocol, 3 Tx/3 Rx, Software-Selectable Clock/Data Transceiver( 3.3V,澶??璁?3Tx/3Rx,杞?欢???绋?????版??跺???
3.3V, Multiprotocol, 3 Tx/3 Rx, Software- Selectable Clock/Data Transceiver
3.3V, Multiprotocol, 3 Tx/3 Rx, Software-Selectable Clock/Data Transceiver( 3.3V,多协3Tx/3Rx,软件可编程时数据收发
3.3V / Multiprotocol / 3 Tx/3 Rx / Software- Selectable Clock/Data Transceiver
|
MAXIM[Maxim Integrated Products]
MAX3170
Maxim Integrated Products, Inc.
|
| SY87721LHITR SY87721LHY SY87721LHYTR SY87721L08 |
CLOCK AND DATA RECOVERY WITH INTEGRATED CLOCK MULTIPLIER UNIT
|
Micrel Semiconductor
|
| TSM600-250 |
The SY87702L is a complete Clock Recovery and Data
retiming integrated circuit for data rates from 28Mbps up to
2.5Gbps NRZ.
PolySwitch PTC Devices Overcurrent Protection Device
|
MACOM
Tyco Electronics
|
| SY100EP57VK4G |
Clock and Timing - Clock and Data Distribution
|
Microchip
|
| SY100EP15VK4G-TR |
Clock and Timing - Clock and Data Distribution
|
Microchip
|
| SY58606UMG |
Clock and Timing - Clock and Data Distribution
|
Microchip
|
