| PART |
Description |
Maker |
| IDTCSP2510C |
3.3V PHASE-LOCK LOOP CLOCK DRIVER ZERO DELAY BUFFER
|
IDT
|
| ICS93735 ICS93735F-T |
DDR Phase Lock Loop Zero Delay Clock Buffer
|
ICS
Integrated Circuit Systems
|
| 2020-900 2020-1400 2021-200 2021-250 2020-700 2021 |
Delay 900 /-18 ns, fixed SIP delay line Tr
Delay 1400 /-28 ns, fixed SIP delay line Tr
Delay 200 /-10 ns, fixed SIP delay line Tr
Delay 250 /-10 ns, fixed SIP delay line Tr
Delay 700 /-14 ns, fixed SIP delay line Tr
Delay 100 /-10 ns, fixed SIP delay line Tr
Delay 150 /-10 ns, fixed SIP delay line Tr
Delay 500 /-10 ns, fixed SIP delay line Tr
Delay 1300 /-26 ns, fixed SIP delay line Tr
|
Data Delay Devices Inc
|
| 1505 1505-50B 1505-50G 1505-5B 1505-50A 1505-50C 1 |
Delay 300 /-15 ns, 5-TAP SIP delay line Td/Tr=3
Delay 100 /-5 ns, 5-TAP SIP delay line Td/Tr=3
Delay 60 /-3 ns, 5-TAP SIP delay line Td/Tr=3
Delay 30 /-2 ns, 5-TAP SIP delay line Td/Tr=3
Fixed 5-tap passive SIP delay line
PASSIVE DELAY LINE, TRUE OUTPUT, PSIP7
Delay 70 /-3.5 ns, 5-TAP SIP delay line Td/Tr=3
Delay 75 /-3.5 ns, 5-TAP SIP delay line Td/Tr=3
Delay 90 /-5 ns, 5-TAP SIP delay line Td/Tr=3
Delay 40 /-2.5 ns, 5-TAP SIP delay line Td/Tr=3
Delay 50 /-3 ns, 5-TAP SIP delay line Td/Tr=3
Delay 20 /-1.5 ns, 5-TAP SIP delay line Td/Tr=3
Delay 200 /-10 ns, 5-TAP SIP delay line Td/Tr=3
Delay 5 /-1 ns, 5-TAP SIP delay line Td/Tr=3
|
DATA DELAY DEVICES INC
|
| 1503 1503J 1503-100A 1503-100B 1503-100C 1503-120B |
Max delay 35 ns, Mechanically variable delay line
Max delay 250 ns, Mechanically variable delay line
Max delay 150 ns, Mechanically variable delay line
Max delay 130 ns, Mechanically variable delay line
Max delay 80 ns, Mechanically variable delay line
Max delay 60 ns, Mechanically variable delay line
Max delay 50 ns, Mechanically variable delay line
Max delay 40 ns, Mechanically variable delay line
Max delay 30 ns, Mechanically variable delay line
Max delay 25 ns, Mechanically variable delay line
Max delay 20 ns, Mechanically variable delay line
Max delay 200 ns, Mechanically variable delay line
Max delay 160 ns, Mechanically variable delay line
Max delay 15 ns, Mechanically variable delay line
Max delay 140 ns, Mechanically variable delay line
Max delay 120 ns, Mechanically variable delay line
Max delay 100 ns, Mechanically variable delay line
Mechanically variable passive delay line
|
Data Delay Devices Inc
|
| CY23FS08OXC CY23FS08OXCT CY23FS08OXIT CY23FS0811 C |
Failsafe 2.5 V/3.3 V Zero Delay Buffer
Failsafe™ 2.5V/ 3.3V Zero Delay Buffer 166.7 MHz, OTHER CLOCK GENERATOR, PDSO28
Failsafe?2.5 V/3.3 V Zero Delay Buffer
|
Cypress Semiconductor, Corp.
|
| CY23FS08-04 CY23FS08OXI-04 CY23FS08OXI-04T |
133 MHz, OTHER CLOCK GENERATOR, PDSO28 5.30 MM, LEAD FREE, SSOP-28
FailSafe⑩ 1.8V Zero Delay Buffer
FailSafe 1.8V Zero Delay Buffer
|
Cypress Semiconductor, Corp.
|
| 1507 1507-100A 1507-100B 1507-100C 1507-150A 1507- |
Delay 50 /-2.5 ns, 10-TAP SIP delay line Td/Tr=5
Delay 300 /-15 ns, 10-TAP SIP delay line Td/Tr=5
Delay 200 /-10 ns, 10-TAP SIP delay line Td/Tr=5
Delay 250 /-13 ns, 10-TAP SIP delay line Td/Tr=5
Delay 150 /-7.5 ns, 10-TAP SIP delay line Td/Tr=5
Delay 100 /-5 ns, 10-TAP SIP delay line Td/Tr=5
Ultra-Low-Power Voltage Detectors and µP Supervisory Circuits 固定10抽头延迟线被动园
Ultra-Low-Power Voltage Detectors and µP Supervisory Circuits
Delay 40 /-2 ns, 10-TAP SIP delay line Td/Tr=5
Delay 500 /-25 ns, 10-TAP SIP delay line Td/Tr=5
Delay 20 /-2 ns, 10-TAP SIP delay line Td/Tr=5
|
Data Delay Devices Inc
|
| AD802 AD800 AD800-52BR AD800-45BQ AD802-155BR AD80 |
Clock Recovery and Data Retiming Phase-Locked Loop
Clock Recovery and Data Retiming Phase-Locked Loop PHASE LOCKED LOOP, PDSO20
Clock Recovery and Data Retiming Phase-Locked Loop(时钟恢复和重定时PLL)
AD800/AD802: Clock Recovery and Data Retiming Phase-Locked Loop Data Sheet (Rev. B. 12/93)
45 or 52 Mbps Clock and Data Recovery IC
|
Analog Devices, Inc.
|
| IDT230507 IDT2305 IDT2305-1DCG IDT2305-1DCGI IDT23 |
2305 SERIES, PLL BASED CLOCK DRIVER, 4 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO8
3.3V ZERO DELAY CLOCK BUFFER
|
INTEGRATED DEVICE TECHNOLOGY INC
|
| NB2304AI1DG |
3.3 V Zero Delay Clock Buffer 2304 SERIES, PLL BASED CLOCK DRIVER, 4 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO8
|
ON Semiconductor
|
| UPD42S4800LLE-A10 UPD424800LLE-A10 UPD424800LG5-A8 |
x8 Fast Page Mode DRAM
RoboClockII™ Junior, High Speed Multifrequency PLL Clock Buffer
Programmable Skew Clock Buffer
RoboClock® High-speed Multi-phase PLL Clock Buffer
Low Skew Clock Buffer x8快速页面模式的DRAM
RoboClock® High-speed Multi-phase PLL Clock Buffer
|
NEC TOKIN, Corp.
|
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