| PART |
Description |
Maker |
| NB3N3002DTG NB3N3002DTR2G NB3N3002 |
3.3 V PureEdge™ Crystal (25MHz) to HCSL Clock Generator 200 MHz, OTHER CLOCK GENERATOR, PDSO16
3.3V, Crystal-to-HCSL Clock Generator
|
ON Semiconductor
|
| SI5330A-A00200-GM SI5330A-A00202-GM SI5330F-A00216 |
1.8/2.5/3.3 V LOW-JITTER, LOW-SKEW CLOCK BUFFER/LEVEL TRANSLATOR
Supports single-ended or differential input clock singnals Generates four differential (LVPECL, LVDS, HCSL) or eight single-ended (CMOS, SSTL, HSTL) outputs
|
Silicon Laboratories
|
| 557GI-06LF |
557 SERIES, LOW SKEW CLOCK DRIVER, 4 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO20
|
INTEGRATED DEVICE TECHNOLOGY INC
|
| SY75578L SY75578LMG SY75578LMGTR |
PCIe Fanout Buffer 267MHz, 8 HCSL Outputs with 2 Input MUX
|
Micrel Semiconductor
|
| NB3N5573DTR2G NB3N5573DTG NB3N5573 |
3.3V, Crystal - To- HCSL Clock Generator
|
ON Semiconductor
|
| DS4100H |
100MHz HCSL Clock Oscillator
|
MAXIM - Dallas Semiconductor
|
| ICS841664I |
FEMTOCLOCK CRYSTAL-TO-HCSL CLOCK GENERATOR
|
Integrated Device Technology
|
| UPD424280LLE-A80 UPD424280LLE-A70 UPD424280AG5M-80 |
x18 Fast Page Mode DRAM
Quad PLL Clock Generator with Serial Interface (I2C)
Low-Cost 3.3V Spread Aware™ Zero Delay Buffer
MediaClock™ MPEG Clock Generator with VCXO
MediaClock™ PDP Clock Generator
Field and Factory-Programmable Spread Spectrum Clock Generator for EMI Reduction
HOTLink II™ SMPTE Receiver Training Clock
3.3V Zero Delay Buffer x18快速页面模式的DRAM
|
|
| IDT5T9050PGI IDT5T9050 |
2.5V SINGLE DATA RATE 1:5 CLOCK BUFFER TERABUFFERJR 2.5V的单数据传输速率1:5时钟缓冲器TERABUFFER⑩JR
2.5V SINGLE DATA RATE 1:5 CLOCK BUFFER TERABUFFER⑩ JR
2.5V Single Data Rate 1:5 Clock Buffer Terabuffer Jr.
|
Integrated Device Technology, Inc.
IDT[Integrated Device Technology]
|
