| PART |
Description |
Maker |
| CD4027BMS FN3302 CD4027 |
J-K Flop Flop, Master-Slave, Dual, Rad-Hard, CMOS, Logic
CMOS Dual J-K Master-Slave Flip-Flop
From old datasheet system
|
INTERSIL[Intersil Corporation]
|
| MMC4027 |
DUAL J-K MASTER SLAVE FLIP FLOP
|
Micro Electronics
|
| TC4027BP07 |
Dual J-K Master-Slave Flip Flop
|
Toshiba Semiconductor
|
| CD4027BCN CD4027BCM |
Dual J-K Master/Slave Flip-Flop with Set and Reset
|
Fairchild Semiconductor
|
| DM7476 |
Dual Master-Slave J-K Flip-Flops with Clear, Preset, and Complementary Outputs
|
Fairchild Semiconductor
|
| MC10H131FNR2G MC10H131MELG MC10H131FNG |
Dual D Type Master−Slave Flip−Flop 10H SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PQCC20
Dual D Type Master−Slave Flip−Flop 10H SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO16
|
ON Semiconductor
|
| CD4096B |
Inverting Gated JK Master Slave Flip Flop
|
ETC
|
| MC10186 MC10186FN MC10186L MC10186P ON0596 |
From old datasheet system
PIN ASSIGNMENT
Hex D Master-Slave Flip-Flop With Reset
|
ONSEMI[ON Semiconductor]
MOTOROLA[Motorola Inc]
Motorola, Inc
|
| 7473 |
Dual Master-Slave J-K F-F
|
Fairchild Semiconductor
|
| MC10H109FNR2 MC10H131 MC100EP140 MC100E155FN MC100 |
Dual 4-5-Input OR/NOR Gate
Dual Type D Master-Slave Flip-Flop
3.3V ECL Phase-Frequency Detector
5V ECL 6-Bit 2:1 Mux Latch
5V ECL Differential Data and Clock D Flip-Flop
3.3 V 1:9 Differential HSTL/PECL to HSTL Clock Driver with LVTTL Clock Select and Enable
3.3V ECL 1:15 Differential ÷1/÷2 Clock Driver
ECL/TTL Clock Driver
3.3V / 5V 2-Input Differential AND/NAND
5V ECL 2:1 Multiplexer
3.3V / 5V ECL JK Flip Flop
3.3V ECL 1:4 ÷ 1/÷ 2 Clock Fanout Buffer
3.3V / 5V Hex Differential Line Receiver / Driver
3.3V 10-bit LVTTL/LVCMOS to LVPECL Translator
Dual 2-Bit Adder/Subtractor
|
ON Semiconductor
|
