| PART |
Description |
Maker |
| ACTS74HMSR ACTS74MS 5962F9671301VCC 5962F9671301VX |
ACT SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, CDIP14
Radiation Hardened Dual D Flip Flop with Set and Reset
D-Flip Flop, Dual, with Set and Reset, TTL Inputs, Rad-Hard, Advanced Logic, CMOS
|
INTERSIL[Intersil Corporation]
|
| HCTS74KTR HCTS74T HCTS74DTR |
DUAL RETRIGGERABLE MONOSTABLE MULTIVIBRATORS 20-LCCC -55 to 125
Radiation Hardened Dual-D Flip-Flop with
Set and Reset(抗辐射双D触发器（带置位、复位）)
Radiation Hardened Dual-D Flip-Flop with Set and Reset
HCT SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, CDIP14
|
Intersil Corporation
|
| HCF4013 HCF4013M013TR HCF4013B HCF4013BEY HCF4013B |
4000/14000/40000 SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO14
DUAL 'D' - TYPE FLIP-FLOP
DUAL D-TYPE FLIP FLOP
|
STMICROELECTRONICS[STMicroelectronics]
|
| 74LVC74A |
Dual D-type flip-flop with set and
|
Philips
|
| MC74VHC74 MC74VHC74D MC74VHC74DT MC74VHC74M ON1736 |
Dual D-Type Flip-Flop with Set and Reset
From old datasheet system
|
Motorola, Inc.
ON Semiconductor
MOTOROLA[Motorola, Inc]
|
| 74LV74D-Q100 74LV74PW-Q100 |
Dual D-type flip-flop with set and reset; positive-edge trigger
|
NXP Semiconductors
|
| IZ74LV74 |
Dual D-type flip-flop with set and reset; positive-edge trigger
|
Integral Corp.
|
| 74HC74 74HC74PW 74HCT74PW 74HC74BQ 74HC74D 74HC74N |
74HC74; 74HCT74; Dual D-type flip-flop with set and reset; positive-edge trigger
|
PHILIPS[Philips Semiconductors]
|
| 74ALVC74PW 74ALVC74 74ALVC74BQ 74ALVC74D |
Dual D-type flip-flop with set and reset; positive-edge trigger 带设置和复位功能的双D触发器；上升沿触
|
NXP Semiconductors N.V.
|
| 74LV109 74LV109D 74LV109DB 74LV109N 74LV109PW 74LV |
Dual JK flip-flop with set and reset; positive-edge trigger LV/LV-A/LVX/H SERIES, DUAL POSITIVE EDGE TRIGGERED J-KBAR FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO16
From old datasheet system
|
NXP Semiconductors N.V.
PHILIPS[Philips Semiconductors]
|
| 74AUP1G74GT-G 74AUP1G74GF |
Low-power D-type flip-flop with set and reset; positive-edge trigger AUP/ULP/V SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO8
|
NXP Semiconductors N.V.
|
