| PART |
Description |
Maker |
| CY7C1380C-200AC CY7C1380C-200BGC CY7C1380C-167AC C |
Memory : Sync SRAMs
PUSHBUTTON, METAL, FLAT, 22MM 5A; Switch function type:NC/NO Mom; Voltage, contact AC max:250V; Temp, op. max:55(degree C); Temp, op. min:-20(degree C); Diameter, panel cut-out:22.2mm; Length / Height, external:32mm; Dielectric RoHS Compliant: Yes
18-Mb (512K x 36/1M x 18) Pipelined SRAM 1M X 18 CACHE SRAM, 2.8 ns, PBGA165
18-Mb (512K x 36/1M x 18) Pipelined SRAM 1M X 18 CACHE SRAM, 2.6 ns, PBGA165
18-Mb (512K x 36/1M x 18) Pipelined SRAM 512K X 36 CACHE SRAM, 2.8 ns, PBGA165
18-Mb (512K x 36/1M x 18) Pipelined SRAM 512K X 36 CACHE SRAM, 3 ns, PQFP100
18-Mb (512K x 36/1M x 18) Pipelined SRAM 512K X 36 CACHE SRAM, 2.8 ns, PQFP100
18-Mb (512K x 36/1M x 18) Pipelined SRAM 512K X 36 CACHE SRAM, 3.4 ns, PQFP100
|
Cypress Semiconductor Corp.
Cypress Semiconductor, Corp.
|
| WPS512K32-15PJC WPS512K32-15PJI WPS512K32-17PJC WP |
512K x 8 SRAM, 15ns
512K x 8 SRAM, 17ns
512K x 8 SRAM, 20ns
512K x 8 SRAM, 25ns
|
White Electronic Designs
|
| AS5C4008F-35 AS5C4008F-35_H AS5C4008F-35_LH AS5C40 |
512K x 8 SRAM SRAM MEMORY ARRAY
512K X 8 STANDARD SRAM, 20 ns, CDSO32 CERAMIC, LCC-32
512K X 8 STANDARD SRAM, 17 ns, CDFP32 CERAMIC, DFP-32
512K X 8 STANDARD SRAM, 35 ns, CDFP32 CERAMIC, DFP-32
512K X 8 STANDARD SRAM, 15 ns, CDFP32 CERAMIC, DFP-32
512K X 8 STANDARD SRAM, 12 ns, CDIP32
512K X 8 STANDARD SRAM, 25 ns, CQCC32
512K X 8 STANDARD SRAM, CDSO32
512K X 8 STANDARD SRAM, 15 ns, CDSO32
512K X 8 STANDARD SRAM, 12 ns, CDFP32
|
Austin Semiconductor, Inc
Micross Components
AUSTIN SEMICONDUCTOR INC
|
| AS7C4096A-12TCN AS7C4096A-15JI |
IC,AS7C4096A-12TCN,TSOP-44 II, SRAM,12NS,512K X 8,5V 512K X 8 STANDARD SRAM, 12 ns, PDSO44
512K X 8 STANDARD SRAM, 15 ns, PDSO36
|
Alliance Memory, Inc.
ALLIANCE MEMORY INC
|
| AS7C33512NTD32_36A AS7C33512NTD32-36A.V2.8 AS7C335 |
3.3V 512K x 32/36 Pipelined SRAM with NTD 3.3流水线为512k × 32/36与新台币的SRAM
3.3V 512K x 32/36 Pipelined SRAM with NTD 512K X 36 ZBT SRAM, 3.4 ns, PQFP100
3.3V 512K x 32/36 Pipelined SRAM with NTD 512K X 32 ZBT SRAM, 3.8 ns, PQFP100
From old datasheet system
NTD? Sync SRAM - 3.3V
|
Alliance Semiconductor, Corp.
ALSC[Alliance Semiconductor Corporation]
Alliance Semiconductor Corp...
|
| UPD44324092BF5-E33-FQ1 UPD44324182BF5-E33-FQ1 PD44 |
4M X 9 DDR SRAM, 0.45 ns, PBGA165
2M X 18 DDR SRAM, 0.45 ns, PBGA165
36M-BIT DDR II SRAM 2-WORD BURST OPERATION
|
Renesas Electronics Corporation
|
| CY14B108M-ZSP20XC CY14B108K CY14B108K-ZS20XC CY14B |
1M X 8 NON-VOLATILE SRAM, 20 ns, PDSO44
8 Mbit (1024K x 8/512K x 16) nvSRAM with Real Time Clock; Organization: 1Mb x 8; Vcc (V): 2.7 to 3.6 V; Density: 8 Mb; Package: TSOP
512K X 16 NON-VOLATILE SRAM, 45 ns, PDSO54 ROHS COMPLIANT, TSOP2-54
512K X 16 NON-VOLATILE SRAM, 25 ns, PDSO54 ROHS COMPLIANT, TSOP2-54
512K X 16 NON-VOLATILE SRAM, 20 ns, PDSO54 ROHS COMPLIANT, TSOP2-54
|
CYPRESS SEMICONDUCTOR CORP
Cypress Semiconductor, Corp.
|
| M38230G4-XXXFP M38230G4-XXXHP M38231G4-XXXHP M3823 |
18-Mbit (512K x 36/1M x 18) Flow-Through SRAM; Architecture: Standard Sync, Flow-through; Density: 18 Mb; Organization: 512Kb x 36; Vcc (V): 3.1 to 3.6 V
36-Mbit QDR(TM)-II SRAM 4-Word Burst Architecture; Architecture: QDR-II, 4 Word Burst; Density: 36 Mb; Organization: 2Mb x 18; Vcc (V): 1.7 to 1.9 V
36-Mbit DDR-II SRAM 2-Word Burst Architecture; Architecture: DDR-II CIO, 2 Word Burst; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 1.7 to 1.9 V
36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 2.4 to 2.6 V
72-Mbit (2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 3.1 to 3.6 V
18-Mbit (512K x 36/1M x 18) Pipelined SRAM; Architecture: Standard Sync, Pipeline SCD; Density: 18 Mb; Organization: 1Mb x 18; Vcc (V): 3.1 to 3.6 V
36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 3.1 to 3.6 V
72-Mbit QDR(TM)-II SRAM 2-Word Burst Architecture; Architecture: QDR-II, 2 Word Burst; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 1.7 to 1.9 V
18-Mbit (512K x 36/1M x 18) Flow-Through SRAM; Architecture: Standard Sync, Flow-through; Density: 18 Mb; Organization: 1Mb x 18; Vcc (V): 3.1 to 3.6 V
36-Mbit QDR(TM)-II SRAM 2-Word Burst Architecture; Architecture: QDR-II, 2 Word Burst; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 1.7 to 1.9 V
36-Mbit (1M x 36/2 M x 18/512K x 72) Flow-Through SRAM with NoBL(TM) Architecture; Architecture: NoBL, Flow-through; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 3.1 to 3.6 V
72-Mbit(2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 72 Mb; Organization: 1Mb x 72; Vcc (V): 2.4 to 2.6 V
72-Mbit QDR(TM)-II SRAM 2-Word Burst Architecture; Architecture: QDR-II, 2 Word Burst; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 1.7 to 1.9 V
36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined Sync SRAM; Architecture: Standard Sync, Pipeline SCD; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 3.1 to 3.6 V
36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 36 Mb; Organization: 2Mb x 18; Vcc (V): 3.1 to 3.6 V
36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 36 Mb; Organization: 512Kb x 72; Vcc (V): 3.1 to 3.6 V
72-Mbit DDR-II SRAM 2-Word Burst Architecture; Architecture: DDR-II CIO, 2 Word Burst; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 1.7 to 1.9 V
Sync SRAM; Architecture: QDR-II, 2 Word Burst; Density: 36 Mb; Organization: 2Mb x 18; Vcc (V): 1.7 to 1.9 V
36-Mbit DDR-II SRAM 2-Word Burst Architecture; Architecture: DDR-II CIO, 2 Word Burst; Density: 36 Mb; Organization: 2Mb x 18; Vcc (V): 1.7 to 1.9 V
72-Mbit(2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 2.4 to 2.6 V
72-Mbit(2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 2.4 to 2.6 V
72-Mbit QDR(TM)-II SRAM 4-Word Burst Architecture; Architecture: QDR-II, 4 Word Burst; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 1.7 to 1.9 V
72-Mbit (2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 72 Mb; Organization: 1Mb x 72; Vcc (V): 3.1 to 3.6 V
72-Mbit (2M x 36/4M x 18/1M x 72) Pipelined Sync SRAM; Architecture: Standard Sync, Pipeline SCD; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 2.4 to 2.6 V
72-Mbit QDR(TM)-II SRAM 4-Word Burst Architecture (2.5 Cycle Read Latency); Architecture: QDR-II , 4 Word Burst; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 1.7 to 1.9 V
72-Mbit DDR-II SRAM 2-Word Burst Architecture (2.0 Cycle Read Latency); Architecture: DDR-II CIO, 2 Word Burst; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 1.7 to 1.9 V
36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined Sync SRAM; Architecture: Standard Sync, Pipeline SCD; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 3.1 to 3.6 V 单芯位CMOS微机
72-Mbit DDR-II SRAM 2-Word Burst Architecture; Architecture: DDR-II CIO, 2 Word Burst; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 1.7 to 1.9 V 单芯位CMOS微机
18-Mbit (512K x 36/1M x 18) Flow-Through SRAM; Architecture: Standard Sync, Flow-through; Density: 18 Mb; Organization: 1Mb x 18; Vcc (V): 3.1 to 3.6 V 单芯位CMOS微机
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER 单芯位CMOS微机
72-Mbit(2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 2.4 to 2.6 V 单芯位CMOS微机
72-Mbit(2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 2.4 to 2.6 V 单芯位CMOS微机
72-Mbit QDR(TM)-II SRAM 4-Word Burst Architecture; Architecture: QDR-II, 4 Word Burst; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 1.7 to 1.9 V 单芯位CMOS微机
72-Mbit QDR(TM)-II SRAM 2-Word Burst Architecture; Architecture: QDR-II, 2 Word Burst; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 1.7 to 1.9 V 单芯位CMOS微机
36-Mbit QDR(TM)-II SRAM 4-Word Burst Architecture; Architecture: QDR-II, 4 Word Burst; Density: 36 Mb; Organization: 2Mb x 18; Vcc (V): 1.7 to 1.9 V 单芯位CMOS微机
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER 单芯8位CMOS微机
Sync SRAM; Architecture: QDR-II, 2 Word Burst; Density: 36 Mb; Organization: 2Mb x 18; Vcc (V): 1.7 to 1.9 V 单芯位CMOS微机
36-Mbit DDR-II SRAM 2-Word Burst Architecture; Architecture: DDR-II CIO, 2 Word Burst; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 1.7 to 1.9 V 单芯位CMOS微机
72-Mbit DDR-II SRAM 2-Word Burst Architecture; Architecture: DDR-II CIO, 2 Word Burst; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 1.7 to 1.9 V
36-Mbit QDR(TM)-II SRAM 2-Word Burst Architecture; Architecture: QDR-II, 2 Word Burst; Density: 36 Mb; Organization: 2Mb x 18; Vcc (V): 1.7 to 1.9 V
|
Renesas Electronics Corporation.
Renesas Electronics, Corp.
|
| AS7C25512PFD32_36A AS7C25512PFD32A AS7C25512PFD32A |
2.5V 512K x 32/36 pipelined burst synchronous SRAM 512K X 32 STANDARD SRAM, 3.8 ns, PQFP100
2.5V 512K x 32/36 pipelined burst synchronous SRAM 2.5V的为512k × 32/36管线爆裂同步SRAM
2.5V 512K x 32/36 pipelined burst synchronous SRAM 512K X 32 STANDARD SRAM, 3.5 ns, PQFP100
Sync SRAM - 2.5V
|
Alliance Semiconductor, Corp.
Alliance Semiconductor Corporation
ALSC
Alliance Semiconductor Corp...
|
| CY7C1371D-100AXI CY7C1371D-100BGI CY7C1373D-100BZI |
18-Mbit (512K x 36/1M x 18) Flow-Through SRAM with NoBLTM Architecture 1M X 18 ZBT SRAM, 8.5 ns, PQFP100
18-Mbit (512K x 36/1M x 18) Flow-Through SRAM with NoBLTM Architecture 18兆位（为512k × 36/1M × 18）流体系结构，通过与NoBLTM的SRAM
18-Mbit (512K x 36/1M x 18) Flow-Through SRAM with NoBLTM Architecture 1M X 18 ZBT SRAM, 8.5 ns, PBGA165
18-Mbit (512K x 36/1M x 18) Flow-Through SRAM with NoBLTM Architecture 1M X 18 ZBT SRAM, 6.5 ns, PBGA119
18-Mbit (512K x 36/1M x 18) Flow-Through SRAM with NoBLTM Architecture 512K X 36 ZBT SRAM, 8.5 ns, PBGA165
18-Mbit (512K x 36/1M x 18) Flow-Through SRAM with NoBLTM Architecture 1M X 18 ZBT SRAM, 6.5 ns, PQFP100
18-Mbit (512K x 36/1M x 18) Flow-Through SRAM with NoBLTM Architecture 1M X 18 ZBT SRAM, 6.5 ns, PBGA165
18-Mbit (512K x 36/1M x 18) Flow-Through SRAM with NoBLTM Architecture 512K X 36 ZBT SRAM, 8.5 ns, PBGA119
|
Cypress Semiconductor Corp.
Cypress Semiconductor, Corp.
|
| CY7C1049B CY7C1049B-17VC CY7C1049B-17VI CY7C1049B- |
512K x 8 Static RAM 512K X 8 STANDARD SRAM, 12 ns, PDSO36
512K x 8 Static RAM 512K X 8 STANDARD SRAM, 20 ns, PDSO36
CIR 13C 13#12 SKT PLUG 512K X 8 STANDARD SRAM, 20 ns, PDSO36
512K x 8 Static RAM 512K X 8 STANDARD SRAM, 17 ns, PDSO36
|
Cypress Semiconductor, Corp.
Cypress Semiconductor Corp.
CYPRESS[Cypress Semiconductor]
http://
|
| CY7C1429JV18-250BZC CY7C1429JV18-250BZI CY7C1429JV |
4M X 9 DDR SRAM, 0.45 ns, PBGA165
36-Mbit DDR-II SIO SRAM 2-Word Burst Architecture
|
CYPRESS SEMICONDUCTOR CORP
|
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