| PART |
Description |
Maker |
| IR3500V IR3500VMPBF IR3500VMTRPBF |
XPHASE3TM VR11.1 CPU VTT CONTROL IC
|
International Rectifier
|
| NCP51200 |
3 Amp Source / Sink VTT Termination Regulator for DDR, DDR-2, DDR-3, DDR-4
|
ON Semiconductor
|
| IR3507ZMPBF |
XPHASE3TM PHASE IC
|
http://
|
| LTC3876EFEPBF LTC3876EFETRPBF LTC3876EUHFPBF LTC38 |
Dual DC/DC Controller for DDR Power with Differential VDDQ Sensing and ±50mA VTT Reference
|
Linear Technology
|
| ICS9P935 ICS9P935YFLF-T ICS9P935YGLF-T 9P935AFLF |
DDR I/DDR II Phase Lock Loop Zero Delay Buffer
|
Integrated Device Technology
|
| IR3502B IR3502BMPBF IR3502BMTRPBF |
XPHASE3TM CONTROL IC
|
International Rectifier
|
| IR3502 IR3502MPBF IR3502MPBFTR |
XPHASE3TM CONTROL IC
|
International Rectifier
|
| IR3502A IR3502AMPBF IR3502AMTRPBF |
SPECIALTY ANALOG CIRCUIT, QCC32
XPHASE3TM CONTROL IC
|
International Rectifier
|
| PLL103-53XM PLL103-53 PLL103-53XC PLL103-53XI |
DDR SDRAM Buffer with 5 DDR or 3 SDR/3 DDR DIMMS
|
PLL[PhaseLink Corporation]
|
| CY7C1168V18-400BZXC CY7C1168V18-375BZXC CY7C1168V1 |
1M X 18 DDR SRAM, 0.45 ns, PBGA165 13 X 15 MM, 1.40 MM HEIGHT, LEAD FREE, MO-216, FBGA-165
18-Mbit DDR-II SRAM 2-Word Burst Architecture (2.5 Cycle Read Latency) 1M X 18 DDR SRAM, 0.45 ns, PBGA165
2M X 8 DDR SRAM, 0.45 ns, PBGA165
|
Cypress Semiconductor, Corp.
CYPRESS SEMICONDUCTOR CORP
|
| ICS95V842 |
DDR Phase Lock Loop Clock Driver (60MHz - 220MHz)
|
ICST[Integrated Circuit Systems]
|
