| PART |
Description |
Maker |
| XC18V512 XC18V01 |
In-System Programmable Configuration PROMs(在系统可编程配置PROM)
In-System Programmable Configuration PROMs(?ㄧ郴缁??缂????疆PROM)
|
Xilinx, Inc.
|
| XCF32S |
Platform Flash In-System Programmable Configuration PROMS
|
Xilinx
|
| XC18V04VQ4 XC18V04 XC18V01PC2 XC18V01SO2 XC18V04VQ |
XC18V00 Series of In-system Programmable Configuration Proms
|
XILINX[Xilinx, Inc]
XILINX[Xilinx Inc]
|
| XCF01SF48 XCF01SFG48 XCF01SV XCF01SVG XCF02SVO20C |
Platform Flash In-System Programmable Configuration PROMS
|
XILINX[Xilinx, Inc]
|
| XC17256DDD8M |
QPRO Family of XC1700D QML Configuration PROMs
|
XILINX
|
| XCF32P |
(XCFxxS) Platform Flash In-System Programmable Configuration PROMs
|
Xilinx
|
| XQ18V04CC44M XQ18V04VQ44N |
QPro XQ18V04 (XQR18V04) QML In-System Programmable Configuration PROMs
|
Xilinx
|
| 17S100A |
Spartan-II/Spartan-IIE Family OTP Configuration PROMs
|
Xilinx
|
| XC17V01VO8C XC3S400 XC3S1000 XCV200 XC3S50 XC3S200 |
XC17V00 Series Configuration PROMs
Cascadable for storing longer or multiple bitstreams
|
http://
Xilinx, Inc
|
| AT17N002 AT17N010 AT17N040 AT17N256 AT17N512 AT17N |
COVER 256K X 1 CONFIGURATION MEMORY, PDSO20
FPGA Configuration Memory 256K X 1 CONFIGURATION MEMORY, PDSO20
CAT5 SHLD, PVC PATCH CBL STRGHT PIN, 100 MHZ-GREEN 1M X 1 CONFIGURATION MEMORY, PDIP8
GIGATRUE 550 CAT6 PATCH 100 FT, NON BOOT, ORANGE
GIGATRUE 550 CAT6 PATCH 25 FT, NON BOOT, ORANGE
GIGATRUE 550 CAT6 PATCH 50 FT, NON BOOT, ORANGE
GIGATRUE 550 CAT6 PATCH 15 FT, NON BOOT, ORANGE
GIGATRUE 550 CAT6 PATCH 10 FT, NON BOOT, ORANGE
GIGATRUE 550 CAT6 PATCH 30 FT, NON BOOT, ORANGE
GIGATRUE 550 CAT6 PATCH 20 FT, NON BOOT, ORANGE
AT17N/256/512/010/002/040 [Updated 5/03. 18 Pages]
512K-bit FPGA Configuration EEPROM 3.3V
256K-bit FPGA Configuration EEPROM 3.3V
4M-bit FPGA Configuration EEPROM 3.3V
1M-bit FPGA Configuration EEPROM 3.3V
2M-bit FPGA Configuration EEPROM 3.3V
|
Atmel, Corp.
聚兴科技股份有限公司
Atmel Corp.
|
| AT17LV002 AT17LV002-10BJC AT17LV002-10BJI AT17LV00 |
512K-bit FPGA Configuration EEPROM (5V and 3.3V).
65K-bit FPGA Configuration EEPROM (5V and 3.3V).
256K-bit FPGA Configuration EEPROM (5V and 3.3V).
1M-bit FPGA Configuration EEPROM (5V and 3.3V).
2M-bit FPGA Configuration EEPROM (5V and 3.3V)
FPGA Configuration EEPROM Memory
|
ATMEL[ATMEL Corporation]
|
| AT17C128A AT17C128A-10JC AT17C128A-10JI AT17C65A A |
High Speed CMOS Logic 3-to-8 Line Decoder Demutiplexer with Address Latches 16-PDIP -55 to 125
High Speed CMOS Logic 3-to-8 Line Decoder Demutiplexer with Address Latches 16-SOIC -55 to 125
FPGA Configuration EEPROM 128K X 1 CONFIGURATION MEMORY, PQCC20
FPGA Configuration EEPROM 256K X 1 CONFIGURATION MEMORY, PQCC20
FPGA Configuration EEPROM FPGA配置的EEPROM
|
ATMEL[ATMEL Corporation]
Atmel Corp.
Atmel, Corp.
|
