| PART |
Description |
Maker |
| HD74LS73A 74LS73 74LS73A HD74LS73ARP |
Dual J-K Flip-Flops(with Clear)
FLIP-FLOP|DUAL|J/K TYPE|LS-TTL|SOP|14PIN|PLASTIC 触发器|双|焦 K型|编号LS - TTL电|专科| 14PIN |塑料
Dual J-K Flip-Flops(双J-K触发 JK触发器（JK触发器）
|
HITACHI[Hitachi Semiconductor]
Microchip Technology, Inc.
Hitachi,Ltd.
|
| HD74LS113 HD74LS1113 |
Dual J-K Flip-Flops with Preset
Dual J-K Negative-edge-triggered Flip-Flops(with Preset)
|
HITACHI[Hitachi Semiconductor]
|
| 74ACT244SJX 74AC244 74AC244MTC 74AC244MTCX 74AC244 |
Octal Buffer/Line Driver with 3-STATE Outputs
Dual Positive-Edge-Triggered D-Type Flip-Flops With Clear And Preset 14-SO 0 to 70
Dual Positive-Edge-Triggered D-Type Flip-Flops With Clear And Preset 14-SOIC 0 to 70
|
FAIRCHILD[Fairchild Semiconductor]
Fairchild Semiconductor Corporation
|
| HD74HC107 HD74HC107P HD74HC107RPEL HD74HC107FPEL |
Dual J-K Flip-Flops (with Clear)
|
Renesas Electronics Corporation
|
| HD74HC73P HD74HC73FPEL HD74HC73RPEL |
Dual J-K Flip-Flops (with Clear)
|
Renesas Electronics Corporation
|
| HD74HC113P HD74HC113FPEL |
Dual J-K Flip-Flops (with Preset)
|
Renesas Electronics Corporation
|
| HD74HC534 HD74HC374 |
Octal D-type Flip-Flops (with 3-state outputs) / Octal D-type Flip-flops (with inverted 3-state outputs)
Octal D-type Flip-Flops (with 3-state outputs)/Octal D-type Flip-flops (with inverted 3-state outputs)
Octal D-type Flip-Flops (with 3-state outputs),Octal D-type Flip-flops (with inverted 3-state outputs) 八路D型触发器（带三态输出），八D型触发器（带倒三态输出）
|
Hitachi Semiconductor
Hitachi,Ltd.
|
| HD74ALVCH16820 |
3.3-V 10-bit Flip Flops with Dual Outputs
|
Renesas Electronics Corporation
|
| UT54ACTS74E |
Dual D Flip-Flops with Clear and Preset
|
Aeroflex Circuit Techno...
|
| M27W201-80K6TR M27W201-200NZ6TR M27W201-80NZ6TR M2 |
2 MBIT (256KB X8) LOW VOLTAGE OTP EPROM
Test Spring Probe; Current Rating:3A; Leaded Process Compatible:Yes; Length:0.060"; Peak Reflow Compatible (260 C):No; Tip/Nozzle Style:90 Concave RoHS Compliant: Yes 2兆位56Kb × 8低压紫外线可擦写可编程只读存储器和OTP存储
Triple 3-Input Positive-AND Gates 14-SO 0 to 70
Dual J-K Positive-Edge-Triggered Flip-Flops With Clear And Preset 16-SO 0 to 70
Triple 3-Input Positive-AND Gates 14-PDIP 0 to 70
Triple 3-Input Positive-AND Gates 14-SOIC 0 to 70
Dual J-K Positive-Edge-Triggered Flip-Flops With Clear And Preset 16-SOIC 0 to 70
Dual J-K Positive-Edge-Triggered Flip-Flops With Clear And Preset 16-PDIP 0 to 70
2 Mbit 256Kb x 8 Low Voltage UV EPROM and OTP EPROM
2 MBIT (256KB X8) LOW VOLTAGE OTP EPROM
|
STMicroelectronics N.V.
意法半导
STMICROELECTRONICS[STMicroelectronics]
ST Microelectronics
|
