| PART |
Description |
Maker |
| HD74LS73A 74LS73 74LS73A HD74LS73ARP |
Dual J-K Flip-Flops(with Clear)
FLIP-FLOP|DUAL|J/K TYPE|LS-TTL|SOP|14PIN|PLASTIC 触发器|双|焦 K型|编号LS - TTL电|专科| 14PIN |塑料
Dual J-K Flip-Flops(双J-K触发 JK触发器（JK触发器）
|
HITACHI[Hitachi Semiconductor]
Microchip Technology, Inc.
Hitachi,Ltd.
|
| HD74LS113 HD74LS1113 |
Dual J-K Flip-Flops with Preset
Dual J-K Negative-edge-triggered Flip-Flops(with Preset)
|
HITACHI[Hitachi Semiconductor]
|
| HD74HCT74A HD74HCT74AT HD74HCT74AFP |
Dual D-type Positive Edge-triggered Flip Flops with Clear and Preset
Octal D-Type Edge Triggered Flip-Flops with 3-State Outputs 20-CDIP -55 to 125
FLIP-FLOP|DUAL|D TYPE|HCT-CMOS|TSSOP|14PIN|PLASTIC
FLIP-FLOP|DUAL|D TYPE|HCT-CMOS|SOP|14PIN|PLASTIC
|
Hitachi,Ltd.
HITACHI[Hitachi Semiconductor]
|
| HCTS109HMSR HCTS109KMSR HCTS109K HCTS109D HCTS109D |
Dual Positive-Edge-Triggered D-Type- Flip-Flops With Clear And Preset 14-CDIP -55 to 125 辐射加固双JK触发器拖
Radiation Hardened Dual JK Flip Flop
From old datasheet system
|
Intersil, Corp.
INTERSIL[Intersil Corporation]
|
| 74F109 I74F109D I74F109N N74F109D N74F109N 74F109_ |
Positive J-K positive edge-triggered flip-flops F/FAST SERIES, DUAL POSITIVE EDGE TRIGGERED J-KBAR FLIP-FLOP, COMPLEMENTARY OUTPUT, PDIP16
From old datasheet system
Positive J-Knot positive edge-triggered flip-flops
|
NXP Semiconductors N.V.
PHILIPS[Philips Semiconductors]
|
| HD74HC73 HD74HC73FP HD74HC73P |
FLIP-FLOP|DUAL|J/K TYPE|HC-CMOS|DIP|14PIN|PLASTIC
Dual J-K Flip-Flops (with Clear)
FLIP-FLOP|DUAL|J/K TYPE|HC-CMOS|SOP|14PIN|PLASTIC
|
HITACHI[Hitachi Semiconductor]
|
| MM74C73 MM74C73N MM74C76M MM74C76N |
Dual J-K Flip-Flops with Clear and Preset
|
FAIRCHILD[Fairchild Semiconductor]
|
| HD74HC109 HD74HC109RPEL HD74HC109FPEL HD74HC109P |
Dual J-K Flip-Flops (with Preset and Clear)
|
Renesas Electronics Corporation
|
| AT29C512-9 AT29C512-90JU AT29C512-70TC AT29C512-15 |
High Speed CMOS Logic Dual Positive-Edge-Triggered D-Type Flip-Flops with Set and Reset 14-PDIP -55 to 125 64K X 8 FLASH 5V PROM, 90 ns, PDIP32
High Speed CMOS Logic Dual Negative-Edge-Triggered J-K Flip-Flops with Reset 14-SOIC -55 to 125 64K X 8 FLASH 5V PROM, 90 ns, PQCC32
High Speed CMOS Logic Quad 2-Input Exclusive-NOR Gates 14-SOIC -55 to 125 64K X 8 FLASH 5V PROM, 70 ns, PQCC32
High Speed CMOS Logic Dual Negative-Edge-Triggered J-K Flip-Flops with Reset 14-PDIP -55 to 125 64K X 8 FLASH 5V PROM, 70 ns, PQCC32
High Speed CMOS Logic Dual Negative-Edge-Triggered J-K Flip-Flops with Reset 14-SOIC -55 to 125 64K X 8 FLASH 5V PROM, 70 ns, PDIP32
High Speed CMOS Logic Dual Positive-Edge-Triggered D-Type Flip-Flops with Set and Reset 14-SOIC -55 to 125
High Speed CMOS Logic Phase-Locked Loop with VCO and Lock Detector 16-SOIC -55 to 125
512K (64K x 8) 5-volt Only Flash Memory
512K 64K x 8 5-volt Only CMOS Flash Memory
|
Atmel, Corp.
Atmel Corp.
ATMEL[ATMEL Corporation]
|
| KS74AHCT112 |
Dual J-K Negative-Edge-Triggered Flip-Flops
|
Samsung
|
| M27W201-80K6TR M27W201-200NZ6TR M27W201-80NZ6TR M2 |
2 MBIT (256KB X8) LOW VOLTAGE OTP EPROM
Test Spring Probe; Current Rating:3A; Leaded Process Compatible:Yes; Length:0.060"; Peak Reflow Compatible (260 C):No; Tip/Nozzle Style:90 Concave RoHS Compliant: Yes 2兆位56Kb × 8低压紫外线可擦写可编程只读存储器和OTP存储
Triple 3-Input Positive-AND Gates 14-SO 0 to 70
Dual J-K Positive-Edge-Triggered Flip-Flops With Clear And Preset 16-SO 0 to 70
Triple 3-Input Positive-AND Gates 14-PDIP 0 to 70
Triple 3-Input Positive-AND Gates 14-SOIC 0 to 70
Dual J-K Positive-Edge-Triggered Flip-Flops With Clear And Preset 16-SOIC 0 to 70
Dual J-K Positive-Edge-Triggered Flip-Flops With Clear And Preset 16-PDIP 0 to 70
2 Mbit 256Kb x 8 Low Voltage UV EPROM and OTP EPROM
2 MBIT (256KB X8) LOW VOLTAGE OTP EPROM
|
STMicroelectronics N.V.
意法半导
STMICROELECTRONICS[STMicroelectronics]
ST Microelectronics
|
