| PART |
Description |
Maker |
| NB4L339MNG NB4L339MNR2G NB4L33907 |
2.5 V / 3.3 V Differential 2:1 Clock IN to Differential LVPECL Clock Generator / Divider / Fan−Out Buffer
|
ON Semiconductor
|
| MC100LVE222 MC100LVE222FAR2 ON0511 MC100LVE222FA |
0.345A, 2.7-5.5V Quad (2In/ 4Out) Hi-Side MOSFET, Fault Report, Act-Low Enable 16-SOIC 0 to 85
Low Voltage 1:15 Differential ±1±2 ECL/PECL Clock Driver
From old datasheet system
MARKING DIAGRAM
Low Voltage 1:15 Differential 12 ECL/PECL Clock Driver
Low Voltage 1:15 Differential ÷1÷2 ECL/PECL Clock Driver
|
ONSEMI[ON Semiconductor]
|
| ICS9DB202 ICS9DB202CF ICS9DB202CFLF ICS9DB202CFLFT |
From old datasheet system
Two 0.7V current mode differential HCSL output pairs, 1 differential clock input
|
http://
ICST[Integrated Circuit Systems]
|
| NB3N121K |
Fanout Clock Driver, 3.3 V Differential in 1:21 Differential, with HCSL Outputs
|
ON Semiconductor
|
| IDTCSPT857CPAGI IDTCSPT857CBV IDTCSPT857CPFI IDTCS |
2.5V - 2.6V PLL Differential 1:10 SDRAM Clock Driver
2.5V - 2.6V PHASE LOCKED LOOP DIFFERENTIAL 1:10 SDRAM CLOCK DRIVER
|
IDT[Integrated Device Technology]
|
| NB6L572M NB6L572MMNG NB6L572MMNR4G |
6L SERIES, LOW SKEW CLOCK DRIVER, 2 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), QCC32
2.5V / 3.3V Differential 4:1 Mux to 1:2 CML Clock/Data Fanout / Translator
2.5V / 3.3V Differential 4:1 Mux to 1:2 CML Clock/Data Fanout / Translator
|
ON Semiconductor
|
| MC100EP01 MC10EP445 MC10H172FNR2 MC100EL29 MC100H6 |
3.3V / 5V ECL 4-Input OR/NOR
3.3V / 5VECL 8-Bit Serial/Parallel Converter
Dual Binary 1-4-Decoder (High)
5V ECL Dual Differential Data and Clock D Flip-Flop With Set and Reset
9-Bit TTL-ECL Translator
Quad TTL-ECL Translator
Dual 2-Wide 2-3-Input OR-AND/OR-AND-Invert Gate
3.3V / 5V ECL 8-Bit Synchronous Binary Up Counter
3.3 V 1:9 Differential HSTL/PECL to HSTL Clock Driver with LVTTL Clock Select and Enable
3.3V 10-bit LVTTL/LVCMOS to LVPECL Translator
3.3V / 5V ECL Quad D Flip Flop with Set, Reset, and Differential Clock
5V ECL Voltage Controlled Oscillator
3.3V ECL D-Type Flip-Flop with Set and Reset
Binary to 1-8 Decoder (Low)
Differential -5V ECL To TTL Translator
-3.3V / -5V Triple ECL Input to PECL Output Translator
5V ECL Dual Differential 2:1 Multiplexer
Quad MSTR
5V ECL Quad 4-Input OR/NOR Gate
3.3V ECL Dual Differential Data and Clock D-Type Flip-Flop with Set and Reset
Dual 4-5-Input OR/NOR
|
ON Semiconductor
|
| MC100EL52 MC100EL52D MC10EL52D ON0672 MC100EL52DR2 |
From old datasheet system
Differential Clock D Flip-Flop
Differential Data and Clock D Flip-Flop
|
Motorola
ONSEMI[ON Semiconductor]
|
| MC100LVE111FN MC100LVE111FNR2 MC100LVE111 MC100LVE |
3.3V ECL 1:9 Differential Clock Driver
LOW-VOLTAGE 1:9 DIFFERENTIAL ECL/PECL CLOCK DRIVER
|
ONSEMI[ON Semiconductor]
|
| NBSG53A NBSG53AMN NBSG53AMNR2 NBSG53ABAR2 NBSG53AB |
2.5V/3.3V SiGe Selectable Differential Clock and Data D Flip-Flop/Clock Divider with Reset and OLS
|
ONSEMI[ON Semiconductor]
|
| NB4N121KMNG NB4N121KMNR2G |
3.3V Differential In 1:21 Differential Fanout Clock Driver with HCSL level Output PECL TO CML TRANSLATOR, COMPLEMENTARY OUTPUT, QCC52
|
Rectron Semiconductor
|
| ICS9248-114 ICS9248YF-114-T ICS9248YF-114LF-T |
150 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO48 0.300 INCH, SSOP-48
KX133 Single Chip Clock with Differential CPU Clocks
|
Integrated Device Technology, Inc.
ICS
|
