| PART |
Description |
Maker |
| CY7C1461AV33-100AXC CY7C1463AV33-100AXC CY7C1461AV |
36-Mbit (1M x 36/2 M x 18/512K x 72) Flow-Through SRAM with NoBL垄芒 Architecture
36-Mbit (1M x 36/2 M x 18/512K x 72) Flow-Through SRAM with NoBL Architecture(带NoBL结构6-Mbit (1M x 36/2 M x 18/512K x 72) Flow-Through SRAM) 36兆位米x 36 / 2 M中的x 18/512K × 72）流体系结构，通过与总线延迟（带总线延迟结构的的36 - Mbit通过的SRAM100万x 36 / 2 M中的x 18/512K × 72）流的SRAM
|
Cypress Semiconductor Corp.
|
| CY7C1354CV25-225AXI CY7C1354CV25-167AXI CY7C1356CV |
9-Mbit (256K x 36/512K x 18) Pipelined SRAM with NoBL™ Architecture
9-Mbit ( 256K x 36/512K x 18 ) Pipelined SRAM with NoBL-TM Architecture 9兆位56 × 36/512K × 18）流水线的SRAM的总线延迟TM架构
9-Mbit ( 256K x 36/512K x 18 ) Pipelined SRAM with NoBL-TM Architecture 9兆位56 × 36/512K × 18）流水线的SRAM的总线延迟，TM架构
|
Cypress Semiconductor Corp.
|
| CY62148ELL-55SXA |
4-Mbit (512K x 8) Static RAM 512K X 8 STANDARD SRAM, 55 ns, PDSO32
|
Cypress Semiconductor, Corp.
|
| CY7C1049CV33-15VXE |
4 Mbit (512K x 8) Static RAM; Density: 4 Mb; Organization: 512Kb x 8; Vcc (V): 3.0 to 3.6 V; 512K X 8 STANDARD SRAM, 15 ns, PDSO36
|
Cypress Semiconductor, Corp.
|
| CY7C1386D-200AXI CY7C1387F-167BGC CY7C1387F-167BGI |
18-Mbit (512K x 36/1 Mbit x 18) Pipelined DCD Sync SRAM
|
Cypress Semiconductor
|
| CY7C1355C-117BGC CY7C1355C-117BGI CY7C1355C-117BZC |
9-Mbit (256K x 36/512K x 18) Flow-Through SRAM with NoBL Architecture 256K X 36 ZBT SRAM, 7.5 ns, PBGA165
9-Mbit (256K x 36/512K x 18) Flow-Through SRAM with NoBL Architecture 9兆位56 × 36/512K × 18）流体系结构，通过与总线延迟静态存储器
|
Cypress Semiconductor Corp.
Cypress Semiconductor, Corp.
|
| 28F800BV-B 28F800BV-T 28F008BE-T/B TE28F800CVB90 P |
Dual-Slot, PCMCIA Analog Power Controller
8-MBIT (512K X 16. 1024K X 8) SmartVoltage BOOT BLOCK FLASH MEMORY FAMILY
Quad Network Power Controller for Power-Over-LAN
8-MBIT (512K X 16, 1024K X 8) SmartVoltage BOOT BLOCK FLASH MEMORY FAMILY 8兆位（为512k × 16024K × 8）SmartVoltage启动块闪存系
8-MBIT (512K X 16/ 1024K X 8) SmartVoltage BOOT BLOCK FLASH MEMORY FAMILY
|
Intel Corporation
|
| CY7C1371D |
18-Mbit (512K x 36/1M x 18) Flow-Through SRAM with NoBL Architecture(18-Mb (512K x 36/1M x 18)流通式SRAM（NoBL结构 18兆位（为512k × 36/1M × 18）流体系结构，通过与总线延迟18 MB的（12k × 36/1M × 18）流通式的SRAM（总线延迟结构）的SRAM
|
Cypress Semiconductor Corp.
|
| CY7C1363C-133BZC CY7C1363C-100BZI CY7C1363C-100BGC |
9-Mbit (256K x 36/512K x 18) Flow-Through SRAM 512K X 18 CACHE SRAM, 6.5 ns, PBGA165
9-Mbit (256K x 36/512K x 18) Flow-Through SRAM 512K X 18 CACHE SRAM, 8.5 ns, PBGA165
9-Mbit (256K x 36/512K x 18) Flow-Through SRAM 512K X 18 CACHE SRAM, 8.5 ns, PBGA119
|
Cypress Semiconductor, Corp.
CYPRESS SEMICONDUCTOR CORP
|
| CY7C1382DV25-250BZC CY7C1382DV25-200BZC CY7C1382DV |
18-Mbit (512K x 36/1M x 18) Pipelined SRAM 1M X 18 CACHE SRAM, 2.6 ns, PQFP100
18-Mbit (512K x 36/1M x 18) Pipelined SRAM 1M X 18 CACHE SRAM, 3 ns, PQFP100
18-Mbit (512K x 36/1M x 18) Pipelined SRAM 1M X 18 CACHE SRAM, 2.6 ns, PBGA165
18-Mbit (512K x 36/1M x 18) Pipelined SRAM 1M X 18 CACHE SRAM, 3.4 ns, PBGA119
18-Mbit (512K x 36/1M x 18) Pipelined SRAM 1M X 18 CACHE SRAM, 3 ns, PBGA119
|
Cypress Semiconductor Corp.
Cypress Semiconductor, Corp.
|
