| PART |
Description |
Maker |
| AT29C512-9 AT29C512-90JU AT29C512-70TC AT29C512-15 |
High Speed CMOS Logic Dual Positive-Edge-Triggered D-Type Flip-Flops with Set and Reset 14-PDIP -55 to 125 64K X 8 FLASH 5V PROM, 90 ns, PDIP32
High Speed CMOS Logic Dual Negative-Edge-Triggered J-K Flip-Flops with Reset 14-SOIC -55 to 125 64K X 8 FLASH 5V PROM, 90 ns, PQCC32
High Speed CMOS Logic Quad 2-Input Exclusive-NOR Gates 14-SOIC -55 to 125 64K X 8 FLASH 5V PROM, 70 ns, PQCC32
High Speed CMOS Logic Dual Negative-Edge-Triggered J-K Flip-Flops with Reset 14-PDIP -55 to 125 64K X 8 FLASH 5V PROM, 70 ns, PQCC32
High Speed CMOS Logic Dual Negative-Edge-Triggered J-K Flip-Flops with Reset 14-SOIC -55 to 125 64K X 8 FLASH 5V PROM, 70 ns, PDIP32
High Speed CMOS Logic Dual Positive-Edge-Triggered D-Type Flip-Flops with Set and Reset 14-SOIC -55 to 125
High Speed CMOS Logic Phase-Locked Loop with VCO and Lock Detector 16-SOIC -55 to 125
512K (64K x 8) 5-volt Only Flash Memory
512K 64K x 8 5-volt Only CMOS Flash Memory
|
Atmel, Corp.
Atmel Corp.
ATMEL[ATMEL Corporation]
|
| IDT74LVC112A 74LVC112A_DS_87847 |
3.3V CMOS DUAL NEGATIVE-EDGE-TRIGGERED J-K FLIP-FLOP
From old datasheet system
|
IDT
|
| 74F113PC 74F113SC 74F113SJ 74F113 74F113SCX |
Dual JK Negative Edge-Triggered Flip-Flop F/FAST SERIES, DUAL NEGATIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO14
|
FAIRCHILD[Fairchild Semiconductor]
Fairchild Semiconductor, Corp.
|
| LT1033 LT1033C LT1033CK LT1033M LT1033MK |
Dual J-K Positive-Edge-Triggered Flip-Flops With Clear and Preset 16-SO 0 to 70
3A. Negative Adjustable Regulator
3A, Negative Adjustable Regulator
From old datasheet system
|
Linear Technology Corporation
LINER[Linear Technology]
|
| DV74AC112 |
Dual JK Negative edge-triggered flip-flop
|
AVG Semiconductors(HITEK)
|
| HD74ACT112 HD74AC112 |
Dual JK Negative Edge-Triggered Flip-Flop
|
HITACHI[Hitachi Semiconductor]
|
| SN74LS107D SN74LS107N SN54LS107J SN54LS107A |
DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP
|
MOTOROLA[Motorola, Inc]
Motorola Inc
MOTOROLA[Motorola Inc]
|
| SN54LS113A SN74LS113A |
DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP JK负边沿触发器
|
Motorola Mobility Holdings, Inc.
MOTOROLA[Motorola, Inc]
|
| MAX768 MAX768EEE MAX768C_D MAX768C/D |
Low-Noise, Dual-Output, Regulated Charge Pump for GaAsFET, LCD, and VCO Supplies
Dual J-K Negative-Edge-Triggered Flip-Flops With Preset And Clear 16-CFP -55 to 125
|
MAXIM - Dallas Semiconductor
MAXIM[Maxim Integrated Products]
Maxim Integrated Products, Inc.
|
| 54LS76A/BDAJC |
LS SERIES, DUAL NEGATIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, CDFP14
|
MOTOROLA INC
|
| 74HC73 74HC73PW 74HC73D |
Dual JK flip-flop with reset; negative-edge trigger
Dual JK flip-flop with reset; negative-edge trigger
|
NXP Semiconductors
|
| MC74F113D |
F/FAST SERIES, DUAL NEGATIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO14
|
MOTOROLA INC
|
