| PART |
Description |
Maker |
| MAX685 MAX685EEE |
Dual-Output Positive and Negative / DC-DC Converter for CCD and LCD
Dual D-type Positive-Edge-Triggered Flip-Flops With Preset And Clear 14-CFP -55 to 125
Dual-Output Positive and Negative, DC-DC Converter for CCD and LCD
|
Maxim Integrated Products, Inc.
MAXIM[Maxim Integrated Products]
|
| 74F112PC 74F112SC 74F112SJ 74F112 |
Dual JK Negative Edge-Triggered Flip-Flop
|
FAIRCHILD[Fairchild Semiconductor]
|
| SN74LS107D SN74LS107N SN54LS107J SN54LS107A |
DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP
|
MOTOROLA[Motorola, Inc]
Motorola Inc
MOTOROLA[Motorola Inc]
|
| SN54LS113A SN74LS113A |
DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP JK负边沿触发器
|
Motorola Mobility Holdings, Inc.
MOTOROLA[Motorola, Inc]
|
| 74HC107D-Q100 74HCT107D-Q100 74HC107PW-Q100 |
Dual JK flip-flop with reset; negative-edge trigger
|
NXP Semiconductors
|
| SN54_74LS107A ON2805 |
DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP
From old datasheet system
|
ON Semi
|
| 74F114PC |
Dual JK Negative Edge-Triggered Flip-Flop with Common Clocks and Clears
|
Fairchild Semiconductor
|
| DM74LS73A DM74LS73AN 74LS73 74LS73A DM74LS73AM |
Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flops with Clear and Complementary Outputs
|
Fairchild Semiconductor Corporation
FAIRCHILD[Fairchild Semiconductor]
|
| 74F114SC 74F114 74F114PC |
双JK负沿触发器与普通时钟和清除拖鞋
Dual JK Negative Edge-Triggered Flip-Flop with Common Clocks and Clears
From old datasheet system
|
锁存
FAIRCHILD[Fairchild Semiconductor]
|
| CD74HCT73E |
<font color=red>[Old version datasheet]</font> Dual J-K Flip-Flop with Reset Negative-Edge Trigger
|
TI store
|
